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1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2 | * irmpsystem.h - system specific includes and defines\r | |
3 | *\r | |
4 | * Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de\r | |
5 | *\r | |
6 | * $Id: irmpsystem.h,v 1.17 2015/02/26 15:42:53 fm Exp $\r | |
7 | *\r | |
8 | * This program is free software; you can redistribute it and/or modify\r | |
9 | * it under the terms of the GNU General Public License as published by\r | |
10 | * the Free Software Foundation; either version 2 of the License, or\r | |
11 | * (at your option) any later version.\r | |
12 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
13 | */\r | |
14 | \r | |
15 | #ifndef _IRMPSYSTEM_H_\r | |
16 | #define _IRMPSYSTEM_H_\r | |
17 | \r | |
18 | #if !defined(_IRMP_H_) && !defined(_IRSND_H_)\r | |
19 | # error please include only irmp.h or irsnd.h, not irmpsystem.h\r | |
20 | #endif\r | |
21 | \r | |
22 | #if defined(__18CXX) // Microchip PIC C18 compiler\r | |
23 | # define PIC_C18\r | |
24 | #elif defined(__XC8) // PIC XC8 compiler\r | |
25 | # include <xc.h>\r | |
26 | # define PIC_C18\r | |
27 | #elif defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC compiler\r | |
28 | # define PIC_CCS\r | |
29 | #elif defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || defined(STM32L1XX_HD) // ARM STM32\r | |
30 | # include <stm32l1xx.h>\r | |
31 | # define ARM_STM32\r | |
32 | # define ARM_STM32L1XX\r | |
33 | #elif defined(STM32F10X_LD) || defined(STM32F10X_LD_VL) \\r | |
34 | || defined(STM32F10X_MD) || defined(STM32F10X_MD_VL) \\r | |
35 | || defined(STM32F10X_HD) || defined(STM32F10X_HD_VL) \\r | |
36 | || defined(STM32F10X_XL) || defined(STM32F10X_CL) // ARM STM32\r | |
37 | # include <stm32f10x.h>\r | |
38 | # define ARM_STM32\r | |
39 | # define ARM_STM32F10X\r | |
40 | # define F_CPU (SysCtlClockGet())\r | |
41 | #elif defined(STM32F4XX) // ARM STM32\r | |
42 | # include <stm32f4xx.h>\r | |
43 | # define ARM_STM32\r | |
44 | # define ARM_STM32F4XX\r | |
45 | #elif defined(TARGET_IS_BLIZZARD_RA2) // TI Stellaris (tested on Stellaris Launchpad with Code Composer Studio)\r | |
46 | # define STELLARIS_ARM_CORTEX_M4\r | |
47 | # define F_CPU (SysCtlClockGet())\r | |
48 | #elif defined(unix) || defined(WIN32) || defined(__APPLE__) // Unix/Linux or Windows or Apple\r | |
49 | # define UNIX_OR_WINDOWS\r | |
50 | #else\r | |
51 | # define ATMEL_AVR // ATMEL AVR\r | |
52 | #endif\r | |
53 | \r | |
54 | #include <string.h>\r | |
55 | \r | |
56 | #ifdef UNIX_OR_WINDOWS // Analyze on Unix/Linux or Windows\r | |
57 | # include <stdio.h>\r | |
58 | # include <stdlib.h>\r | |
59 | # define F_CPU 8000000L\r | |
60 | # define ANALYZE\r | |
61 | # ifdef unix\r | |
62 | # include <stdint.h>\r | |
63 | # else\r | |
64 | typedef unsigned char uint8_t;\r | |
65 | typedef unsigned short uint16_t;\r | |
66 | # endif\r | |
67 | #endif\r | |
68 | \r | |
69 | \r | |
70 | #if defined(ATMEL_AVR)\r | |
71 | # include <stdint.h>\r | |
72 | # include <stdio.h>\r | |
73 | # include <avr/io.h>\r | |
74 | # include <util/delay.h>\r | |
75 | # include <avr/pgmspace.h>\r | |
76 | # include <avr/interrupt.h>\r | |
77 | # define IRSND_OC2 0 // OC2\r | |
78 | # define IRSND_OC2A 1 // OC2A\r | |
79 | # define IRSND_OC2B 2 // OC2B\r | |
80 | # define IRSND_OC0 3 // OC0\r | |
81 | # define IRSND_OC0A 4 // OC0A\r | |
82 | # define IRSND_OC0B 5 // OC0B\r | |
83 | \r | |
84 | # define IRSND_XMEGA_OC0A 0 // OC0A\r | |
85 | # define IRSND_XMEGA_OC0B 1 // OC0B\r | |
86 | # define IRSND_XMEGA_OC0C 2 // OC0C\r | |
87 | # define IRSND_XMEGA_OC0D 3 // OC0D\r | |
88 | # define IRSND_XMEGA_OC1A 4 // OC1A\r | |
89 | # define IRSND_XMEGA_OC1B 5 // OC1B\r | |
90 | \r | |
91 | #elif defined(STELLARIS_ARM_CORTEX_M4)\r | |
92 | \r | |
93 | # include "inc/hw_ints.h"\r | |
94 | # include "inc/hw_memmap.h"\r | |
95 | # include "inc/hw_types.h"\r | |
96 | # include "inc/hw_gpio.h"\r | |
97 | # include "driverlib/fpu.h"\r | |
98 | # include "driverlib/sysctl.h"\r | |
99 | # include "driverlib/interrupt.h"\r | |
100 | # include "driverlib/gpio.h"\r | |
101 | # include "driverlib/rom.h"\r | |
102 | # include "driverlib/systick.h"\r | |
103 | # include "driverlib/pin_map.h"\r | |
104 | # include "driverlib/timer.h"\r | |
105 | # define PROGMEM\r | |
106 | # define memcpy_P memcpy\r | |
107 | # define APP_SYSTICKS_PER_SEC 32\r | |
108 | \r | |
109 | #elif defined(ARM_STM32F10X)\r | |
110 | \r | |
111 | # include "stm32f10x_gpio.h"\r | |
112 | # include "stm32f10x_rcc.h"\r | |
113 | # include "stm32f10x_tim.h"\r | |
114 | # include "misc.h"\r | |
115 | # define PROGMEM\r | |
116 | # define memcpy_P memcpy\r | |
117 | \r | |
118 | #else\r | |
119 | \r | |
120 | # define PROGMEM\r | |
121 | # define memcpy_P memcpy\r | |
122 | \r | |
123 | #endif\r | |
124 | \r | |
125 | #if defined(PIC_CCS) || defined(PIC_C18) || defined(ARM_STM32) || defined(STELLARIS_ARM_CORTEX_M4)\r | |
126 | typedef unsigned char uint8_t;\r | |
127 | typedef unsigned short uint16_t;\r | |
128 | #endif\r | |
129 | \r | |
130 | #if defined (PIC_C18) // PIC C18 or XC8 compiler\r | |
131 | # include <p18cxxx.h> // main PIC18 h file\r | |
132 | #ifndef __XC8\r | |
133 | # include <timers.h> // timer lib\r | |
134 | # include <pwm.h> // pwm lib\r | |
135 | #endif\r | |
136 | # define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module\r | |
137 | # define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module\r | |
138 | #endif\r | |
139 | \r | |
140 | #ifndef TRUE\r | |
141 | # define TRUE 1\r | |
142 | # define FALSE 0\r | |
143 | #endif\r | |
144 | \r | |
145 | typedef struct __attribute__ ((__packed__))\r | |
146 | {\r | |
147 | uint8_t protocol; // protocol, e.g. NEC_PROTOCOL\r | |
148 | uint16_t address; // address\r | |
149 | uint16_t command; // command\r | |
150 | uint8_t flags; // flags, e.g. repetition\r | |
151 | } IRMP_DATA;\r | |
152 | \r | |
153 | #endif // _IRMPSYSTEM_H_\r |