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Commit | Line | Data |
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1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r | |
3 | *\r | |
4 | * Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r | |
5 | *\r | |
6 | * $Id: irmp.c,v 1.99 2011/03/10 12:29:13 fm Exp $\r | |
7 | *\r | |
8 | * ATMEGA88 @ 8 MHz\r | |
9 | *\r | |
10 | * Typical manufacturers:\r | |
11 | *\r | |
12 | * SIRCS - Sony\r | |
13 | * NEC - NEC, Yamaha, Canon, Tevion, Harman/Kardon, Hitachi, JVC, Pioneer, Toshiba, Xoro, Orion, and many other Japanese manufacturers\r | |
14 | * SAMSUNG - Samsung\r | |
15 | * SAMSUNG32 - Samsung\r | |
16 | * MATSUSHITA - Matsushita\r | |
17 | * KASEIKYO - Panasonic, Denon & other Japanese manufacturers (members of "Japan's Association for Electric Home Application")\r | |
18 | * RECS80 - Philips, Nokia, Thomson, Nordmende, Telefunken, Saba\r | |
19 | * RC5 - Philips and other European manufacturers\r | |
20 | * DENON - Denon, Sharp\r | |
21 | * RC6 - Philips and other European manufacturers\r | |
22 | * APPLE - Apple\r | |
23 | * NUBERT - Nubert Subwoofer System\r | |
24 | * B&O - Bang & Olufsen\r | |
25 | * PANASONIC - Panasonic (older, yet not implemented)\r | |
26 | * GRUNDIG - Grundig\r | |
27 | * NOKIA - Nokia\r | |
28 | * SIEMENS - Siemens, e.g. Gigaset M740AV\r | |
29 | * FDC - FDC IR keyboard\r | |
30 | * RCCAR - IR remote control for RC cars\r | |
31 | * JVC - JVC\r | |
32 | * NIKON - Nikon cameras\r | |
33 | * RUWIDO - T-Home\r | |
34 | * KATHREIN - Kathrein\r | |
35 | *\r | |
36 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
37 | *\r | |
38 | * SIRCS\r | |
39 | * -----\r | |
40 | *\r | |
41 | * frame: 1 start bit + 12-20 data bits + no stop bit\r | |
42 | * data: 7 command bits + 5 address bits + 0 to 8 additional bits\r | |
43 | *\r | |
44 | * start bit: data "0": data "1": stop bit:\r | |
45 | * -----------------_________ ------_____ ------------______\r | |
46 | * 2400us 600us 600us 600us 1200us 600 us no stop bit\r | |
47 | *\r | |
48 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
49 | *\r | |
50 | * NEC + extended NEC\r | |
51 | * -------------------------\r | |
52 | *\r | |
53 | * frame: 1 start bit + 32 data bits + 1 stop bit\r | |
54 | * data NEC: 8 address bits + 8 inverted address bits + 8 command bits + 8 inverted command bits\r | |
55 | * data extended NEC: 16 address bits + 8 command bits + 8 inverted command bits\r | |
56 | *\r | |
57 | * start bit: data "0": data "1": stop bit:\r | |
58 | * -----------------_________ ------______ ------________________ ------______....\r | |
59 | * 9000us 4500us 560us 560us 560us 1690 us 560us\r | |
60 | *\r | |
61 | *\r | |
62 | * Repetition frame:\r | |
63 | *\r | |
64 | * -----------------_________------______ .... ~100ms Pause, then repeat\r | |
65 | * 9000us 2250us 560us\r | |
66 | *\r | |
67 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
68 | *\r | |
69 | * SAMSUNG\r | |
70 | * -------\r | |
71 | *\r | |
72 | * frame: 1 start bit + 16 data(1) bits + 1 sync bit + additional 20 data(2) bits + 1 stop bit\r | |
73 | * data(1): 16 address bits\r | |
74 | * data(2): 4 ID bits + 8 command bits + 8 inverted command bits\r | |
75 | *\r | |
76 | * start bit: data "0": data "1": sync bit: stop bit:\r | |
77 | * ----------______________ ------______ ------________________ ------______________ ------______....\r | |
78 | * 4500us 4500us 550us 450us 550us 1450us 550us 4500us 550us\r | |
79 | *\r | |
80 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
81 | *\r | |
82 | * SAMSUNG32\r | |
83 | * ----------\r | |
84 | *\r | |
85 | * frame: 1 start bit + 32 data bits + 1 stop bit\r | |
86 | * data: 16 address bits + 16 command bits\r | |
87 | *\r | |
88 | * start bit: data "0": data "1": stop bit:\r | |
89 | * ----------______________ ------______ ------________________ ------______....\r | |
90 | * 4500us 4500us 550us 450us 550us 1450us 550us\r | |
91 | *\r | |
92 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
93 | *\r | |
94 | * MATSUSHITA\r | |
95 | * ----------\r | |
96 | *\r | |
97 | * frame: 1 start bit + 24 data bits + 1 stop bit\r | |
98 | * data: 6 custom bits + 6 command bits + 12 address bits\r | |
99 | *\r | |
100 | * start bit: data "0": data "1": stop bit:\r | |
101 | * ----------_________ ------______ ------________________ ------______....\r | |
102 | * 3488us 3488us 872us 872us 872us 2616us 872us\r | |
103 | *\r | |
104 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
105 | *\r | |
106 | * KASEIKYO\r | |
107 | * --------\r | |
108 | *\r | |
109 | * frame: 1 start bit + 48 data bits + 1 stop bit\r | |
110 | * data: 16 manufacturer bits + 4 parity bits + 4 genre1 bits + 4 genre2 bits + 10 command bits + 2 id bits + 8 parity bits\r | |
111 | *\r | |
112 | * start bit: data "0": data "1": stop bit:\r | |
113 | * ----------______ ------______ ------________________ ------______....\r | |
114 | * 3380us 1690us 423us 423us 423us 1269us 423us\r | |
115 | *\r | |
116 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
117 | *\r | |
118 | * RECS80\r | |
119 | * ------\r | |
120 | *\r | |
121 | * frame: 2 start bits + 10 data bits + 1 stop bit\r | |
122 | * data: 1 toggle bit + 3 address bits + 6 command bits\r | |
123 | *\r | |
124 | * start bit: data "0": data "1": stop bit:\r | |
125 | * -----_____________________ -----____________ -----______________ ------_______....\r | |
126 | * 158us 7432us 158us 4902us 158us 7432us 158us\r | |
127 | *\r | |
128 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
129 | *\r | |
130 | * RECS80EXT\r | |
131 | * ---------\r | |
132 | *\r | |
133 | * frame: 2 start bits + 11 data bits + 1 stop bit\r | |
134 | * data: 1 toggle bit + 4 address bits + 6 command bits\r | |
135 | *\r | |
136 | * start bit: data "0": data "1": stop bit:\r | |
137 | * -----_____________________ -----____________ -----______________ ------_______....\r | |
138 | * 158us 3637us 158us 4902us 158us 7432us 158us\r | |
139 | *\r | |
140 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
141 | *\r | |
142 | * RC5 + RC5X\r | |
143 | * ----------\r | |
144 | *\r | |
145 | * RC5 frame: 2 start bits + 12 data bits + no stop bit\r | |
146 | * RC5 data: 1 toggle bit + 5 address bits + 6 command bits\r | |
147 | * RC5X frame: 1 start bit + 13 data bits + no stop bit\r | |
148 | * RC5X data: 1 inverted command bit + 1 toggle bit + 5 address bits + 6 command bits\r | |
149 | *\r | |
150 | * start bit: data "0": data "1":\r | |
151 | * ______----- ------______ ______------\r | |
152 | * 889us 889us 889us 889us 889us 889us\r | |
153 | *\r | |
154 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
155 | *\r | |
156 | * DENON\r | |
157 | * -----\r | |
158 | *\r | |
159 | * frame: 0 start bits + 16 data bits + stop bit + 65ms pause + 16 inverted data bits + stop bit\r | |
160 | * data: 5 address bits + 10 command bits\r | |
161 | *\r | |
162 | * Theory:\r | |
163 | *\r | |
164 | * data "0": data "1":\r | |
165 | * ------________________ ------______________\r | |
166 | * 275us 775us 275us 1900us\r | |
167 | *\r | |
168 | * Practice:\r | |
169 | *\r | |
170 | * data "0": data "1":\r | |
171 | * ------________________ ------______________\r | |
172 | * 310us 745us 310us 1780us\r | |
173 | *\r | |
174 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
175 | *\r | |
176 | * RC6\r | |
177 | * ---\r | |
178 | *\r | |
179 | * RC6 frame: 1 start bit + 1 bit "1" + 3 mode bits + 1 toggle bit + 16 data bits + 2666 us pause\r | |
180 | * RC6 data: 8 address bits + 8 command bits\r | |
181 | *\r | |
182 | * start bit toggle bit "0": toggle bit "1": data/mode "0": data/mode "1":\r | |
183 | * ____________------- _______------- -------_______ _______------- -------_______\r | |
184 | * 2666us 889us 889us 889us 889us 889us 444us 444us 444us 444us\r | |
185 | *\r | |
186 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
187 | *\r | |
188 | * APPLE\r | |
189 | * -----\r | |
190 | *\r | |
191 | * frame: 1 start bit + 32 data bits + 1 stop bit\r | |
192 | * data: 16 address bits + 11100000 + 8 command bits\r | |
193 | *\r | |
194 | * start bit: data "0": data "1": stop bit:\r | |
195 | * -----------------_________ ------______ ------________________ ------______....\r | |
196 | * 9000us 4500us 560us 560us 560us 1690 us 560us\r | |
197 | *\r | |
198 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
199 | *\r | |
200 | * NUBERT (subwoofer system)\r | |
201 | * -------------------------\r | |
202 | *\r | |
203 | * frame: 1 start bit + 10 data bits + 1 stop bit\r | |
204 | * data: 0 address bits + 10 command bits ?\r | |
205 | *\r | |
206 | * start bit: data "0": data "1": stop bit:\r | |
207 | * ----------_____ ------______ ------________________ ------______....\r | |
208 | * 1340us 340us 500us 1300us 1340us 340us 500us\r | |
209 | *\r | |
210 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
211 | *\r | |
212 | * BANG_OLUFSEN\r | |
213 | * ------------\r | |
214 | *\r | |
215 | * frame: 4 start bits + 16 data bits + 1 trailer bit + 1 stop bit\r | |
216 | * data: 0 address bits + 16 command bits\r | |
217 | *\r | |
218 | * 1st start bit: 2nd start bit: 3rd start bit: 4th start bit:\r | |
219 | * -----________ -----________ -----_____________ -----________\r | |
220 | * 210us 3000us 210us 3000us 210us 15000us 210us 3000us\r | |
221 | *\r | |
222 | * data "0": data "1": data "repeat bit": trailer bit: stop bit:\r | |
223 | * -----________ -----_____________ -----___________ -----_____________ -----____...\r | |
224 | * 210us 3000us 210us 9000us 210us 6000us 210us 12000us 210us\r | |
225 | *\r | |
226 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
227 | *\r | |
228 | * GRUNDIG\r | |
229 | * -------\r | |
230 | *\r | |
231 | * packet: 1 start frame + 19,968ms pause + N info frames + 117,76ms pause + 1 stop frame\r | |
232 | * frame: 1 pre bit + 1 start bit + 9 data bits + no stop bit\r | |
233 | * pause between info frames: 117,76ms\r | |
234 | *\r | |
235 | * data of start frame: 9 x 1\r | |
236 | * data of info frame: 9 command bits\r | |
237 | * data of stop frame: 9 x 1\r | |
238 | *\r | |
239 | * pre bit: start bit data "0": data "1":\r | |
240 | * ------____________ ------______ ______------ ------______ \r | |
241 | * 528us 2639us 528us 528us 528us 528us 528us 528us\r | |
242 | *\r | |
243 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
244 | *\r | |
245 | * NOKIA:\r | |
246 | * ------\r | |
247 | *\r | |
248 | * Timing similar to Grundig, but 16 data bits:\r | |
249 | * frame: 1 pre bit + 1 start bit + 8 command bits + 8 address bits + no stop bit\r | |
250 | *\r | |
251 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
252 | *\r | |
253 | * SIEMENS or RUWIDO:\r | |
254 | * ------------------\r | |
255 | *\r | |
256 | * SIEMENS frame: 1 start bit + 22 data bits + no stop bit\r | |
257 | * SIEMENS data: 13 address bits + 1 repeat bit + 7 data bits + 1 unknown bit\r | |
258 | *\r | |
259 | * start bit data "0": data "1":\r | |
260 | * -------_______ _______------- -------_______\r | |
261 | * 250us 250us 250us 250us 250us 250us\r | |
262 | *\r | |
263 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
264 | *\r | |
265 | * PANASONIC (older protocol, yet not implemented, see also MATSUSHITA, timing very similar)\r | |
266 | * -----------------------------------------------------------------------------------------\r | |
267 | *\r | |
268 | * frame: 1 start bit + 22 data bits + 1 stop bit\r | |
269 | * 22 data bits = 5 custom bits + 6 data bits + 5 inverted custom bits + 6 inverted data bits\r | |
270 | *\r | |
271 | * European version: T = 456us\r | |
272 | * USA & Canada version: T = 422us\r | |
273 | *\r | |
274 | * start bit: data "0": data "1": stop bit:\r | |
275 | * 8T 8T 2T 2T 2T 6T 2T\r | |
276 | * -------------____________ ------_____ ------_____________ ------_______....\r | |
277 | * 3648us 3648us 912us 912us 912us 2736us 912us (Europe)\r | |
278 | * 3376us 3376us 844us 844us 844us 2532us 844us (US)\r | |
279 | *\r | |
280 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
281 | *\r | |
282 | * This program is free software; you can redistribute it and/or modify\r | |
283 | * it under the terms of the GNU General Public License as published by\r | |
284 | * the Free Software Foundation; either version 2 of the License, or\r | |
285 | * (at your option) any later version.\r | |
286 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
287 | */\r | |
288 | \r | |
289 | #if defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC Compiler instead of AVR\r | |
290 | #define PIC_CCS_COMPILER\r | |
291 | #endif\r | |
292 | \r | |
293 | #ifdef unix // test on linux/unix\r | |
294 | #include <stdio.h>\r | |
295 | #include <unistd.h>\r | |
296 | #include <stdlib.h>\r | |
297 | #include <string.h>\r | |
298 | #include <inttypes.h>\r | |
299 | \r | |
300 | #define ANALYZE\r | |
301 | #define PROGMEM\r | |
302 | #define memcpy_P memcpy\r | |
303 | \r | |
304 | #else // not unix:\r | |
305 | \r | |
306 | #ifdef WIN32\r | |
307 | #include <stdio.h>\r | |
308 | #include <string.h>\r | |
309 | typedef unsigned char uint8_t;\r | |
310 | typedef unsigned short uint16_t;\r | |
311 | #define ANALYZE\r | |
312 | #define PROGMEM\r | |
313 | #define memcpy_P memcpy\r | |
314 | \r | |
315 | #else\r | |
316 | \r | |
317 | #ifndef CODEVISION\r | |
318 | \r | |
319 | #ifdef PIC_CCS_COMPILER\r | |
320 | \r | |
321 | #include <string.h>\r | |
322 | typedef unsigned int8 uint8_t;\r | |
323 | typedef unsigned int16 uint16_t;\r | |
324 | #define PROGMEM\r | |
325 | #define memcpy_P memcpy\r | |
326 | \r | |
327 | #else // AVR:\r | |
328 | \r | |
329 | #include <inttypes.h>\r | |
330 | #include <stdio.h>\r | |
331 | #include <string.h>\r | |
332 | #include <avr/io.h>\r | |
333 | #include <util/delay.h>\r | |
334 | #include <avr/pgmspace.h>\r | |
335 | \r | |
336 | #endif // PIC_CCS_COMPILER\r | |
337 | #endif // CODEVISION\r | |
338 | \r | |
339 | #endif // windows\r | |
340 | #endif // unix\r | |
341 | \r | |
342 | #ifndef IRMP_USE_AS_LIB\r | |
343 | #include "irmpconfig.h"\r | |
344 | #endif\r | |
345 | #include "irmp.h"\r | |
346 | \r | |
347 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r | |
348 | #define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r | |
349 | #else\r | |
350 | #define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r | |
351 | #endif\r | |
352 | \r | |
353 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r | |
354 | #define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r | |
355 | #else\r | |
356 | #define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r | |
357 | #endif\r | |
358 | \r | |
359 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r | |
360 | IRMP_SUPPORT_RC6_PROTOCOL == 1 || \\r | |
361 | IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r | |
362 | IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r | |
363 | IRMP_SUPPORT_IR60_PROTOCOL\r | |
364 | #define IRMP_SUPPORT_MANCHESTER 1\r | |
365 | #else\r | |
366 | #define IRMP_SUPPORT_MANCHESTER 0\r | |
367 | #endif\r | |
368 | \r | |
369 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1 || \\r | |
370 | IRMP_SUPPORT_IMON_PROTOCOL == 1 \r | |
371 | #define IRMP_SUPPORT_SERIAL 1\r | |
372 | #else\r | |
373 | #define IRMP_SUPPORT_SERIAL 0\r | |
374 | #endif\r | |
375 | \r | |
376 | #define IRMP_KEY_REPETITION_LEN (uint16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r | |
377 | \r | |
378 | #define MIN_TOLERANCE_00 1.0 // -0%\r | |
379 | #define MAX_TOLERANCE_00 1.0 // +0%\r | |
380 | \r | |
381 | #define MIN_TOLERANCE_05 0.95 // -5%\r | |
382 | #define MAX_TOLERANCE_05 1.05 // +5%\r | |
383 | \r | |
384 | #define MIN_TOLERANCE_10 0.9 // -10%\r | |
385 | #define MAX_TOLERANCE_10 1.1 // +10%\r | |
386 | \r | |
387 | #define MIN_TOLERANCE_15 0.85 // -15%\r | |
388 | #define MAX_TOLERANCE_15 1.15 // +15%\r | |
389 | \r | |
390 | #define MIN_TOLERANCE_20 0.8 // -20%\r | |
391 | #define MAX_TOLERANCE_20 1.2 // +20%\r | |
392 | \r | |
393 | #define MIN_TOLERANCE_30 0.7 // -30%\r | |
394 | #define MAX_TOLERANCE_30 1.3 // +30%\r | |
395 | \r | |
396 | #define MIN_TOLERANCE_40 0.6 // -40%\r | |
397 | #define MAX_TOLERANCE_40 1.4 // +40%\r | |
398 | \r | |
399 | #define MIN_TOLERANCE_50 0.5 // -50%\r | |
400 | #define MAX_TOLERANCE_50 1.5 // +50%\r | |
401 | \r | |
402 | #define MIN_TOLERANCE_60 0.4 // -60%\r | |
403 | #define MAX_TOLERANCE_60 1.6 // +60%\r | |
404 | \r | |
405 | #define MIN_TOLERANCE_70 0.3 // -70%\r | |
406 | #define MAX_TOLERANCE_70 1.7 // +70%\r | |
407 | \r | |
408 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
409 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
410 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
411 | #if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r | |
412 | #define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
413 | #else // only 5% + 1 to avoid conflict with RC6:\r | |
414 | #define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
415 | #endif\r | |
416 | #define SIRCS_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
417 | #define SIRCS_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
418 | #define SIRCS_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
419 | #define SIRCS_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
420 | #define SIRCS_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
421 | #define SIRCS_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
422 | \r | |
423 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
424 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
425 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
426 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
427 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
428 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
429 | #define NEC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
430 | #define NEC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
431 | #define NEC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
432 | #define NEC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
433 | #define NEC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
434 | #define NEC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
435 | // autodetect nec repetition frame within 50 msec:\r | |
436 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms\r | |
437 | #if 0\r | |
438 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
439 | #else\r | |
440 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
441 | #endif\r | |
442 | \r | |
443 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
444 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
445 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
446 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
447 | #define SAMSUNG_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
448 | #define SAMSUNG_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
449 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
450 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
451 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
452 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
453 | \r | |
454 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
455 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
456 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
457 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
458 | #define MATSUSHITA_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
459 | #define MATSUSHITA_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
460 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
461 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
462 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
463 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
464 | \r | |
465 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
466 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
467 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
468 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
469 | #define KASEIKYO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)\r | |
470 | #define KASEIKYO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
471 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
472 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
473 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)\r | |
474 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
475 | \r | |
476 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_00 + 0.5) - 1)\r | |
477 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
478 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
479 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
480 | #define RECS80_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
481 | #define RECS80_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
482 | #define RECS80_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
483 | #define RECS80_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
484 | #define RECS80_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
485 | #define RECS80_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
486 | \r | |
487 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
488 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
489 | #define RC5_START_BIT_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
490 | #define RC5_START_BIT_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
491 | #define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
492 | #define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
493 | #define RC5_BIT_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
494 | #define RC5_BIT_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
495 | \r | |
496 | #define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
497 | #define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
498 | #define DENON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
499 | #define DENON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
500 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r | |
501 | #define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5)) // no -1, avoid conflict with RUWIDO\r | |
502 | #else\r | |
503 | #define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) // be more tolerant\r | |
504 | #endif\r | |
505 | #define DENON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
506 | \r | |
507 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
508 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
509 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
510 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
511 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
512 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
513 | #define RC6_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
514 | #define RC6_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_30 + 0.5) + 1) // pulses: 300 - 700\r | |
515 | #define RC6_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1) // pauses: 300 - 600\r | |
516 | #define RC6_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
517 | \r | |
518 | #define RC6_BIT_PULSE_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
519 | #define RC6_BIT_PULSE_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1) // pulses: 600 - 1400\r | |
520 | #define RC6_BIT_PAUSE_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1) // pauses: 600 - 1200\r | |
521 | #define RC6_BIT_PAUSE_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1)\r | |
522 | \r | |
523 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_00 + 0.5) - 1)\r | |
524 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_00 + 0.5) + 1)\r | |
525 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
526 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
527 | #define RECS80EXT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
528 | #define RECS80EXT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
529 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
530 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
531 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
532 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
533 | \r | |
534 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
535 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
536 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
537 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
538 | #define NUBERT_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
539 | #define NUBERT_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
540 | #define NUBERT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
541 | #define NUBERT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
542 | #define NUBERT_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
543 | #define NUBERT_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
544 | #define NUBERT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
545 | #define NUBERT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
546 | \r | |
547 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
548 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
549 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
550 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
551 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
552 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
553 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
554 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
555 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
556 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
557 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
558 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT\r | |
559 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
560 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
561 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
562 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
563 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
564 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
565 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
566 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
567 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
568 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
569 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
570 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
571 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
572 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
573 | \r | |
574 | #define IR60_TIMEOUT_LEN ((uint8_t)(F_INTERRUPTS * IR60_TIMEOUT_TIME * 0.5))\r | |
575 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
576 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
577 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
578 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
579 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
580 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
581 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)\r | |
582 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
583 | \r | |
584 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
585 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
586 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
587 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
588 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
589 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
590 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
591 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
592 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
593 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
594 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
595 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
596 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME_2 * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
597 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME_2 * MAX_TOLERANCE_60 + 0.5) + 1)\r | |
598 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN_2 ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME_2 * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
599 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX_2 ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME_2 * MAX_TOLERANCE_60 + 0.5) + 1)\r | |
600 | \r | |
601 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX\r | |
602 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
603 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
604 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
605 | #define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
606 | #define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
607 | #define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
608 | #define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
609 | #if 0\r | |
610 | #define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255\r | |
611 | #else\r | |
612 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1\r | |
613 | #endif\r | |
614 | #define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
615 | \r | |
616 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
617 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
618 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
619 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
620 | #define RCCAR_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
621 | #define RCCAR_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
622 | #define RCCAR_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
623 | #define RCCAR_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
624 | #define RCCAR_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
625 | #define RCCAR_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
626 | \r | |
627 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
628 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
629 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!\r | |
630 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!\r | |
631 | #define JVC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
632 | #define JVC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
633 | #define JVC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
634 | #define JVC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
635 | #define JVC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
636 | #define JVC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
637 | // autodetect JVC repetition frame within 50 msec:\r | |
638 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
639 | \r | |
640 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
641 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
642 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
643 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
644 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
645 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
646 | #define NIKON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
647 | #define NIKON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
648 | #define NIKON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
649 | #define NIKON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
650 | #define NIKON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
651 | #define NIKON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
652 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
653 | \r | |
654 | #define KATHREIN_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
655 | #define KATHREIN_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
656 | #define KATHREIN_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
657 | #define KATHREIN_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
658 | #define KATHREIN_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
659 | #define KATHREIN_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
660 | #define KATHREIN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
661 | #define KATHREIN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
662 | #define KATHREIN_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
663 | #define KATHREIN_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
664 | #define KATHREIN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
665 | #define KATHREIN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
666 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
667 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
668 | \r | |
669 | #define NETBOX_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
670 | #define NETBOX_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
671 | #define NETBOX_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
672 | #define NETBOX_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
673 | #define NETBOX_PULSE_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME))\r | |
674 | #define NETBOX_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME))\r | |
675 | #define NETBOX_PULSE_REST_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME / 4))\r | |
676 | #define NETBOX_PAUSE_REST_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME / 4))\r | |
677 | \r | |
678 | #define IMON_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * IMON_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
679 | #define IMON_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * IMON_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
680 | #define IMON_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * IMON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
681 | #define IMON_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * IMON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
682 | #define IMON_PULSE_LEN ((uint8_t)(F_INTERRUPTS * IMON_PULSE_TIME))\r | |
683 | #define IMON_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * IMON_PAUSE_TIME))\r | |
684 | #define IMON_PULSE_REST_LEN ((uint8_t)(F_INTERRUPTS * IMON_PULSE_TIME / 4))\r | |
685 | #define IMON_PAUSE_REST_LEN ((uint8_t)(F_INTERRUPTS * IMON_PAUSE_TIME / 4))\r | |
686 | \r | |
687 | #define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r | |
688 | \r | |
689 | #ifdef ANALYZE\r | |
690 | #define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r | |
691 | #define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r | |
692 | #define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r | |
693 | #define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r | |
694 | static int silent;\r | |
695 | static int time_counter;\r | |
696 | static int verbose;\r | |
697 | #else\r | |
698 | #define ANALYZE_PUTCHAR(a)\r | |
699 | #define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r | |
700 | #define ANALYZE_PRINTF(...)\r | |
701 | #define ANALYZE_NEWLINE()\r | |
702 | #endif\r | |
703 | \r | |
704 | #if IRMP_LOGGING == 1\r | |
705 | #define BAUD 9600L\r | |
706 | #include <util/setbaud.h>\r | |
707 | \r | |
708 | #ifdef UBRR0H\r | |
709 | \r | |
710 | #define UART0_UBRRH UBRR0H\r | |
711 | #define UART0_UBRRL UBRR0L\r | |
712 | #define UART0_UCSRA UCSR0A\r | |
713 | #define UART0_UCSRB UCSR0B\r | |
714 | #define UART0_UCSRC UCSR0C\r | |
715 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r | |
716 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r | |
717 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r | |
718 | #ifdef URSEL0\r | |
719 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r | |
720 | #else\r | |
721 | #define UART0_URSEL_BIT_VALUE (0)\r | |
722 | #endif\r | |
723 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r | |
724 | #define UART0_UDR UDR0\r | |
725 | #define UART0_U2X U2X0\r | |
726 | \r | |
727 | #else\r | |
728 | \r | |
729 | #define UART0_UBRRH UBRRH\r | |
730 | #define UART0_UBRRL UBRRL\r | |
731 | #define UART0_UCSRA UCSRA\r | |
732 | #define UART0_UCSRB UCSRB\r | |
733 | #define UART0_UCSRC UCSRC\r | |
734 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)\r | |
735 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r | |
736 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r | |
737 | #ifdef URSEL\r | |
738 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)\r | |
739 | #else\r | |
740 | #define UART0_URSEL_BIT_VALUE (0)\r | |
741 | #endif\r | |
742 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)\r | |
743 | #define UART0_UDR UDR\r | |
744 | #define UART0_U2X U2X\r | |
745 | \r | |
746 | #endif\r | |
747 | \r | |
748 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
749 | * Initialize UART\r | |
750 | * @details Initializes UART\r | |
751 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
752 | */\r | |
753 | void\r | |
754 | irmp_uart_init (void)\r | |
755 | {\r | |
756 | UART0_UBRRH = UBRRH_VALUE; // set baud rate\r | |
757 | UART0_UBRRL = UBRRL_VALUE;\r | |
758 | \r | |
759 | #if USE_2X\r | |
760 | UART0_UCSRA |= (1<<UART0_U2X);\r | |
761 | #else\r | |
762 | UART0_UCSRA &= ~(1<<UART0_U2X);\r | |
763 | #endif\r | |
764 | \r | |
765 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r | |
766 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r | |
767 | }\r | |
768 | \r | |
769 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
770 | * Send character\r | |
771 | * @details Sends character\r | |
772 | * @param ch character to be transmitted\r | |
773 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
774 | */\r | |
775 | void\r | |
776 | irmp_uart_putc (unsigned char ch)\r | |
777 | {\r | |
778 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r | |
779 | {\r | |
780 | ;\r | |
781 | }\r | |
782 | \r | |
783 | UART0_UDR = ch;\r | |
784 | }\r | |
785 | \r | |
786 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
787 | * Log IR signal\r | |
788 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
789 | */\r | |
790 | \r | |
791 | #define STARTCYCLES 2 // min count of zeros before start of logging\r | |
792 | #define ENDBITS 1000 // number of sequenced highbits to detect end\r | |
793 | #define DATALEN 700 // log buffer size\r | |
794 | \r | |
795 | static void\r | |
796 | irmp_log (uint8_t val)\r | |
797 | {\r | |
798 | static uint8_t buf[DATALEN]; // logging buffer\r | |
799 | static uint16_t buf_idx; // number of written bits\r | |
800 | static uint8_t startcycles; // current number of start-zeros\r | |
801 | static uint16_t cnt; // counts sequenced highbits - to detect end\r | |
802 | \r | |
803 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r | |
804 | {\r | |
805 | startcycles++;\r | |
806 | }\r | |
807 | else\r | |
808 | {\r | |
809 | startcycles = 0;\r | |
810 | \r | |
811 | if (! val || (val && buf_idx != 0)) // start or continue logging on "0", "1" cannot init logging\r | |
812 | {\r | |
813 | if (buf_idx < DATALEN * 8) // index in range?\r | |
814 | { // yes\r | |
815 | if (val)\r | |
816 | {\r | |
817 | buf[(buf_idx / 8)] |= (1<<(buf_idx % 8)); // set bit\r | |
818 | }\r | |
819 | else\r | |
820 | {\r | |
821 | buf[(buf_idx / 8)] &= ~(1<<(buf_idx % 8)); // reset bit\r | |
822 | }\r | |
823 | \r | |
824 | buf_idx++;\r | |
825 | }\r | |
826 | \r | |
827 | if (val)\r | |
828 | { // if high received then look at log-stop condition\r | |
829 | cnt++;\r | |
830 | \r | |
831 | if (cnt > ENDBITS)\r | |
832 | { // if stop condition is true, output on uart\r | |
833 | uint16_t i;\r | |
834 | \r | |
835 | for (i = 0; i < STARTCYCLES; i++)\r | |
836 | {\r | |
837 | irmp_uart_putc ('0'); // the ignored starting zeros\r | |
838 | }\r | |
839 | \r | |
840 | for (i = 0; i < (buf_idx - ENDBITS + 20) / 8; i++) // transform bitset into uart chars\r | |
841 | {\r | |
842 | uint8_t d = buf[i];\r | |
843 | uint8_t j;\r | |
844 | \r | |
845 | for (j = 0; j < 8; j++)\r | |
846 | {\r | |
847 | irmp_uart_putc ((d & 1) + '0');\r | |
848 | d >>= 1;\r | |
849 | }\r | |
850 | }\r | |
851 | \r | |
852 | irmp_uart_putc ('\n');\r | |
853 | buf_idx = 0;\r | |
854 | }\r | |
855 | }\r | |
856 | else\r | |
857 | {\r | |
858 | cnt = 0;\r | |
859 | }\r | |
860 | }\r | |
861 | }\r | |
862 | }\r | |
863 | \r | |
864 | #else\r | |
865 | #define irmp_log(val)\r | |
866 | #endif\r | |
867 | \r | |
868 | typedef struct\r | |
869 | {\r | |
870 | uint8_t protocol; // ir protocol\r | |
871 | uint8_t pulse_1_len_min; // minimum length of pulse with bit value 1\r | |
872 | uint8_t pulse_1_len_max; // maximum length of pulse with bit value 1\r | |
873 | uint8_t pause_1_len_min; // minimum length of pause with bit value 1\r | |
874 | uint8_t pause_1_len_max; // maximum length of pause with bit value 1\r | |
875 | uint8_t pulse_0_len_min; // minimum length of pulse with bit value 0\r | |
876 | uint8_t pulse_0_len_max; // maximum length of pulse with bit value 0\r | |
877 | uint8_t pause_0_len_min; // minimum length of pause with bit value 0\r | |
878 | uint8_t pause_0_len_max; // maximum length of pause with bit value 0\r | |
879 | uint8_t address_offset; // address offset\r | |
880 | uint8_t address_end; // end of address\r | |
881 | uint8_t command_offset; // command offset\r | |
882 | uint8_t command_end; // end of command\r | |
883 | uint8_t complete_len; // complete length of frame\r | |
884 | uint8_t stop_bit; // flag: frame has stop bit\r | |
885 | uint8_t lsb_first; // flag: LSB first\r | |
886 | uint8_t flags; // some flags\r | |
887 | } IRMP_PARAMETER;\r | |
888 | \r | |
889 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
890 | \r | |
891 | static PROGMEM IRMP_PARAMETER sircs_param =\r | |
892 | {\r | |
893 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol\r | |
894 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
895 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
896 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
897 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
898 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
899 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
900 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
901 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
902 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset\r | |
903 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address\r | |
904 | SIRCS_COMMAND_OFFSET, // command_offset: command offset\r | |
905 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command\r | |
906 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
907 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
908 | SIRCS_LSB, // lsb_first: flag: LSB first\r | |
909 | SIRCS_FLAGS // flags: some flags\r | |
910 | };\r | |
911 | \r | |
912 | #endif\r | |
913 | \r | |
914 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
915 | \r | |
916 | static PROGMEM IRMP_PARAMETER nec_param =\r | |
917 | {\r | |
918 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r | |
919 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
920 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
921 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
922 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
923 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
924 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
925 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
926 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
927 | NEC_ADDRESS_OFFSET, // address_offset: address offset\r | |
928 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
929 | NEC_COMMAND_OFFSET, // command_offset: command offset\r | |
930 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
931 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
932 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
933 | NEC_LSB, // lsb_first: flag: LSB first\r | |
934 | NEC_FLAGS // flags: some flags\r | |
935 | };\r | |
936 | \r | |
937 | static PROGMEM IRMP_PARAMETER nec_rep_param =\r | |
938 | {\r | |
939 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r | |
940 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
941 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
942 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
943 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
944 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
945 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
946 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
947 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
948 | 0, // address_offset: address offset\r | |
949 | 0, // address_end: end of address\r | |
950 | 0, // command_offset: command offset\r | |
951 | 0, // command_end: end of command\r | |
952 | 0, // complete_len: complete length of frame\r | |
953 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
954 | NEC_LSB, // lsb_first: flag: LSB first\r | |
955 | NEC_FLAGS // flags: some flags\r | |
956 | };\r | |
957 | \r | |
958 | #endif\r | |
959 | \r | |
960 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
961 | \r | |
962 | static PROGMEM IRMP_PARAMETER nec42_param =\r | |
963 | {\r | |
964 | IRMP_NEC42_PROTOCOL, // protocol: ir protocol\r | |
965 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
966 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
967 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
968 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
969 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
970 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
971 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
972 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
973 | NEC42_ADDRESS_OFFSET, // address_offset: address offset\r | |
974 | NEC42_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
975 | NEC42_COMMAND_OFFSET, // command_offset: command offset\r | |
976 | NEC42_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
977 | NEC42_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
978 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
979 | NEC_LSB, // lsb_first: flag: LSB first\r | |
980 | NEC_FLAGS // flags: some flags\r | |
981 | };\r | |
982 | \r | |
983 | #endif\r | |
984 | \r | |
985 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
986 | \r | |
987 | static PROGMEM IRMP_PARAMETER samsung_param =\r | |
988 | {\r | |
989 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol\r | |
990 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
991 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
992 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
993 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
994 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
995 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
996 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
997 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
998 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset\r | |
999 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address\r | |
1000 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset\r | |
1001 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command\r | |
1002 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1003 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1004 | SAMSUNG_LSB, // lsb_first: flag: LSB first\r | |
1005 | SAMSUNG_FLAGS // flags: some flags\r | |
1006 | };\r | |
1007 | \r | |
1008 | #endif\r | |
1009 | \r | |
1010 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
1011 | \r | |
1012 | static PROGMEM IRMP_PARAMETER matsushita_param =\r | |
1013 | {\r | |
1014 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol\r | |
1015 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1016 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1017 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1018 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1019 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1020 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1021 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1022 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1023 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1024 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address\r | |
1025 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset\r | |
1026 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command\r | |
1027 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1028 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1029 | MATSUSHITA_LSB, // lsb_first: flag: LSB first\r | |
1030 | MATSUSHITA_FLAGS // flags: some flags\r | |
1031 | };\r | |
1032 | \r | |
1033 | #endif\r | |
1034 | \r | |
1035 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1036 | \r | |
1037 | static PROGMEM IRMP_PARAMETER kaseikyo_param =\r | |
1038 | {\r | |
1039 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol\r | |
1040 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1041 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1042 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1043 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1044 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1045 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1046 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1047 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1048 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1049 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address\r | |
1050 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset\r | |
1051 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command\r | |
1052 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1053 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1054 | KASEIKYO_LSB, // lsb_first: flag: LSB first\r | |
1055 | KASEIKYO_FLAGS // flags: some flags\r | |
1056 | };\r | |
1057 | \r | |
1058 | #endif\r | |
1059 | \r | |
1060 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
1061 | \r | |
1062 | static PROGMEM IRMP_PARAMETER recs80_param =\r | |
1063 | {\r | |
1064 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol\r | |
1065 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1066 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1067 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1068 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1069 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1070 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1071 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1072 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1073 | RECS80_ADDRESS_OFFSET, // address_offset: address offset\r | |
1074 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address\r | |
1075 | RECS80_COMMAND_OFFSET, // command_offset: command offset\r | |
1076 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command\r | |
1077 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1078 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1079 | RECS80_LSB, // lsb_first: flag: LSB first\r | |
1080 | RECS80_FLAGS // flags: some flags\r | |
1081 | };\r | |
1082 | \r | |
1083 | #endif\r | |
1084 | \r | |
1085 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1086 | \r | |
1087 | static PROGMEM IRMP_PARAMETER rc5_param =\r | |
1088 | {\r | |
1089 | IRMP_RC5_PROTOCOL, // protocol: ir protocol\r | |
1090 | RC5_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1091 | RC5_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1092 | RC5_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1093 | RC5_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1094 | RC5_BIT_LEN_MIN_2, // pulse_0_len_min: here: minimum length of long pulse\r | |
1095 | RC5_BIT_LEN_MAX_2, // pulse_0_len_max: here: maximum length of long pulse\r | |
1096 | RC5_BIT_LEN_MIN_2, // pause_0_len_min: here: minimum length of long pause\r | |
1097 | RC5_BIT_LEN_MAX_2, // pause_0_len_max: here: maximum length of long pause\r | |
1098 | RC5_ADDRESS_OFFSET, // address_offset: address offset\r | |
1099 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address\r | |
1100 | RC5_COMMAND_OFFSET, // command_offset: command offset\r | |
1101 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command\r | |
1102 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1103 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1104 | RC5_LSB, // lsb_first: flag: LSB first\r | |
1105 | RC5_FLAGS // flags: some flags\r | |
1106 | };\r | |
1107 | \r | |
1108 | #endif\r | |
1109 | \r | |
1110 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
1111 | \r | |
1112 | static PROGMEM IRMP_PARAMETER denon_param =\r | |
1113 | {\r | |
1114 | IRMP_DENON_PROTOCOL, // protocol: ir protocol\r | |
1115 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1116 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1117 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1118 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1119 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1120 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1121 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1122 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1123 | DENON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1124 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address\r | |
1125 | DENON_COMMAND_OFFSET, // command_offset: command offset\r | |
1126 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command\r | |
1127 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1128 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1129 | DENON_LSB, // lsb_first: flag: LSB first\r | |
1130 | DENON_FLAGS // flags: some flags\r | |
1131 | };\r | |
1132 | \r | |
1133 | #endif\r | |
1134 | \r | |
1135 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
1136 | \r | |
1137 | static PROGMEM IRMP_PARAMETER rc6_param =\r | |
1138 | {\r | |
1139 | IRMP_RC6_PROTOCOL, // protocol: ir protocol\r | |
1140 | \r | |
1141 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1142 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1143 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1144 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1145 | RC6_BIT_PULSE_LEN_MIN_2, // pulse_0_len_min: here: minimum length of long pulse\r | |
1146 | RC6_BIT_PULSE_LEN_MAX_2, // pulse_0_len_max: here: maximum length of long pulse\r | |
1147 | RC6_BIT_PAUSE_LEN_MIN_2, // pause_0_len_min: here: minimum length of long pause\r | |
1148 | RC6_BIT_PAUSE_LEN_MAX_2, // pause_0_len_max: here: maximum length of long pause\r | |
1149 | RC6_ADDRESS_OFFSET, // address_offset: address offset\r | |
1150 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address\r | |
1151 | RC6_COMMAND_OFFSET, // command_offset: command offset\r | |
1152 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command\r | |
1153 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame\r | |
1154 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1155 | RC6_LSB, // lsb_first: flag: LSB first\r | |
1156 | RC6_FLAGS // flags: some flags\r | |
1157 | };\r | |
1158 | \r | |
1159 | #endif\r | |
1160 | \r | |
1161 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1162 | \r | |
1163 | static PROGMEM IRMP_PARAMETER recs80ext_param =\r | |
1164 | {\r | |
1165 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol\r | |
1166 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1167 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1168 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1169 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1170 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1171 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1172 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1173 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1174 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1175 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address\r | |
1176 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset\r | |
1177 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command\r | |
1178 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1179 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1180 | RECS80EXT_LSB, // lsb_first: flag: LSB first\r | |
1181 | RECS80EXT_FLAGS // flags: some flags\r | |
1182 | };\r | |
1183 | \r | |
1184 | #endif\r | |
1185 | \r | |
1186 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
1187 | \r | |
1188 | static PROGMEM IRMP_PARAMETER nubert_param =\r | |
1189 | {\r | |
1190 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol\r | |
1191 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1192 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1193 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1194 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1195 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1196 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1197 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1198 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1199 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1200 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address\r | |
1201 | NUBERT_COMMAND_OFFSET, // command_offset: command offset\r | |
1202 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command\r | |
1203 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1204 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1205 | NUBERT_LSB, // lsb_first: flag: LSB first\r | |
1206 | NUBERT_FLAGS // flags: some flags\r | |
1207 | };\r | |
1208 | \r | |
1209 | #endif\r | |
1210 | \r | |
1211 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
1212 | \r | |
1213 | static PROGMEM IRMP_PARAMETER bang_olufsen_param =\r | |
1214 | {\r | |
1215 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol\r | |
1216 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1217 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1218 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1219 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1220 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1221 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1222 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1223 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1224 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1225 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address\r | |
1226 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1227 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command\r | |
1228 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1229 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1230 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first\r | |
1231 | BANG_OLUFSEN_FLAGS // flags: some flags\r | |
1232 | };\r | |
1233 | \r | |
1234 | #endif\r | |
1235 | \r | |
1236 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r | |
1237 | \r | |
1238 | static uint8_t first_bit;\r | |
1239 | \r | |
1240 | static PROGMEM IRMP_PARAMETER grundig_param =\r | |
1241 | {\r | |
1242 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol\r | |
1243 | \r | |
1244 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1245 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1246 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1247 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1248 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN_2, // pulse_0_len_min: here: minimum length of long pulse\r | |
1249 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX_2, // pulse_0_len_max: here: maximum length of long pulse\r | |
1250 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN_2, // pause_0_len_min: here: minimum length of long pause\r | |
1251 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX_2, // pause_0_len_max: here: maximum length of long pause\r | |
1252 | \r | |
1253 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset\r | |
1254 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address\r | |
1255 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset\r | |
1256 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!)\r | |
1257 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG!\r | |
1258 | GRUNDIG_NOKIA_IR60_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1259 | GRUNDIG_NOKIA_IR60_LSB, // lsb_first: flag: LSB first\r | |
1260 | GRUNDIG_NOKIA_IR60_FLAGS // flags: some flags\r | |
1261 | };\r | |
1262 | \r | |
1263 | #endif\r | |
1264 | \r | |
1265 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r | |
1266 | \r | |
1267 | static PROGMEM IRMP_PARAMETER ruwido_param =\r | |
1268 | {\r | |
1269 | IRMP_RUWIDO_PROTOCOL, // protocol: ir protocol\r | |
1270 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1271 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1272 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1273 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1274 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN_2, // pulse_0_len_min: here: minimum length of long pulse\r | |
1275 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX_2, // pulse_0_len_max: here: maximum length of long pulse\r | |
1276 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN_2, // pause_0_len_min: here: minimum length of long pause\r | |
1277 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX_2, // pause_0_len_max: here: maximum length of long pause\r | |
1278 | RUWIDO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1279 | RUWIDO_ADDRESS_OFFSET + RUWIDO_ADDRESS_LEN, // address_end: end of address\r | |
1280 | RUWIDO_COMMAND_OFFSET, // command_offset: command offset\r | |
1281 | RUWIDO_COMMAND_OFFSET + RUWIDO_COMMAND_LEN, // command_end: end of command\r | |
1282 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: SIEMENS instead of RUWIDO!\r | |
1283 | SIEMENS_OR_RUWIDO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1284 | SIEMENS_OR_RUWIDO_LSB, // lsb_first: flag: LSB first\r | |
1285 | SIEMENS_OR_RUWIDO_FLAGS // flags: some flags\r | |
1286 | };\r | |
1287 | \r | |
1288 | #endif\r | |
1289 | \r | |
1290 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
1291 | \r | |
1292 | static PROGMEM IRMP_PARAMETER fdc_param =\r | |
1293 | {\r | |
1294 | IRMP_FDC_PROTOCOL, // protocol: ir protocol\r | |
1295 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1296 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1297 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1298 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1299 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1300 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1301 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1302 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1303 | FDC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1304 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r | |
1305 | FDC_COMMAND_OFFSET, // command_offset: command offset\r | |
1306 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r | |
1307 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1308 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1309 | FDC_LSB, // lsb_first: flag: LSB first\r | |
1310 | FDC_FLAGS // flags: some flags\r | |
1311 | };\r | |
1312 | \r | |
1313 | #endif\r | |
1314 | \r | |
1315 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
1316 | \r | |
1317 | static PROGMEM IRMP_PARAMETER rccar_param =\r | |
1318 | {\r | |
1319 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r | |
1320 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1321 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1322 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1323 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1324 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1325 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1326 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1327 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1328 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1329 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r | |
1330 | RCCAR_COMMAND_OFFSET, // command_offset: command offset\r | |
1331 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r | |
1332 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1333 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1334 | RCCAR_LSB, // lsb_first: flag: LSB first\r | |
1335 | RCCAR_FLAGS // flags: some flags\r | |
1336 | };\r | |
1337 | \r | |
1338 | #endif\r | |
1339 | \r | |
1340 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r | |
1341 | \r | |
1342 | static PROGMEM IRMP_PARAMETER nikon_param =\r | |
1343 | {\r | |
1344 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol\r | |
1345 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1346 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1347 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1348 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1349 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1350 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1351 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1352 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1353 | NIKON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1354 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address\r | |
1355 | NIKON_COMMAND_OFFSET, // command_offset: command offset\r | |
1356 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command\r | |
1357 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1358 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1359 | NIKON_LSB, // lsb_first: flag: LSB first\r | |
1360 | NIKON_FLAGS // flags: some flags\r | |
1361 | };\r | |
1362 | \r | |
1363 | #endif\r | |
1364 | \r | |
1365 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r | |
1366 | \r | |
1367 | static PROGMEM IRMP_PARAMETER kathrein_param =\r | |
1368 | {\r | |
1369 | IRMP_KATHREIN_PROTOCOL, // protocol: ir protocol\r | |
1370 | KATHREIN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1371 | KATHREIN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1372 | KATHREIN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1373 | KATHREIN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1374 | KATHREIN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1375 | KATHREIN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1376 | KATHREIN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1377 | KATHREIN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1378 | KATHREIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1379 | KATHREIN_ADDRESS_OFFSET + KATHREIN_ADDRESS_LEN, // address_end: end of address\r | |
1380 | KATHREIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1381 | KATHREIN_COMMAND_OFFSET + KATHREIN_COMMAND_LEN, // command_end: end of command\r | |
1382 | KATHREIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1383 | KATHREIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1384 | KATHREIN_LSB, // lsb_first: flag: LSB first\r | |
1385 | KATHREIN_FLAGS // flags: some flags\r | |
1386 | };\r | |
1387 | \r | |
1388 | #endif\r | |
1389 | \r | |
1390 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r | |
1391 | \r | |
1392 | static PROGMEM IRMP_PARAMETER netbox_param =\r | |
1393 | {\r | |
1394 | IRMP_NETBOX_PROTOCOL, // protocol: ir protocol\r | |
1395 | NETBOX_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1, here: exact value\r | |
1396 | NETBOX_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1, here: rest value\r | |
1397 | NETBOX_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1, here: exact value\r | |
1398 | NETBOX_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1, here: rest value\r | |
1399 | NETBOX_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0, here: exact value\r | |
1400 | NETBOX_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0, here: rest value\r | |
1401 | NETBOX_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0, here: exact value\r | |
1402 | NETBOX_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0, here: rest value\r | |
1403 | NETBOX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1404 | NETBOX_ADDRESS_OFFSET + NETBOX_ADDRESS_LEN, // address_end: end of address\r | |
1405 | NETBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1406 | NETBOX_COMMAND_OFFSET + NETBOX_COMMAND_LEN, // command_end: end of command\r | |
1407 | NETBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1408 | NETBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1409 | NETBOX_LSB, // lsb_first: flag: LSB first\r | |
1410 | NETBOX_FLAGS // flags: some flags\r | |
1411 | };\r | |
1412 | \r | |
1413 | #endif\r | |
1414 | \r | |
1415 | #if IRMP_SUPPORT_IMON_PROTOCOL == 1\r | |
1416 | \r | |
1417 | static PROGMEM IRMP_PARAMETER imon_param =\r | |
1418 | {\r | |
1419 | IRMP_IMON_PROTOCOL, // protocol: ir protocol\r | |
1420 | IMON_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1421 | IMON_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1422 | IMON_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1423 | IMON_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1424 | IMON_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1425 | IMON_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1426 | IMON_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1427 | IMON_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1428 | IMON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1429 | IMON_ADDRESS_OFFSET + IMON_ADDRESS_LEN, // address_end: end of address\r | |
1430 | IMON_COMMAND_OFFSET, // command_offset: command offset\r | |
1431 | IMON_COMMAND_OFFSET + IMON_COMMAND_LEN, // command_end: end of command\r | |
1432 | IMON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1433 | IMON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1434 | IMON_LSB, // lsb_first: flag: LSB first\r | |
1435 | IMON_FLAGS // flags: some flags\r | |
1436 | };\r | |
1437 | \r | |
1438 | #endif\r | |
1439 | \r | |
1440 | static uint8_t irmp_bit; // current bit position\r | |
1441 | static IRMP_PARAMETER irmp_param;\r | |
1442 | \r | |
1443 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
1444 | static IRMP_PARAMETER irmp_param2;\r | |
1445 | #endif\r | |
1446 | \r | |
1447 | static volatile uint8_t irmp_ir_detected;\r | |
1448 | static volatile uint8_t irmp_protocol;\r | |
1449 | static volatile uint16_t irmp_address;\r | |
1450 | static volatile uint16_t irmp_command;\r | |
1451 | static volatile uint16_t irmp_id; // only used for SAMSUNG protocol\r | |
1452 | static volatile uint8_t irmp_flags;\r | |
1453 | \r | |
1454 | #ifdef ANALYZE\r | |
1455 | static uint8_t IRMP_PIN;\r | |
1456 | #endif\r | |
1457 | \r | |
1458 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1459 | * Initialize IRMP decoder\r | |
1460 | * @details Configures IRMP input pin\r | |
1461 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1462 | */\r | |
1463 | #ifndef ANALYZE\r | |
1464 | void\r | |
1465 | irmp_init (void)\r | |
1466 | {\r | |
1467 | #ifndef PIC_CCS_COMPILER\r | |
1468 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r | |
1469 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r | |
1470 | #endif // PIC_CCS_COMPILER\r | |
1471 | \r | |
1472 | #if IRMP_LOGGING == 1\r | |
1473 | irmp_uart_init ();\r | |
1474 | #endif\r | |
1475 | }\r | |
1476 | #endif\r | |
1477 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1478 | * Get IRMP data\r | |
1479 | * @details gets decoded IRMP data\r | |
1480 | * @param pointer in order to store IRMP data\r | |
1481 | * @return TRUE: successful, FALSE: failed\r | |
1482 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1483 | */\r | |
1484 | uint8_t\r | |
1485 | irmp_get_data (IRMP_DATA * irmp_data_p)\r | |
1486 | {\r | |
1487 | uint8_t rtc = FALSE;\r | |
1488 | \r | |
1489 | if (irmp_ir_detected)\r | |
1490 | {\r | |
1491 | switch (irmp_protocol)\r | |
1492 | {\r | |
1493 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1494 | case IRMP_SAMSUNG_PROTOCOL:\r | |
1495 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1496 | {\r | |
1497 | irmp_command &= 0xff;\r | |
1498 | irmp_command |= irmp_id << 8;\r | |
1499 | rtc = TRUE;\r | |
1500 | }\r | |
1501 | break;\r | |
1502 | #endif\r | |
1503 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1504 | case IRMP_NEC_PROTOCOL:\r | |
1505 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1506 | {\r | |
1507 | irmp_command &= 0xff;\r | |
1508 | rtc = TRUE;\r | |
1509 | }\r | |
1510 | else if (irmp_address == 0x87EE)\r | |
1511 | {\r | |
1512 | ANALYZE_PRINTF ("Switching to APPLE protocol\n");\r | |
1513 | irmp_protocol = IRMP_APPLE_PROTOCOL;\r | |
1514 | irmp_address = (irmp_command & 0xFF00) >> 8;\r | |
1515 | irmp_command &= 0x00FF;\r | |
1516 | rtc = TRUE;\r | |
1517 | }\r | |
1518 | break;\r | |
1519 | #endif\r | |
1520 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r | |
1521 | case IRMP_SIEMENS_PROTOCOL:\r | |
1522 | case IRMP_RUWIDO_PROTOCOL:\r | |
1523 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001))\r | |
1524 | {\r | |
1525 | irmp_command >>= 1;\r | |
1526 | rtc = TRUE;\r | |
1527 | }\r | |
1528 | break;\r | |
1529 | #endif\r | |
1530 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r | |
1531 | case IRMP_KATHREIN_PROTOCOL:\r | |
1532 | if (irmp_command != 0x0000)\r | |
1533 | {\r | |
1534 | rtc = TRUE;\r | |
1535 | }\r | |
1536 | break;\r | |
1537 | #endif\r | |
1538 | #if IRMP_SUPPORT_IR60_PROTOCOL == 1\r | |
1539 | case IRMP_IR60_PROTOCOL:\r | |
1540 | if (irmp_command != 0x007d) // 0x007d (== 62<<1 + 1) is start instruction frame\r | |
1541 | {\r | |
1542 | rtc = TRUE;\r | |
1543 | }\r | |
1544 | break;\r | |
1545 | #endif\r | |
1546 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
1547 | case IRMP_RCCAR_PROTOCOL:\r | |
1548 | // frame in irmp_data:\r | |
1549 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0\r | |
1550 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0\r | |
1551 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0\r | |
1552 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0\r | |
1553 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0\r | |
1554 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0\r | |
1555 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0\r | |
1556 | break;\r | |
1557 | #endif\r | |
1558 | #if 1 // squeeze code to 8 bit, upper bit indicates release-key\r | |
1559 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r | |
1560 | case IRMP_NETBOX_PROTOCOL:\r | |
1561 | if (irmp_command & 0x1000) // last bit set?\r | |
1562 | {\r | |
1563 | if ((irmp_command & 0x1f) == 0x15) // key pressed: 101 01 (LSB)\r | |
1564 | {\r | |
1565 | irmp_command >>= 5;\r | |
1566 | irmp_command &= 0x7F;\r | |
1567 | rtc = TRUE;\r | |
1568 | }\r | |
1569 | else if ((irmp_command & 0x1f) == 0x10) // key released: 000 01 (LSB)\r | |
1570 | {\r | |
1571 | irmp_command >>= 5;\r | |
1572 | irmp_command |= 0x80;\r | |
1573 | rtc = TRUE;\r | |
1574 | }\r | |
1575 | else\r | |
1576 | {\r | |
1577 | ANALYZE_PRINTF("error NETBOX: bit6/7 must be 0/1\n");\r | |
1578 | }\r | |
1579 | }\r | |
1580 | else\r | |
1581 | {\r | |
1582 | ANALYZE_PRINTF("error NETBOX: last bit not set\n");\r | |
1583 | }\r | |
1584 | break;\r | |
1585 | #endif\r | |
1586 | #endif // 0\r | |
1587 | default:\r | |
1588 | rtc = TRUE;\r | |
1589 | }\r | |
1590 | \r | |
1591 | if (rtc)\r | |
1592 | {\r | |
1593 | irmp_data_p->protocol = irmp_protocol;\r | |
1594 | irmp_data_p->address = irmp_address;\r | |
1595 | irmp_data_p->command = irmp_command;\r | |
1596 | irmp_data_p->flags = irmp_flags;\r | |
1597 | irmp_command = 0;\r | |
1598 | irmp_address = 0;\r | |
1599 | irmp_flags = 0;\r | |
1600 | }\r | |
1601 | \r | |
1602 | irmp_ir_detected = FALSE;\r | |
1603 | }\r | |
1604 | \r | |
1605 | return rtc;\r | |
1606 | }\r | |
1607 | \r | |
1608 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()\r | |
1609 | static uint16_t irmp_tmp_address; // ir address\r | |
1610 | static uint16_t irmp_tmp_command; // ir command\r | |
1611 | \r | |
1612 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
1613 | static uint16_t irmp_tmp_address2; // ir address\r | |
1614 | static uint16_t irmp_tmp_command2; // ir command\r | |
1615 | #endif\r | |
1616 | \r | |
1617 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1618 | static uint16_t irmp_tmp_id; // ir id (only SAMSUNG)\r | |
1619 | #endif\r | |
1620 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1621 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits\r | |
1622 | #endif\r | |
1623 | \r | |
1624 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1625 | * store bit\r | |
1626 | * @details store bit in temp address or temp command\r | |
1627 | * @param value to store: 0 or 1\r | |
1628 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1629 | */\r | |
1630 | // verhindert, dass irmp_store_bit() inline compiliert wird:\r | |
1631 | // static void irmp_store_bit (uint8_t) __attribute__ ((noinline));\r | |
1632 | \r | |
1633 | static void\r | |
1634 | irmp_store_bit (uint8_t value)\r | |
1635 | {\r | |
1636 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r | |
1637 | if (irmp_bit == 0 && irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL)\r | |
1638 | {\r | |
1639 | first_bit = value;\r | |
1640 | }\r | |
1641 | else\r | |
1642 | #endif\r | |
1643 | \r | |
1644 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end)\r | |
1645 | {\r | |
1646 | if (irmp_param.lsb_first)\r | |
1647 | {\r | |
1648 | irmp_tmp_address |= (((uint16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast\r | |
1649 | }\r | |
1650 | else\r | |
1651 | {\r | |
1652 | irmp_tmp_address <<= 1;\r | |
1653 | irmp_tmp_address |= value;\r | |
1654 | }\r | |
1655 | }\r | |
1656 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end)\r | |
1657 | {\r | |
1658 | if (irmp_param.lsb_first)\r | |
1659 | {\r | |
1660 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast\r | |
1661 | }\r | |
1662 | else\r | |
1663 | {\r | |
1664 | irmp_tmp_command <<= 1;\r | |
1665 | irmp_tmp_command |= value;\r | |
1666 | }\r | |
1667 | }\r | |
1668 | \r | |
1669 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
1670 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit >= 13 && irmp_bit < 26)\r | |
1671 | {\r | |
1672 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit - 13)); // CV wants cast\r | |
1673 | }\r | |
1674 | #endif\r | |
1675 | \r | |
1676 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1677 | else if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN)\r | |
1678 | {\r | |
1679 | irmp_tmp_id |= (((uint16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first\r | |
1680 | }\r | |
1681 | #endif\r | |
1682 | \r | |
1683 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1684 | else if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && irmp_bit >= 20 && irmp_bit < 24)\r | |
1685 | {\r | |
1686 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - 8)); // store 4 system bits in upper nibble with LSB first\r | |
1687 | }\r | |
1688 | \r | |
1689 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && irmp_bit < KASEIKYO_COMPLETE_DATA_LEN)\r | |
1690 | {\r | |
1691 | if (value)\r | |
1692 | {\r | |
1693 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8);\r | |
1694 | }\r | |
1695 | else\r | |
1696 | {\r | |
1697 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8));\r | |
1698 | }\r | |
1699 | }\r | |
1700 | \r | |
1701 | #endif\r | |
1702 | \r | |
1703 | irmp_bit++;\r | |
1704 | }\r | |
1705 | \r | |
1706 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1707 | * store bit\r | |
1708 | * @details store bit in temp address or temp command\r | |
1709 | * @param value to store: 0 or 1\r | |
1710 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1711 | */\r | |
1712 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
1713 | static void\r | |
1714 | irmp_store_bit2 (uint8_t value)\r | |
1715 | {\r | |
1716 | uint8_t irmp_bit2;\r | |
1717 | \r | |
1718 | if (irmp_param.protocol)\r | |
1719 | {\r | |
1720 | irmp_bit2 = irmp_bit - 2;\r | |
1721 | }\r | |
1722 | else\r | |
1723 | {\r | |
1724 | irmp_bit2 = irmp_bit - 1;\r | |
1725 | }\r | |
1726 | \r | |
1727 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end)\r | |
1728 | {\r | |
1729 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast\r | |
1730 | }\r | |
1731 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end)\r | |
1732 | {\r | |
1733 | irmp_tmp_command2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast\r | |
1734 | }\r | |
1735 | }\r | |
1736 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
1737 | \r | |
1738 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1739 | * ISR routine\r | |
1740 | * @details ISR routine, called 10000 times per second\r | |
1741 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1742 | */\r | |
1743 | uint8_t\r | |
1744 | irmp_ISR (void)\r | |
1745 | {\r | |
1746 | static uint8_t irmp_start_bit_detected; // flag: start bit detected\r | |
1747 | static uint8_t wait_for_space; // flag: wait for data bit space\r | |
1748 | static uint8_t wait_for_start_space; // flag: wait for start bit space\r | |
1749 | static uint8_t irmp_pulse_time; // count bit time for pulse\r | |
1750 | static PAUSE_LEN irmp_pause_time; // count bit time for pause\r | |
1751 | static uint16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition\r | |
1752 | static uint16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition\r | |
1753 | static uint16_t repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause\r | |
1754 | static uint8_t repetition_frame_number;\r | |
1755 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
1756 | static uint16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition\r | |
1757 | #endif\r | |
1758 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1759 | static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r | |
1760 | #endif\r | |
1761 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
1762 | static PAUSE_LEN last_pause; // last pause value\r | |
1763 | #endif\r | |
1764 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
1765 | static uint8_t last_value; // last bit value\r | |
1766 | #endif\r | |
1767 | uint8_t irmp_input; // input value\r | |
1768 | \r | |
1769 | #ifdef ANALYZE\r | |
1770 | time_counter++;\r | |
1771 | #endif\r | |
1772 | \r | |
1773 | irmp_input = input(IRMP_PIN);\r | |
1774 | \r | |
1775 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined\r | |
1776 | \r | |
1777 | if (! irmp_ir_detected) // ir code already detected?\r | |
1778 | { // no...\r | |
1779 | if (! irmp_start_bit_detected) // start bit detected?\r | |
1780 | { // no...\r | |
1781 | if (! irmp_input) // receiving burst?\r | |
1782 | { // yes...\r | |
1783 | #ifdef ANALYZE\r | |
1784 | if (! irmp_pulse_time)\r | |
1785 | {\r | |
1786 | ANALYZE_PRINTF("%8d [starting pulse]\n", time_counter);\r | |
1787 | }\r | |
1788 | #endif\r | |
1789 | irmp_pulse_time++; // increment counter\r | |
1790 | }\r | |
1791 | else\r | |
1792 | { // no...\r | |
1793 | if (irmp_pulse_time) // it's dark....\r | |
1794 | { // set flags for counting the time of darkness...\r | |
1795 | irmp_start_bit_detected = 1;\r | |
1796 | wait_for_start_space = 1;\r | |
1797 | wait_for_space = 0;\r | |
1798 | irmp_tmp_command = 0;\r | |
1799 | irmp_tmp_address = 0;\r | |
1800 | \r | |
1801 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
1802 | irmp_tmp_command2 = 0;\r | |
1803 | irmp_tmp_address2 = 0;\r | |
1804 | #endif\r | |
1805 | \r | |
1806 | irmp_bit = 0xff;\r | |
1807 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0!\r | |
1808 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1809 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame!\r | |
1810 | #endif\r | |
1811 | }\r | |
1812 | else\r | |
1813 | {\r | |
1814 | if (repetition_len < 0xFFFF) // avoid overflow of counter\r | |
1815 | {\r | |
1816 | repetition_len++;\r | |
1817 | }\r | |
1818 | }\r | |
1819 | }\r | |
1820 | }\r | |
1821 | else\r | |
1822 | {\r | |
1823 | if (wait_for_start_space) // we have received start bit...\r | |
1824 | { // ...and are counting the time of darkness\r | |
1825 | if (irmp_input) // still dark?\r | |
1826 | { // yes\r | |
1827 | irmp_pause_time++; // increment counter\r | |
1828 | \r | |
1829 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r | |
1830 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) ||\r | |
1831 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN)\r | |
1832 | #else\r | |
1833 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r | |
1834 | #endif\r | |
1835 | { // yes...\r | |
1836 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
1837 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below!\r | |
1838 | {\r | |
1839 | ;\r | |
1840 | }\r | |
1841 | else\r | |
1842 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
1843 | {\r | |
1844 | ANALYZE_PRINTF ("%8d error 1: pause after start bit pulse %d too long: %d\n", time_counter, irmp_pulse_time, irmp_pause_time);\r | |
1845 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1846 | }\r | |
1847 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r | |
1848 | irmp_pulse_time = 0;\r | |
1849 | irmp_pause_time = 0;\r | |
1850 | }\r | |
1851 | }\r | |
1852 | else\r | |
1853 | { // receiving first data pulse!\r | |
1854 | IRMP_PARAMETER * irmp_param_p = (IRMP_PARAMETER *) 0;\r | |
1855 | \r | |
1856 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
1857 | irmp_param2.protocol = 0;\r | |
1858 | #endif\r | |
1859 | \r | |
1860 | ANALYZE_PRINTF ("%8d [start-bit: pulse = %2d, pause = %2d]\n", time_counter, irmp_pulse_time, irmp_pause_time);\r | |
1861 | \r | |
1862 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1863 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX &&\r | |
1864 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX)\r | |
1865 | { // it's SIRCS\r | |
1866 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1867 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX,\r | |
1868 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX);\r | |
1869 | irmp_param_p = (IRMP_PARAMETER *) (IRMP_PARAMETER *) &sircs_param;\r | |
1870 | }\r | |
1871 | else\r | |
1872 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1873 | \r | |
1874 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
1875 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r | |
1876 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX &&\r | |
1877 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
1878 | {\r | |
1879 | ANALYZE_PRINTF ("protocol = NEC or JVC repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1880 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX,\r | |
1881 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1882 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
1883 | }\r | |
1884 | else\r | |
1885 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
1886 | \r | |
1887 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1888 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
1889 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
1890 | {\r | |
1891 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
1892 | ANALYZE_PRINTF ("protocol = NEC42, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1893 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
1894 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1895 | irmp_param_p = (IRMP_PARAMETER *) &nec42_param;\r | |
1896 | #else\r | |
1897 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1898 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
1899 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1900 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
1901 | #endif\r | |
1902 | \r | |
1903 | }\r | |
1904 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
1905 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
1906 | { // it's NEC\r | |
1907 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1908 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
1909 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1910 | \r | |
1911 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param;\r | |
1912 | }\r | |
1913 | else\r | |
1914 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1915 | \r | |
1916 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r | |
1917 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX &&\r | |
1918 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX)\r | |
1919 | {\r | |
1920 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1921 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX,\r | |
1922 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX);\r | |
1923 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param;\r | |
1924 | }\r | |
1925 | else\r | |
1926 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1\r | |
1927 | \r | |
1928 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1929 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX &&\r | |
1930 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
1931 | { // it's SAMSUNG\r | |
1932 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1933 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX,\r | |
1934 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX);\r | |
1935 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param;\r | |
1936 | }\r | |
1937 | else\r | |
1938 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1939 | \r | |
1940 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
1941 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX &&\r | |
1942 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX)\r | |
1943 | { // it's MATSUSHITA\r | |
1944 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1945 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX,\r | |
1946 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX);\r | |
1947 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param;\r | |
1948 | }\r | |
1949 | else\r | |
1950 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
1951 | \r | |
1952 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1953 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX &&\r | |
1954 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX)\r | |
1955 | { // it's KASEIKYO\r | |
1956 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1957 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX,\r | |
1958 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX);\r | |
1959 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param;\r | |
1960 | }\r | |
1961 | else\r | |
1962 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1963 | \r | |
1964 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
1965 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX &&\r | |
1966 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX)\r | |
1967 | { // it's RECS80\r | |
1968 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1969 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX,\r | |
1970 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX);\r | |
1971 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param;\r | |
1972 | }\r | |
1973 | else\r | |
1974 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
1975 | \r | |
1976 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1977 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) ||\r | |
1978 | (irmp_pulse_time >= RC5_START_BIT_LEN_MIN_2 && irmp_pulse_time <= RC5_START_BIT_LEN_MAX_2)) &&\r | |
1979 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) ||\r | |
1980 | (irmp_pause_time >= RC5_START_BIT_LEN_MIN_2 && irmp_pause_time <= RC5_START_BIT_LEN_MAX_2)))\r | |
1981 | { // it's RC5\r | |
1982 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
1983 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r | |
1984 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
1985 | {\r | |
1986 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n");\r | |
1987 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1988 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
1989 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
1990 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
1991 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
1992 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
1993 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER));\r | |
1994 | }\r | |
1995 | else\r | |
1996 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
1997 | \r | |
1998 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
1999 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r | |
2000 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
2001 | {\r | |
2002 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n");\r | |
2003 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2004 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
2005 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
2006 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2007 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2008 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
2009 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER));\r | |
2010 | }\r | |
2011 | else\r | |
2012 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2013 | {\r | |
2014 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2015 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2016 | RC5_START_BIT_LEN_MIN_2, RC5_START_BIT_LEN_MAX_2,\r | |
2017 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2018 | RC5_START_BIT_LEN_MIN_2, RC5_START_BIT_LEN_MAX_2);\r | |
2019 | }\r | |
2020 | \r | |
2021 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param;\r | |
2022 | last_pause = irmp_pause_time;\r | |
2023 | \r | |
2024 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= RC5_START_BIT_LEN_MAX_2) ||\r | |
2025 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= RC5_START_BIT_LEN_MAX_2))\r | |
2026 | {\r | |
2027 | last_value = 0;\r | |
2028 | rc5_cmd_bit6 = 1<<6;\r | |
2029 | }\r | |
2030 | else\r | |
2031 | {\r | |
2032 | last_value = 1;\r | |
2033 | }\r | |
2034 | }\r | |
2035 | else\r | |
2036 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
2037 | \r | |
2038 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2039 | if ( (irmp_pulse_time >= DENON_PULSE_LEN_MIN && irmp_pulse_time <= DENON_PULSE_LEN_MAX) &&\r | |
2040 | ((irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX) ||\r | |
2041 | (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)))\r | |
2042 | { // it's DENON\r | |
2043 | ANALYZE_PRINTF ("protocol = DENON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
2044 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
2045 | DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX,\r | |
2046 | DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX);\r | |
2047 | irmp_param_p = (IRMP_PARAMETER *) &denon_param;\r | |
2048 | }\r | |
2049 | else\r | |
2050 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2051 | \r | |
2052 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2053 | if (irmp_pulse_time >= RC6_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RC6_START_BIT_PULSE_LEN_MAX &&\r | |
2054 | irmp_pause_time >= RC6_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RC6_START_BIT_PAUSE_LEN_MAX)\r | |
2055 | { // it's RC6\r | |
2056 | ANALYZE_PRINTF ("protocol = RC6, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2057 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX,\r | |
2058 | RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX);\r | |
2059 | irmp_param_p = (IRMP_PARAMETER *) &rc6_param;\r | |
2060 | last_pause = 0;\r | |
2061 | last_value = 1;\r | |
2062 | }\r | |
2063 | else\r | |
2064 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2065 | \r | |
2066 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
2067 | if (irmp_pulse_time >= RECS80EXT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80EXT_START_BIT_PULSE_LEN_MAX &&\r | |
2068 | irmp_pause_time >= RECS80EXT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80EXT_START_BIT_PAUSE_LEN_MAX)\r | |
2069 | { // it's RECS80EXT\r | |
2070 | ANALYZE_PRINTF ("protocol = RECS80EXT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2071 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX,\r | |
2072 | RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX);\r | |
2073 | irmp_param_p = (IRMP_PARAMETER *) &recs80ext_param;\r | |
2074 | }\r | |
2075 | else\r | |
2076 | #endif // IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
2077 | \r | |
2078 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
2079 | if (irmp_pulse_time >= NUBERT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NUBERT_START_BIT_PULSE_LEN_MAX &&\r | |
2080 | irmp_pause_time >= NUBERT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NUBERT_START_BIT_PAUSE_LEN_MAX)\r | |
2081 | { // it's NUBERT\r | |
2082 | ANALYZE_PRINTF ("protocol = NUBERT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2083 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX,\r | |
2084 | NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX);\r | |
2085 | irmp_param_p = (IRMP_PARAMETER *) &nubert_param;\r | |
2086 | }\r | |
2087 | else\r | |
2088 | #endif // IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
2089 | \r | |
2090 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
2091 | if (irmp_pulse_time >= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX &&\r | |
2092 | irmp_pause_time >= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX)\r | |
2093 | { // it's BANG_OLUFSEN\r | |
2094 | ANALYZE_PRINTF ("protocol = BANG_OLUFSEN\n");\r | |
2095 | ANALYZE_PRINTF ("start bit 1 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2096 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
2097 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
2098 | ANALYZE_PRINTF ("start bit 2 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2099 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
2100 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
2101 | ANALYZE_PRINTF ("start bit 3 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2102 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
2103 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
2104 | ANALYZE_PRINTF ("start bit 4 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2105 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
2106 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
2107 | irmp_param_p = (IRMP_PARAMETER *) &bang_olufsen_param;\r | |
2108 | last_value = 0;\r | |
2109 | }\r | |
2110 | else\r | |
2111 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
2112 | \r | |
2113 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r | |
2114 | if (irmp_pulse_time >= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN && irmp_pulse_time <= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX &&\r | |
2115 | irmp_pause_time >= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX)\r | |
2116 | { // it's GRUNDIG\r | |
2117 | ANALYZE_PRINTF ("protocol = GRUNDIG, pre bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2118 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r | |
2119 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX);\r | |
2120 | irmp_param_p = (IRMP_PARAMETER *) &grundig_param;\r | |
2121 | last_pause = irmp_pause_time;\r | |
2122 | last_value = 1;\r | |
2123 | }\r | |
2124 | else\r | |
2125 | #endif // IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r | |
2126 | \r | |
2127 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r | |
2128 | if (((irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX) ||\r | |
2129 | (irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN_2 && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX_2)) &&\r | |
2130 | ((irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX) || \r | |
2131 | (irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN_2 && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX_2)))\r | |
2132 | { // it's RUWIDO or SIEMENS\r | |
2133 | ANALYZE_PRINTF ("protocol = RUWIDO, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
2134 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
2135 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN_2, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX_2,\r | |
2136 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
2137 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN_2, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX_2);\r | |
2138 | irmp_param_p = (IRMP_PARAMETER *) &ruwido_param;\r | |
2139 | last_pause = irmp_pause_time;\r | |
2140 | last_value = 1;\r | |
2141 | }\r | |
2142 | else\r | |
2143 | #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r | |
2144 | \r | |
2145 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
2146 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r | |
2147 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
2148 | {\r | |
2149 | ANALYZE_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2150 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
2151 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
2152 | irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r | |
2153 | }\r | |
2154 | else\r | |
2155 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
2156 | \r | |
2157 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2158 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r | |
2159 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
2160 | {\r | |
2161 | ANALYZE_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2162 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
2163 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
2164 | irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r | |
2165 | }\r | |
2166 | else\r | |
2167 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2168 | \r | |
2169 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r | |
2170 | if (irmp_pulse_time >= KATHREIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_START_BIT_PULSE_LEN_MAX &&\r | |
2171 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)\r | |
2172 | { // it's KATHREIN\r | |
2173 | ANALYZE_PRINTF ("protocol = KATHREIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2174 | KATHREIN_START_BIT_PULSE_LEN_MIN, KATHREIN_START_BIT_PULSE_LEN_MAX,\r | |
2175 | KATHREIN_START_BIT_PAUSE_LEN_MIN, KATHREIN_START_BIT_PAUSE_LEN_MAX);\r | |
2176 | irmp_param_p = (IRMP_PARAMETER *) &kathrein_param;\r | |
2177 | }\r | |
2178 | else\r | |
2179 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r | |
2180 | \r | |
2181 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r | |
2182 | if (irmp_pulse_time >= NETBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NETBOX_START_BIT_PULSE_LEN_MAX &&\r | |
2183 | irmp_pause_time >= NETBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NETBOX_START_BIT_PAUSE_LEN_MAX)\r | |
2184 | { // it's NETBOX\r | |
2185 | ANALYZE_PRINTF ("protocol = NETBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2186 | NETBOX_START_BIT_PULSE_LEN_MIN, NETBOX_START_BIT_PULSE_LEN_MAX,\r | |
2187 | NETBOX_START_BIT_PAUSE_LEN_MIN, NETBOX_START_BIT_PAUSE_LEN_MAX);\r | |
2188 | irmp_param_p = (IRMP_PARAMETER *) &netbox_param;\r | |
2189 | }\r | |
2190 | else\r | |
2191 | #endif // IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r | |
2192 | \r | |
2193 | #if IRMP_SUPPORT_IMON_PROTOCOL == 1\r | |
2194 | if (irmp_pulse_time >= IMON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= IMON_START_BIT_PULSE_LEN_MAX &&\r | |
2195 | irmp_pause_time >= IMON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= IMON_START_BIT_PAUSE_LEN_MAX)\r | |
2196 | { // it's IMON\r | |
2197 | ANALYZE_PRINTF ("protocol = IMON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2198 | IMON_START_BIT_PULSE_LEN_MIN, IMON_START_BIT_PULSE_LEN_MAX,\r | |
2199 | IMON_START_BIT_PAUSE_LEN_MIN, IMON_START_BIT_PAUSE_LEN_MAX);\r | |
2200 | irmp_param_p = (IRMP_PARAMETER *) &imon_param;\r | |
2201 | }\r | |
2202 | else\r | |
2203 | #endif // IRMP_SUPPORT_IMON_PROTOCOL == 1\r | |
2204 | \r | |
2205 | {\r | |
2206 | ANALYZE_PRINTF ("protocol = UNKNOWN\n");\r | |
2207 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
2208 | }\r | |
2209 | \r | |
2210 | if (irmp_start_bit_detected)\r | |
2211 | {\r | |
2212 | memcpy_P (&irmp_param, irmp_param_p, sizeof (IRMP_PARAMETER));\r | |
2213 | \r | |
2214 | #ifdef ANALYZE\r | |
2215 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
2216 | {\r | |
2217 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max);\r | |
2218 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max);\r | |
2219 | }\r | |
2220 | else\r | |
2221 | {\r | |
2222 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max,\r | |
2223 | irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
2224 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max,\r | |
2225 | irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
2226 | }\r | |
2227 | \r | |
2228 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2229 | if (irmp_param2.protocol)\r | |
2230 | {\r | |
2231 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param2.pulse_0_len_min, irmp_param2.pulse_0_len_max);\r | |
2232 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param2.pause_0_len_min, irmp_param2.pause_0_len_max);\r | |
2233 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param2.pulse_1_len_min, irmp_param2.pulse_1_len_max);\r | |
2234 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param2.pause_1_len_min, irmp_param2.pause_1_len_max);\r | |
2235 | }\r | |
2236 | #endif\r | |
2237 | \r | |
2238 | \r | |
2239 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2240 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL)\r | |
2241 | {\r | |
2242 | ANALYZE_PRINTF ("pulse_toggle: %3d - %3d\n", RC6_TOGGLE_BIT_LEN_MIN, RC6_TOGGLE_BIT_LEN_MAX);\r | |
2243 | }\r | |
2244 | #endif\r | |
2245 | \r | |
2246 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
2247 | {\r | |
2248 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
2249 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
2250 | }\r | |
2251 | \r | |
2252 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
2253 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
2254 | {\r | |
2255 | ANALYZE_PRINTF ("pulse_r: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
2256 | ANALYZE_PRINTF ("pause_r: %3d - %3d\n", BANG_OLUFSEN_R_PAUSE_LEN_MIN, BANG_OLUFSEN_R_PAUSE_LEN_MAX);\r | |
2257 | }\r | |
2258 | #endif\r | |
2259 | \r | |
2260 | ANALYZE_PRINTF ("command_offset: %2d\n", irmp_param.command_offset);\r | |
2261 | ANALYZE_PRINTF ("command_len: %3d\n", irmp_param.command_end - irmp_param.command_offset);\r | |
2262 | ANALYZE_PRINTF ("complete_len: %3d\n", irmp_param.complete_len);\r | |
2263 | ANALYZE_PRINTF ("stop_bit: %3d\n", irmp_param.stop_bit);\r | |
2264 | #endif // ANALYZE\r | |
2265 | }\r | |
2266 | \r | |
2267 | irmp_bit = 0;\r | |
2268 | \r | |
2269 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
2270 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r | |
2271 | irmp_param.protocol != IRMP_RUWIDO_PROTOCOL && // Manchester, but not RUWIDO\r | |
2272 | irmp_param.protocol != IRMP_RC6_PROTOCOL) // Manchester, but not RC6\r | |
2273 | {\r | |
2274 | if (irmp_pause_time > irmp_param.pulse_1_len_max && irmp_pause_time <= irmp_param.pulse_0_len_max) // XXXXXXXX!!!\r | |
2275 | {\r | |
2276 | ANALYZE_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2277 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
2278 | ANALYZE_NEWLINE ();\r | |
2279 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1);\r | |
2280 | }\r | |
2281 | else if (! last_value) // && irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
2282 | {\r | |
2283 | ANALYZE_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2284 | \r | |
2285 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
2286 | ANALYZE_NEWLINE ();\r | |
2287 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0);\r | |
2288 | }\r | |
2289 | }\r | |
2290 | else\r | |
2291 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r | |
2292 | \r | |
2293 | #if IRMP_SUPPORT_SERIAL == 1\r | |
2294 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r | |
2295 | {\r | |
2296 | ; // do nothing\r | |
2297 | }\r | |
2298 | else\r | |
2299 | #endif // IRMP_SUPPORT_SERIAL == 1\r | |
2300 | \r | |
2301 | \r | |
2302 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2303 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r | |
2304 | {\r | |
2305 | ANALYZE_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2306 | \r | |
2307 | if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r | |
2308 | { // pause timings correct for "1"?\r | |
2309 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r | |
2310 | ANALYZE_NEWLINE ();\r | |
2311 | irmp_store_bit (1);\r | |
2312 | }\r | |
2313 | else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r | |
2314 | { // pause timings correct for "0"?\r | |
2315 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r | |
2316 | ANALYZE_NEWLINE ();\r | |
2317 | irmp_store_bit (0);\r | |
2318 | }\r | |
2319 | }\r | |
2320 | else\r | |
2321 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2322 | {\r | |
2323 | ; // else do nothing\r | |
2324 | }\r | |
2325 | \r | |
2326 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
2327 | irmp_pause_time = 0;\r | |
2328 | wait_for_start_space = 0;\r | |
2329 | }\r | |
2330 | }\r | |
2331 | else if (wait_for_space) // the data section....\r | |
2332 | { // counting the time of darkness....\r | |
2333 | uint8_t got_light = FALSE;\r | |
2334 | \r | |
2335 | if (irmp_input) // still dark?\r | |
2336 | { // yes...\r | |
2337 | if (irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 1)\r | |
2338 | {\r | |
2339 | if (\r | |
2340 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
2341 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) ||\r | |
2342 | #endif\r | |
2343 | #if IRMP_SUPPORT_SERIAL == 1\r | |
2344 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) ||\r | |
2345 | #endif\r | |
2346 | (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max))\r | |
2347 | {\r | |
2348 | #ifdef ANALYZE\r | |
2349 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
2350 | {\r | |
2351 | ANALYZE_PRINTF ("stop bit detected\n");\r | |
2352 | }\r | |
2353 | #endif\r | |
2354 | irmp_param.stop_bit = 0;\r | |
2355 | }\r | |
2356 | else\r | |
2357 | {\r | |
2358 | ANALYZE_PRINTF ("error: stop bit timing wrong\n");\r | |
2359 | \r | |
2360 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
2361 | irmp_pulse_time = 0;\r | |
2362 | irmp_pause_time = 0;\r | |
2363 | }\r | |
2364 | }\r | |
2365 | else\r | |
2366 | {\r | |
2367 | irmp_pause_time++; // increment counter\r | |
2368 | \r | |
2369 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
2370 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && // Sony has a variable number of bits:\r | |
2371 | irmp_pause_time > SIRCS_PAUSE_LEN_MAX && // minimum is 12\r | |
2372 | irmp_bit >= 12 - 1) // pause too long?\r | |
2373 | { // yes, break and close this frame\r | |
2374 | irmp_param.complete_len = irmp_bit + 1; // set new complete length\r | |
2375 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2376 | irmp_tmp_address |= (irmp_bit - SIRCS_MINIMUM_DATA_LEN + 1) << 8; // new: store number of additional bits in upper byte of address!\r | |
2377 | irmp_param.command_end = irmp_param.command_offset + irmp_bit + 1; // correct command length\r | |
2378 | irmp_pause_time = SIRCS_PAUSE_LEN_MAX - 1; // correct pause length\r | |
2379 | }\r | |
2380 | else\r | |
2381 | #endif\r | |
2382 | #if IRMP_SUPPORT_SERIAL == 1\r | |
2383 | // NETBOX generates no stop bit, here is the timeout condition:\r | |
2384 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) && irmp_param.protocol == IRMP_NETBOX_PROTOCOL &&\r | |
2385 | irmp_pause_time >= NETBOX_PULSE_LEN * (NETBOX_COMPLETE_DATA_LEN - irmp_bit))\r | |
2386 | {\r | |
2387 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2388 | }\r | |
2389 | else\r | |
2390 | #endif\r | |
2391 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r | |
2392 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && !irmp_param.stop_bit)\r | |
2393 | {\r | |
2394 | if (irmp_pause_time > IR60_TIMEOUT_LEN && irmp_bit == 6)\r | |
2395 | {\r | |
2396 | ANALYZE_PRINTF ("Switching to IR60 protocol\n");\r | |
2397 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2398 | irmp_param.stop_bit = TRUE; // set flag\r | |
2399 | \r | |
2400 | irmp_param.protocol = IRMP_IR60_PROTOCOL; // change protocol\r | |
2401 | irmp_param.complete_len = IR60_COMPLETE_DATA_LEN; // correct complete len\r | |
2402 | irmp_param.address_offset = IR60_ADDRESS_OFFSET;\r | |
2403 | irmp_param.address_end = IR60_ADDRESS_OFFSET + IR60_ADDRESS_LEN;\r | |
2404 | irmp_param.command_offset = IR60_COMMAND_OFFSET;\r | |
2405 | irmp_param.command_end = IR60_COMMAND_OFFSET + IR60_COMMAND_LEN;\r | |
2406 | \r | |
2407 | irmp_tmp_command <<= 1;\r | |
2408 | irmp_tmp_command |= first_bit;\r | |
2409 | }\r | |
2410 | else if (irmp_pause_time >= irmp_param.pause_0_len_max && irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN - 2)\r | |
2411 | { // special manchester decoder\r | |
2412 | irmp_param.complete_len = GRUNDIG_COMPLETE_DATA_LEN; // correct complete len\r | |
2413 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2414 | irmp_param.stop_bit = TRUE; // set flag\r | |
2415 | }\r | |
2416 | else if (irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN)\r | |
2417 | {\r | |
2418 | ANALYZE_PRINTF ("Switching to NOKIA protocol\n");\r | |
2419 | irmp_param.protocol = IRMP_NOKIA_PROTOCOL; // change protocol\r | |
2420 | irmp_param.address_offset = NOKIA_ADDRESS_OFFSET;\r | |
2421 | irmp_param.address_end = NOKIA_ADDRESS_OFFSET + NOKIA_ADDRESS_LEN;\r | |
2422 | irmp_param.command_offset = NOKIA_COMMAND_OFFSET;\r | |
2423 | irmp_param.command_end = NOKIA_COMMAND_OFFSET + NOKIA_COMMAND_LEN;\r | |
2424 | \r | |
2425 | if (irmp_tmp_command & 0x300)\r | |
2426 | {\r | |
2427 | irmp_tmp_address = (irmp_tmp_command >> 8);\r | |
2428 | irmp_tmp_command &= 0xFF;\r | |
2429 | }\r | |
2430 | }\r | |
2431 | }\r | |
2432 | else\r | |
2433 | #endif\r | |
2434 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r | |
2435 | if (irmp_param.protocol == IRMP_RUWIDO_PROTOCOL && !irmp_param.stop_bit)\r | |
2436 | {\r | |
2437 | if (irmp_pause_time >= irmp_param.pause_0_len_max && irmp_bit >= RUWIDO_COMPLETE_DATA_LEN - 2)\r | |
2438 | { // special manchester decoder\r | |
2439 | irmp_param.complete_len = RUWIDO_COMPLETE_DATA_LEN; // correct complete len\r | |
2440 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2441 | irmp_param.stop_bit = TRUE; // set flag\r | |
2442 | }\r | |
2443 | else if (irmp_bit >= RUWIDO_COMPLETE_DATA_LEN)\r | |
2444 | {\r | |
2445 | ANALYZE_PRINTF ("Switching to SIEMENS protocol\n");\r | |
2446 | irmp_param.protocol = IRMP_SIEMENS_PROTOCOL; // change protocol\r | |
2447 | irmp_param.address_offset = SIEMENS_ADDRESS_OFFSET;\r | |
2448 | irmp_param.address_end = SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN;\r | |
2449 | irmp_param.command_offset = SIEMENS_COMMAND_OFFSET;\r | |
2450 | irmp_param.command_end = SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN;\r | |
2451 | \r | |
2452 | // 76543210\r | |
2453 | // RUWIDO: AAAAAAAAACCCCCCCp\r | |
2454 | // SIEMENS: AAAAAAAAAAACCCCCCCCCCp\r | |
2455 | irmp_tmp_address <<= 2;\r | |
2456 | irmp_tmp_address |= (irmp_tmp_command >> 6);\r | |
2457 | irmp_tmp_command &= 0x003F;\r | |
2458 | irmp_tmp_command <<= 4;\r | |
2459 | irmp_tmp_command |= last_value;\r | |
2460 | }\r | |
2461 | }\r | |
2462 | else\r | |
2463 | #endif\r | |
2464 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
2465 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r | |
2466 | irmp_pause_time >= irmp_param.pause_0_len_max && irmp_bit >= irmp_param.complete_len - 2 && !irmp_param.stop_bit)\r | |
2467 | { // special manchester decoder\r | |
2468 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2469 | irmp_param.stop_bit = TRUE; // set flag\r | |
2470 | }\r | |
2471 | else\r | |
2472 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r | |
2473 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r | |
2474 | { // yes...\r | |
2475 | if (irmp_bit == irmp_param.complete_len - 1 && irmp_param.stop_bit == 0)\r | |
2476 | {\r | |
2477 | irmp_bit++;\r | |
2478 | }\r | |
2479 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2480 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r | |
2481 | {\r | |
2482 | ANALYZE_PRINTF ("Switching to JVC protocol\n");\r | |
2483 | irmp_param.stop_bit = TRUE; // set flag\r | |
2484 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
2485 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
2486 | irmp_tmp_command = (irmp_tmp_address >> 4); // set command: upper 12 bits are command bits\r | |
2487 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
2488 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
2489 | }\r | |
2490 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2491 | \r | |
2492 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
2493 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
2494 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 32) // it was a NEC stop bit\r | |
2495 | {\r | |
2496 | ANALYZE_PRINTF ("Switching to NEC protocol\n");\r | |
2497 | irmp_param.stop_bit = TRUE; // set flag\r | |
2498 | irmp_param.protocol = IRMP_NEC_PROTOCOL; // switch protocol\r | |
2499 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
2500 | \r | |
2501 | // 0123456789ABC0123456789ABC0123456701234567\r | |
2502 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
2503 | // NEC: AAAAAAAAaaaaaaaaCCCCCCCCcccccccc\r | |
2504 | irmp_tmp_address |= (irmp_tmp_address2 & 0x0007) << 12;\r | |
2505 | irmp_tmp_command = (irmp_tmp_address2 >> 3) | (irmp_tmp_command << 10);\r | |
2506 | }\r | |
2507 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
2508 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2509 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 16) // it was a JVC stop bit\r | |
2510 | {\r | |
2511 | ANALYZE_PRINTF ("Switching to JVC protocol\n");\r | |
2512 | irmp_param.stop_bit = TRUE; // set flag\r | |
2513 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
2514 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
2515 | \r | |
2516 | // 0123456789ABC0123456789ABC0123456701234567\r | |
2517 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
2518 | // JVC: AAAACCCCCCCCCCCC\r | |
2519 | irmp_tmp_command = (irmp_tmp_address >> 4) | (irmp_tmp_address2 << 9); // set command: upper 12 bits are command bits\r | |
2520 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
2521 | }\r | |
2522 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2523 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
2524 | else\r | |
2525 | {\r | |
2526 | ANALYZE_PRINTF ("error 2: pause %d after data bit %d too long\n", irmp_pause_time, irmp_bit);\r | |
2527 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2528 | \r | |
2529 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
2530 | irmp_pulse_time = 0;\r | |
2531 | irmp_pause_time = 0;\r | |
2532 | }\r | |
2533 | }\r | |
2534 | }\r | |
2535 | }\r | |
2536 | else\r | |
2537 | { // got light now!\r | |
2538 | got_light = TRUE;\r | |
2539 | }\r | |
2540 | \r | |
2541 | if (got_light)\r | |
2542 | {\r | |
2543 | ANALYZE_PRINTF ("%8d [bit %2d: pulse = %3d, pause = %3d] ", time_counter, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2544 | \r | |
2545 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
2546 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER)) // Manchester\r | |
2547 | {\r | |
2548 | #if 0\r | |
2549 | if (irmp_pulse_time > irmp_param.pulse_1_len_max /* && irmp_pulse_time <= irmp_param.pulse_0_len_max */)\r | |
2550 | #else // better:\r | |
2551 | if (irmp_pulse_time > irmp_param.pulse_1_len_max && irmp_pulse_time <= irmp_param.pulse_0_len_max &&\r | |
2552 | irmp_pause_time <= irmp_param.pause_0_len_max)\r | |
2553 | #endif\r | |
2554 | {\r | |
2555 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2556 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r | |
2557 | {\r | |
2558 | ANALYZE_PUTCHAR ('T');\r | |
2559 | if (irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode 6A\r | |
2560 | {\r | |
2561 | irmp_store_bit (1);\r | |
2562 | last_value = 1;\r | |
2563 | }\r | |
2564 | else // RC6 mode 0\r | |
2565 | {\r | |
2566 | irmp_store_bit (0);\r | |
2567 | last_value = 0;\r | |
2568 | }\r | |
2569 | ANALYZE_NEWLINE ();\r | |
2570 | }\r | |
2571 | else\r | |
2572 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2573 | {\r | |
2574 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
2575 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1 );\r | |
2576 | \r | |
2577 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2578 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r | |
2579 | {\r | |
2580 | ANALYZE_PUTCHAR ('T');\r | |
2581 | irmp_store_bit (1);\r | |
2582 | \r | |
2583 | if (irmp_pause_time > irmp_param.pause_0_len_max)\r | |
2584 | {\r | |
2585 | last_value = 0;\r | |
2586 | }\r | |
2587 | else\r | |
2588 | {\r | |
2589 | last_value = 1;\r | |
2590 | }\r | |
2591 | ANALYZE_NEWLINE ();\r | |
2592 | }\r | |
2593 | else\r | |
2594 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2595 | {\r | |
2596 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
2597 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0 );\r | |
2598 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2599 | if (! irmp_param2.protocol)\r | |
2600 | #endif\r | |
2601 | {\r | |
2602 | ANALYZE_NEWLINE ();\r | |
2603 | }\r | |
2604 | last_value = (irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0;\r | |
2605 | }\r | |
2606 | }\r | |
2607 | }\r | |
2608 | else if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max /* &&\r | |
2609 | irmp_pause_time <= irmp_param.pause_0_len_max */)\r | |
2610 | {\r | |
2611 | uint8_t manchester_value;\r | |
2612 | \r | |
2613 | if (last_pause > irmp_param.pause_1_len_max && last_pause <= irmp_param.pause_0_len_max)\r | |
2614 | {\r | |
2615 | manchester_value = last_value ? 0 : 1;\r | |
2616 | last_value = manchester_value;\r | |
2617 | }\r | |
2618 | else\r | |
2619 | {\r | |
2620 | manchester_value = last_value;\r | |
2621 | }\r | |
2622 | \r | |
2623 | ANALYZE_PUTCHAR (manchester_value + '0');\r | |
2624 | \r | |
2625 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2626 | if (! irmp_param2.protocol)\r | |
2627 | #endif\r | |
2628 | {\r | |
2629 | ANALYZE_NEWLINE ();\r | |
2630 | }\r | |
2631 | \r | |
2632 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2633 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 1 && manchester_value == 1) // RC6 mode != 0 ???\r | |
2634 | {\r | |
2635 | ANALYZE_PRINTF ("Switching to RC6A protocol\n");\r | |
2636 | irmp_param.complete_len = RC6_COMPLETE_DATA_LEN_LONG;\r | |
2637 | irmp_param.address_offset = 5;\r | |
2638 | irmp_param.address_end = irmp_param.address_offset + 15;\r | |
2639 | irmp_param.command_offset = irmp_param.address_end + 1; // skip 1 system bit, changes like a toggle bit\r | |
2640 | irmp_param.command_end = irmp_param.command_offset + 16 - 1;\r | |
2641 | irmp_tmp_address = 0;\r | |
2642 | }\r | |
2643 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2644 | \r | |
2645 | irmp_store_bit (manchester_value);\r | |
2646 | }\r | |
2647 | else\r | |
2648 | {\r | |
2649 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
2650 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL &&\r | |
2651 | irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX &&\r | |
2652 | ((irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX) ||\r | |
2653 | (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)))\r | |
2654 | {\r | |
2655 | ANALYZE_PUTCHAR ('?');\r | |
2656 | irmp_param.protocol = 0; // switch to FDC, see below\r | |
2657 | }\r | |
2658 | else\r | |
2659 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
2660 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2661 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL &&\r | |
2662 | irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX &&\r | |
2663 | ((irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX) ||\r | |
2664 | (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)))\r | |
2665 | {\r | |
2666 | ANALYZE_PUTCHAR ('?');\r | |
2667 | irmp_param.protocol = 0; // switch to RCCAR, see below\r | |
2668 | }\r | |
2669 | else\r | |
2670 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2671 | {\r | |
2672 | ANALYZE_PUTCHAR ('?');\r | |
2673 | ANALYZE_NEWLINE ();\r | |
2674 | ANALYZE_PRINTF ("error 3 manchester: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2675 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2676 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2677 | irmp_pause_time = 0;\r | |
2678 | }\r | |
2679 | }\r | |
2680 | \r | |
2681 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
2682 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL && irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX)\r | |
2683 | {\r | |
2684 | if (irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX)\r | |
2685 | {\r | |
2686 | ANALYZE_PRINTF (" 1 (FDC)\n");\r | |
2687 | irmp_store_bit2 (1);\r | |
2688 | }\r | |
2689 | else if (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)\r | |
2690 | {\r | |
2691 | ANALYZE_PRINTF (" 0 (FDC)\n");\r | |
2692 | irmp_store_bit2 (0);\r | |
2693 | }\r | |
2694 | \r | |
2695 | if (! irmp_param.protocol)\r | |
2696 | {\r | |
2697 | ANALYZE_PRINTF ("Switching to FDC protocol\n");\r | |
2698 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r | |
2699 | irmp_param2.protocol = 0;\r | |
2700 | irmp_tmp_address = irmp_tmp_address2;\r | |
2701 | irmp_tmp_command = irmp_tmp_command2;\r | |
2702 | }\r | |
2703 | }\r | |
2704 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
2705 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2706 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL && irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX)\r | |
2707 | {\r | |
2708 | if (irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX)\r | |
2709 | {\r | |
2710 | ANALYZE_PRINTF (" 1 (RCCAR)\n");\r | |
2711 | irmp_store_bit2 (1);\r | |
2712 | }\r | |
2713 | else if (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)\r | |
2714 | {\r | |
2715 | ANALYZE_PRINTF (" 0 (RCCAR)\n");\r | |
2716 | irmp_store_bit2 (0);\r | |
2717 | }\r | |
2718 | \r | |
2719 | if (! irmp_param.protocol)\r | |
2720 | {\r | |
2721 | ANALYZE_PRINTF ("Switching to RCCAR protocol\n");\r | |
2722 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r | |
2723 | irmp_param2.protocol = 0;\r | |
2724 | irmp_tmp_address = irmp_tmp_address2;\r | |
2725 | irmp_tmp_command = irmp_tmp_command2;\r | |
2726 | }\r | |
2727 | }\r | |
2728 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2729 | \r | |
2730 | last_pause = irmp_pause_time;\r | |
2731 | wait_for_space = 0;\r | |
2732 | }\r | |
2733 | else\r | |
2734 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r | |
2735 | \r | |
2736 | #if IRMP_SUPPORT_SERIAL == 1\r | |
2737 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r | |
2738 | {\r | |
2739 | while (irmp_bit < irmp_param.complete_len && irmp_pulse_time > irmp_param.pulse_1_len_max)\r | |
2740 | {\r | |
2741 | ANALYZE_PUTCHAR ('1');\r | |
2742 | irmp_store_bit (1);\r | |
2743 | \r | |
2744 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min)\r | |
2745 | {\r | |
2746 | irmp_pulse_time -= irmp_param.pulse_1_len_min;\r | |
2747 | }\r | |
2748 | else\r | |
2749 | {\r | |
2750 | irmp_pulse_time = 0;\r | |
2751 | }\r | |
2752 | }\r | |
2753 | \r | |
2754 | while (irmp_bit < irmp_param.complete_len && irmp_pause_time > irmp_param.pause_1_len_max)\r | |
2755 | {\r | |
2756 | ANALYZE_PUTCHAR ('0');\r | |
2757 | irmp_store_bit (0);\r | |
2758 | \r | |
2759 | if (irmp_pause_time >= irmp_param.pause_1_len_min)\r | |
2760 | {\r | |
2761 | irmp_pause_time -= irmp_param.pause_1_len_min;\r | |
2762 | }\r | |
2763 | else\r | |
2764 | {\r | |
2765 | irmp_pause_time = 0;\r | |
2766 | }\r | |
2767 | }\r | |
2768 | ANALYZE_NEWLINE ();\r | |
2769 | wait_for_space = 0;\r | |
2770 | }\r | |
2771 | else\r | |
2772 | #endif // IRMP_SUPPORT_SERIAL == 1\r | |
2773 | \r | |
2774 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
2775 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit == 16) // Samsung: 16th bit\r | |
2776 | {\r | |
2777 | if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX &&\r | |
2778 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
2779 | {\r | |
2780 | ANALYZE_PRINTF ("SYNC\n");\r | |
2781 | wait_for_space = 0;\r | |
2782 | irmp_tmp_id = 0;\r | |
2783 | irmp_bit++;\r | |
2784 | }\r | |
2785 | else if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX)\r | |
2786 | {\r | |
2787 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r | |
2788 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
2789 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
2790 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
2791 | \r | |
2792 | if (irmp_pause_time >= SAMSUNG_1_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_1_PAUSE_LEN_MAX)\r | |
2793 | {\r | |
2794 | ANALYZE_PUTCHAR ('1');\r | |
2795 | ANALYZE_NEWLINE ();\r | |
2796 | irmp_store_bit (1);\r | |
2797 | wait_for_space = 0;\r | |
2798 | }\r | |
2799 | else\r | |
2800 | {\r | |
2801 | ANALYZE_PUTCHAR ('0');\r | |
2802 | ANALYZE_NEWLINE ();\r | |
2803 | irmp_store_bit (0);\r | |
2804 | wait_for_space = 0;\r | |
2805 | }\r | |
2806 | \r | |
2807 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol\n");\r | |
2808 | }\r | |
2809 | else\r | |
2810 | { // timing incorrect!\r | |
2811 | ANALYZE_PRINTF ("error 3 Samsung: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2812 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2813 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2814 | irmp_pause_time = 0;\r | |
2815 | }\r | |
2816 | }\r | |
2817 | else\r | |
2818 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL\r | |
2819 | \r | |
2820 | #if IRMP_SUPPORT_NEC16_PROTOCOL\r | |
2821 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
2822 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL &&\r | |
2823 | #else // IRMP_SUPPORT_NEC_PROTOCOL instead\r | |
2824 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL &&\r | |
2825 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
2826 | irmp_bit == 8 && irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
2827 | {\r | |
2828 | ANALYZE_PRINTF ("Switching to NEC16 protocol\n");\r | |
2829 | irmp_param.protocol = IRMP_NEC16_PROTOCOL;\r | |
2830 | irmp_param.address_offset = NEC16_ADDRESS_OFFSET;\r | |
2831 | irmp_param.address_end = NEC16_ADDRESS_OFFSET + NEC16_ADDRESS_LEN;\r | |
2832 | irmp_param.command_offset = NEC16_COMMAND_OFFSET;\r | |
2833 | irmp_param.command_end = NEC16_COMMAND_OFFSET + NEC16_COMMAND_LEN;\r | |
2834 | irmp_param.complete_len = NEC16_COMPLETE_DATA_LEN;\r | |
2835 | wait_for_space = 0;\r | |
2836 | }\r | |
2837 | else\r | |
2838 | #endif // IRMP_SUPPORT_NEC16_PROTOCOL\r | |
2839 | \r | |
2840 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
2841 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
2842 | {\r | |
2843 | if (irmp_pulse_time >= BANG_OLUFSEN_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_PULSE_LEN_MAX)\r | |
2844 | {\r | |
2845 | if (irmp_bit == 1) // Bang & Olufsen: 3rd bit\r | |
2846 | {\r | |
2847 | if (irmp_pause_time >= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX)\r | |
2848 | {\r | |
2849 | ANALYZE_PRINTF ("3rd start bit\n");\r | |
2850 | wait_for_space = 0;\r | |
2851 | irmp_bit++;\r | |
2852 | }\r | |
2853 | else\r | |
2854 | { // timing incorrect!\r | |
2855 | ANALYZE_PRINTF ("error 3a B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2856 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2857 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2858 | irmp_pause_time = 0;\r | |
2859 | }\r | |
2860 | }\r | |
2861 | else if (irmp_bit == 19) // Bang & Olufsen: trailer bit\r | |
2862 | {\r | |
2863 | if (irmp_pause_time >= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX)\r | |
2864 | {\r | |
2865 | ANALYZE_PRINTF ("trailer bit\n");\r | |
2866 | wait_for_space = 0;\r | |
2867 | irmp_bit++;\r | |
2868 | }\r | |
2869 | else\r | |
2870 | { // timing incorrect!\r | |
2871 | ANALYZE_PRINTF ("error 3b B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2872 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2873 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2874 | irmp_pause_time = 0;\r | |
2875 | }\r | |
2876 | }\r | |
2877 | else\r | |
2878 | {\r | |
2879 | if (irmp_pause_time >= BANG_OLUFSEN_1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_1_PAUSE_LEN_MAX)\r | |
2880 | { // pulse & pause timings correct for "1"?\r | |
2881 | ANALYZE_PUTCHAR ('1');\r | |
2882 | ANALYZE_NEWLINE ();\r | |
2883 | irmp_store_bit (1);\r | |
2884 | last_value = 1;\r | |
2885 | wait_for_space = 0;\r | |
2886 | }\r | |
2887 | else if (irmp_pause_time >= BANG_OLUFSEN_0_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_0_PAUSE_LEN_MAX)\r | |
2888 | { // pulse & pause timings correct for "0"?\r | |
2889 | ANALYZE_PUTCHAR ('0');\r | |
2890 | ANALYZE_NEWLINE ();\r | |
2891 | irmp_store_bit (0);\r | |
2892 | last_value = 0;\r | |
2893 | wait_for_space = 0;\r | |
2894 | }\r | |
2895 | else if (irmp_pause_time >= BANG_OLUFSEN_R_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_R_PAUSE_LEN_MAX)\r | |
2896 | {\r | |
2897 | ANALYZE_PUTCHAR (last_value + '0');\r | |
2898 | ANALYZE_NEWLINE ();\r | |
2899 | irmp_store_bit (last_value);\r | |
2900 | wait_for_space = 0;\r | |
2901 | }\r | |
2902 | else\r | |
2903 | { // timing incorrect!\r | |
2904 | ANALYZE_PRINTF ("error 3c B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2905 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2906 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2907 | irmp_pause_time = 0;\r | |
2908 | }\r | |
2909 | }\r | |
2910 | }\r | |
2911 | else\r | |
2912 | { // timing incorrect!\r | |
2913 | ANALYZE_PRINTF ("error 3d B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2914 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2915 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2916 | irmp_pause_time = 0;\r | |
2917 | }\r | |
2918 | }\r | |
2919 | else\r | |
2920 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL\r | |
2921 | \r | |
2922 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max &&\r | |
2923 | irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
2924 | { // pulse & pause timings correct for "1"?\r | |
2925 | ANALYZE_PUTCHAR ('1');\r | |
2926 | ANALYZE_NEWLINE ();\r | |
2927 | irmp_store_bit (1);\r | |
2928 | wait_for_space = 0;\r | |
2929 | }\r | |
2930 | else if (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max &&\r | |
2931 | irmp_pause_time >= irmp_param.pause_0_len_min && irmp_pause_time <= irmp_param.pause_0_len_max)\r | |
2932 | { // pulse & pause timings correct for "0"?\r | |
2933 | ANALYZE_PUTCHAR ('0');\r | |
2934 | ANALYZE_NEWLINE ();\r | |
2935 | irmp_store_bit (0);\r | |
2936 | wait_for_space = 0;\r | |
2937 | }\r | |
2938 | else\r | |
2939 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL\r | |
2940 | \r | |
2941 | if (irmp_param.protocol == IRMP_KATHREIN_PROTOCOL &&\r | |
2942 | irmp_pulse_time >= KATHREIN_1_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_1_PULSE_LEN_MAX &&\r | |
2943 | (((irmp_bit == 8 || irmp_bit == 6) &&\r | |
2944 | irmp_pause_time >= KATHREIN_SYNC_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_SYNC_BIT_PAUSE_LEN_MAX) ||\r | |
2945 | (irmp_bit == 12 &&\r | |
2946 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)))\r | |
2947 | \r | |
2948 | {\r | |
2949 | if (irmp_bit == 8)\r | |
2950 | {\r | |
2951 | irmp_bit++;\r | |
2952 | ANALYZE_PUTCHAR ('S');\r | |
2953 | ANALYZE_NEWLINE ();\r | |
2954 | irmp_tmp_command <<= 1;\r | |
2955 | }\r | |
2956 | else\r | |
2957 | {\r | |
2958 | ANALYZE_PUTCHAR ('S');\r | |
2959 | ANALYZE_NEWLINE ();\r | |
2960 | irmp_store_bit (1);\r | |
2961 | }\r | |
2962 | wait_for_space = 0;\r | |
2963 | }\r | |
2964 | else\r | |
2965 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL\r | |
2966 | { // timing incorrect!\r | |
2967 | ANALYZE_PRINTF ("error 3: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
2968 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
2969 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
2970 | irmp_pause_time = 0;\r | |
2971 | }\r | |
2972 | \r | |
2973 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
2974 | }\r | |
2975 | }\r | |
2976 | else\r | |
2977 | { // counting the pulse length ...\r | |
2978 | if (! irmp_input) // still light?\r | |
2979 | { // yes...\r | |
2980 | irmp_pulse_time++; // increment counter\r | |
2981 | }\r | |
2982 | else\r | |
2983 | { // now it's dark!\r | |
2984 | wait_for_space = 1; // let's count the time (see above)\r | |
2985 | irmp_pause_time = 1; // set pause counter to 1, not 0\r | |
2986 | }\r | |
2987 | }\r | |
2988 | \r | |
2989 | if (irmp_start_bit_detected && irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 0) // enough bits received?\r | |
2990 | {\r | |
2991 | if (last_irmp_command == irmp_tmp_command && repetition_len < AUTO_FRAME_REPETITION_LEN)\r | |
2992 | {\r | |
2993 | repetition_frame_number++;\r | |
2994 | }\r | |
2995 | else\r | |
2996 | {\r | |
2997 | repetition_frame_number = 0;\r | |
2998 | }\r | |
2999 | \r | |
3000 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
3001 | // if SIRCS protocol and the code will be repeated within 50 ms, we will ignore 2nd and 3rd repetition frame\r | |
3002 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && (repetition_frame_number == 1 || repetition_frame_number == 2))\r | |
3003 | {\r | |
3004 | ANALYZE_PRINTF ("code skipped: SIRCS auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3005 | repetition_frame_number + 1, repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3006 | repetition_len = 0;\r | |
3007 | }\r | |
3008 | else\r | |
3009 | #endif\r | |
3010 | \r | |
3011 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3012 | // if KASEIKYO protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r | |
3013 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && repetition_frame_number == 1)\r | |
3014 | {\r | |
3015 | ANALYZE_PRINTF ("code skipped: KASEIKYO auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3016 | repetition_frame_number + 1, repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3017 | repetition_len = 0;\r | |
3018 | }\r | |
3019 | else\r | |
3020 | #endif\r | |
3021 | \r | |
3022 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
3023 | // if SAMSUNG32 protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r | |
3024 | if (irmp_param.protocol == IRMP_SAMSUNG32_PROTOCOL && (repetition_frame_number & 0x01))\r | |
3025 | {\r | |
3026 | ANALYZE_PRINTF ("code skipped: SAMSUNG32 auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3027 | repetition_frame_number + 1, repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3028 | repetition_len = 0;\r | |
3029 | }\r | |
3030 | else\r | |
3031 | #endif\r | |
3032 | \r | |
3033 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
3034 | // if NUBERT protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r | |
3035 | if (irmp_param.protocol == IRMP_NUBERT_PROTOCOL && (repetition_frame_number & 0x01))\r | |
3036 | {\r | |
3037 | ANALYZE_PRINTF ("code skipped: NUBERT auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3038 | repetition_frame_number + 1, repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3039 | repetition_len = 0;\r | |
3040 | }\r | |
3041 | else\r | |
3042 | #endif\r | |
3043 | \r | |
3044 | {\r | |
3045 | ANALYZE_PRINTF ("%8d code detected, length = %d\n", time_counter, irmp_bit);\r | |
3046 | irmp_ir_detected = TRUE;\r | |
3047 | \r | |
3048 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
3049 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r | |
3050 | { // check for repetition frame\r | |
3051 | if ((~irmp_tmp_command & 0x3FF) == last_irmp_denon_command) // command bits must be inverted\r | |
3052 | {\r | |
3053 | irmp_tmp_command = last_irmp_denon_command; // use command received before!\r | |
3054 | \r | |
3055 | irmp_protocol = irmp_param.protocol; // store protocol\r | |
3056 | irmp_address = irmp_tmp_address; // store address\r | |
3057 | irmp_command = irmp_tmp_command ; // store command\r | |
3058 | }\r | |
3059 | else\r | |
3060 | {\r | |
3061 | ANALYZE_PRINTF ("waiting for inverted command repetition\n");\r | |
3062 | irmp_ir_detected = FALSE;\r | |
3063 | last_irmp_denon_command = irmp_tmp_command;\r | |
3064 | }\r | |
3065 | }\r | |
3066 | else\r | |
3067 | #endif // IRMP_SUPPORT_DENON_PROTOCOL\r | |
3068 | \r | |
3069 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
3070 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && irmp_tmp_command == 0x01ff)\r | |
3071 | { // Grundig start frame?\r | |
3072 | ANALYZE_PRINTF ("Detected GRUNDIG start frame, ignoring it\n");\r | |
3073 | irmp_ir_detected = FALSE;\r | |
3074 | }\r | |
3075 | else\r | |
3076 | #endif // IRMP_SUPPORT_GRUNDIG_PROTOCOL\r | |
3077 | \r | |
3078 | #if IRMP_SUPPORT_NOKIA_PROTOCOL == 1\r | |
3079 | if (irmp_param.protocol == IRMP_NOKIA_PROTOCOL && irmp_tmp_address == 0x00ff && irmp_tmp_command == 0x00fe)\r | |
3080 | { // Nokia start frame?\r | |
3081 | ANALYZE_PRINTF ("Detected NOKIA start frame, ignoring it\n");\r | |
3082 | irmp_ir_detected = FALSE;\r | |
3083 | }\r | |
3084 | else\r | |
3085 | #endif // IRMP_SUPPORT_NOKIA_PROTOCOL\r | |
3086 | {\r | |
3087 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
3088 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL && irmp_bit == 0) // repetition frame\r | |
3089 | {\r | |
3090 | if (repetition_len < NEC_FRAME_REPEAT_PAUSE_LEN_MAX)\r | |
3091 | {\r | |
3092 | ANALYZE_PRINTF ("Detected NEC repetition frame, repetition_len = %d\n", repetition_len);\r | |
3093 | irmp_tmp_address = last_irmp_address; // address is last address\r | |
3094 | irmp_tmp_command = last_irmp_command; // command is last command\r | |
3095 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
3096 | repetition_len = 0;\r | |
3097 | }\r | |
3098 | else\r | |
3099 | {\r | |
3100 | ANALYZE_PRINTF ("Detected NEC repetition frame, ignoring it: timeout occured, repetition_len = %d > %d\n",\r | |
3101 | repetition_len, NEC_FRAME_REPEAT_PAUSE_LEN_MAX);\r | |
3102 | irmp_ir_detected = FALSE;\r | |
3103 | }\r | |
3104 | }\r | |
3105 | #endif // IRMP_SUPPORT_NEC_PROTOCOL\r | |
3106 | \r | |
3107 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3108 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r | |
3109 | {\r | |
3110 | uint8_t xor;\r | |
3111 | // ANALYZE_PRINTF ("0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",\r | |
3112 | // xor_check[0], xor_check[1], xor_check[2], xor_check[3], xor_check[4], xor_check[5]);\r | |
3113 | \r | |
3114 | xor = (xor_check[0] & 0x0F) ^ ((xor_check[0] & 0xF0) >> 4) ^ (xor_check[1] & 0x0F) ^ ((xor_check[1] & 0xF0) >> 4);\r | |
3115 | \r | |
3116 | if (xor != (xor_check[2] & 0x0F))\r | |
3117 | {\r | |
3118 | ANALYZE_PRINTF ("error 4: wrong XOR check for customer id: 0x%1x 0x%1x\n", xor, xor_check[2] & 0x0F);\r | |
3119 | irmp_ir_detected = FALSE;\r | |
3120 | }\r | |
3121 | \r | |
3122 | xor = xor_check[2] ^ xor_check[3] ^ xor_check[4];\r | |
3123 | \r | |
3124 | if (xor != xor_check[5])\r | |
3125 | {\r | |
3126 | ANALYZE_PRINTF ("error 4: wrong XOR check for data bits: 0x%02x 0x%02x\n", xor, xor_check[5]);\r | |
3127 | irmp_ir_detected = FALSE;\r | |
3128 | }\r | |
3129 | }\r | |
3130 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3131 | \r | |
3132 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3133 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode = 6?\r | |
3134 | {\r | |
3135 | irmp_protocol = IRMP_RC6A_PROTOCOL;\r | |
3136 | }\r | |
3137 | else\r | |
3138 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3139 | \r | |
3140 | irmp_protocol = irmp_param.protocol;\r | |
3141 | \r | |
3142 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3143 | if (irmp_param.protocol == IRMP_FDC_PROTOCOL)\r | |
3144 | {\r | |
3145 | if (irmp_tmp_command & 0x000F) // released key?\r | |
3146 | {\r | |
3147 | irmp_tmp_command = (irmp_tmp_command >> 4) | 0x80; // yes, set bit 7\r | |
3148 | }\r | |
3149 | else\r | |
3150 | {\r | |
3151 | irmp_tmp_command >>= 4; // no, it's a pressed key\r | |
3152 | }\r | |
3153 | irmp_tmp_command |= (irmp_tmp_address << 2) & 0x0F00; // 000000CCCCAAAAAA -> 0000CCCC00000000\r | |
3154 | irmp_tmp_address &= 0x003F;\r | |
3155 | }\r | |
3156 | #endif\r | |
3157 | \r | |
3158 | irmp_address = irmp_tmp_address; // store address\r | |
3159 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
3160 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
3161 | #endif\r | |
3162 | \r | |
3163 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
3164 | if (irmp_param.protocol == IRMP_RC5_PROTOCOL)\r | |
3165 | {\r | |
3166 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
3167 | }\r | |
3168 | #endif\r | |
3169 | irmp_command = irmp_tmp_command; // store command\r | |
3170 | \r | |
3171 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
3172 | irmp_id = irmp_tmp_id;\r | |
3173 | #endif\r | |
3174 | }\r | |
3175 | }\r | |
3176 | \r | |
3177 | if (irmp_ir_detected)\r | |
3178 | {\r | |
3179 | if (last_irmp_command == irmp_command &&\r | |
3180 | last_irmp_address == irmp_address &&\r | |
3181 | repetition_len < IRMP_KEY_REPETITION_LEN)\r | |
3182 | {\r | |
3183 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
3184 | }\r | |
3185 | \r | |
3186 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
3187 | last_irmp_command = irmp_tmp_command; // store as last command, too\r | |
3188 | \r | |
3189 | repetition_len = 0;\r | |
3190 | }\r | |
3191 | else\r | |
3192 | {\r | |
3193 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
3194 | }\r | |
3195 | \r | |
3196 | irmp_start_bit_detected = 0; // and wait for next start bit\r | |
3197 | irmp_tmp_command = 0;\r | |
3198 | irmp_pulse_time = 0;\r | |
3199 | irmp_pause_time = 0;\r | |
3200 | \r | |
3201 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
3202 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // the stop bit of JVC frame is also start bit of next frame\r | |
3203 | { // set pulse time here!\r | |
3204 | irmp_pulse_time = ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME));\r | |
3205 | }\r | |
3206 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
3207 | }\r | |
3208 | }\r | |
3209 | }\r | |
3210 | return (irmp_ir_detected);\r | |
3211 | }\r | |
3212 | \r | |
3213 | #ifdef ANALYZE\r | |
3214 | \r | |
3215 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
3216 | * main functions - for Unix/Linux + Windows only!\r | |
3217 | *\r | |
3218 | * AVR: see main.c!\r | |
3219 | *\r | |
3220 | * Compile it under linux with:\r | |
3221 | * cc irmp.c -o irmp\r | |
3222 | *\r | |
3223 | * usage: ./irmp [-v|-s|-a|-l|-p] < file\r | |
3224 | *\r | |
3225 | * options:\r | |
3226 | * -v verbose\r | |
3227 | * -s silent\r | |
3228 | * -a analyze\r | |
3229 | * -l list pulse/pauses\r | |
3230 | * -p print timings\r | |
3231 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
3232 | */\r | |
3233 | \r | |
3234 | static void\r | |
3235 | print_timings (void)\r | |
3236 | {\r | |
3237 | printf ("IRMP_TIMEOUT_LEN: %d [%d byte(s)]\n", IRMP_TIMEOUT_LEN, sizeof (PAUSE_LEN));\r | |
3238 | printf ("IRMP_KEY_REPETITION_LEN %d\n", IRMP_KEY_REPETITION_LEN);\r | |
3239 | puts ("");\r | |
3240 | printf ("PROTOCOL S S-PULSE S-PAUSE PULSE-0 PAUSE-0 PULSE-1 PAUSE-1\n");\r | |
3241 | printf ("====================================================================================\n");\r | |
3242 | printf ("SIRCS 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3243 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX, SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX,\r | |
3244 | SIRCS_0_PULSE_LEN_MIN, SIRCS_0_PULSE_LEN_MAX, SIRCS_PAUSE_LEN_MIN, SIRCS_PAUSE_LEN_MAX,\r | |
3245 | SIRCS_1_PULSE_LEN_MIN, SIRCS_1_PULSE_LEN_MAX, SIRCS_PAUSE_LEN_MIN, SIRCS_PAUSE_LEN_MAX);\r | |
3246 | \r | |
3247 | printf ("NEC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3248 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX,\r | |
3249 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX,\r | |
3250 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_1_PAUSE_LEN_MIN, NEC_1_PAUSE_LEN_MAX);\r | |
3251 | \r | |
3252 | printf ("NEC (rep) 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3253 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX,\r | |
3254 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX,\r | |
3255 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_1_PAUSE_LEN_MIN, NEC_1_PAUSE_LEN_MAX);\r | |
3256 | \r | |
3257 | printf ("SAMSUNG 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3258 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX, SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX,\r | |
3259 | SAMSUNG_PULSE_LEN_MIN, SAMSUNG_PULSE_LEN_MAX, SAMSUNG_0_PAUSE_LEN_MIN, SAMSUNG_0_PAUSE_LEN_MAX,\r | |
3260 | SAMSUNG_PULSE_LEN_MIN, SAMSUNG_PULSE_LEN_MAX, SAMSUNG_1_PAUSE_LEN_MIN, SAMSUNG_1_PAUSE_LEN_MAX);\r | |
3261 | \r | |
3262 | printf ("MATSUSHITA 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3263 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX, MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX,\r | |
3264 | MATSUSHITA_PULSE_LEN_MIN, MATSUSHITA_PULSE_LEN_MAX, MATSUSHITA_0_PAUSE_LEN_MIN, MATSUSHITA_0_PAUSE_LEN_MAX,\r | |
3265 | MATSUSHITA_PULSE_LEN_MIN, MATSUSHITA_PULSE_LEN_MAX, MATSUSHITA_1_PAUSE_LEN_MIN, MATSUSHITA_1_PAUSE_LEN_MAX);\r | |
3266 | \r | |
3267 | printf ("KASEIKYO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3268 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX, KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX,\r | |
3269 | KASEIKYO_PULSE_LEN_MIN, KASEIKYO_PULSE_LEN_MAX, KASEIKYO_0_PAUSE_LEN_MIN, KASEIKYO_0_PAUSE_LEN_MAX,\r | |
3270 | KASEIKYO_PULSE_LEN_MIN, KASEIKYO_PULSE_LEN_MAX, KASEIKYO_1_PAUSE_LEN_MIN, KASEIKYO_1_PAUSE_LEN_MAX);\r | |
3271 | \r | |
3272 | printf ("RECS80 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3273 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX, RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX,\r | |
3274 | RECS80_PULSE_LEN_MIN, RECS80_PULSE_LEN_MAX, RECS80_0_PAUSE_LEN_MIN, RECS80_0_PAUSE_LEN_MAX,\r | |
3275 | RECS80_PULSE_LEN_MIN, RECS80_PULSE_LEN_MAX, RECS80_1_PAUSE_LEN_MIN, RECS80_1_PAUSE_LEN_MAX);\r | |
3276 | \r | |
3277 | printf ("RC5 1 %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3278 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3279 | RC5_BIT_LEN_MIN, RC5_BIT_LEN_MAX);\r | |
3280 | \r | |
3281 | printf ("DENON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3282 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
3283 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX, DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX,\r | |
3284 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX, DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX);\r | |
3285 | \r | |
3286 | printf ("RC6 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3287 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX, RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX,\r | |
3288 | RC6_BIT_PULSE_LEN_MIN, RC6_BIT_PULSE_LEN_MAX, RC6_BIT_PAUSE_LEN_MIN, RC6_BIT_PAUSE_LEN_MAX);\r | |
3289 | \r | |
3290 | printf ("RECS80EXT 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3291 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX, RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX,\r | |
3292 | RECS80EXT_PULSE_LEN_MIN, RECS80EXT_PULSE_LEN_MAX, RECS80EXT_0_PAUSE_LEN_MIN, RECS80EXT_0_PAUSE_LEN_MAX,\r | |
3293 | RECS80EXT_PULSE_LEN_MIN, RECS80EXT_PULSE_LEN_MAX, RECS80EXT_1_PAUSE_LEN_MIN, RECS80EXT_1_PAUSE_LEN_MAX);\r | |
3294 | \r | |
3295 | printf ("NUBERT 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3296 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX, NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX,\r | |
3297 | NUBERT_0_PULSE_LEN_MIN, NUBERT_0_PULSE_LEN_MAX, NUBERT_0_PAUSE_LEN_MIN, NUBERT_0_PAUSE_LEN_MAX,\r | |
3298 | NUBERT_1_PULSE_LEN_MIN, NUBERT_1_PULSE_LEN_MAX, NUBERT_1_PAUSE_LEN_MIN, NUBERT_1_PAUSE_LEN_MAX);\r | |
3299 | \r | |
3300 | printf ("BANG_OLUFSEN 1 %3d - %3d %3d - %3d\n",\r | |
3301 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
3302 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
3303 | \r | |
3304 | printf ("BANG_OLUFSEN 2 %3d - %3d %3d - %3d\n",\r | |
3305 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
3306 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
3307 | \r | |
3308 | printf ("BANG_OLUFSEN 3 %3d - %3d %3d - %3d\n",\r | |
3309 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
3310 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
3311 | \r | |
3312 | printf ("BANG_OLUFSEN 4 %3d - %3d %3d - %3d\n",\r | |
3313 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
3314 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
3315 | \r | |
3316 | printf ("BANG_OLUFSEN - %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3317 | BANG_OLUFSEN_PULSE_LEN_MIN, BANG_OLUFSEN_PULSE_LEN_MAX, BANG_OLUFSEN_0_PAUSE_LEN_MIN, BANG_OLUFSEN_0_PAUSE_LEN_MAX,\r | |
3318 | BANG_OLUFSEN_PULSE_LEN_MIN, BANG_OLUFSEN_PULSE_LEN_MAX, BANG_OLUFSEN_1_PAUSE_LEN_MIN, BANG_OLUFSEN_1_PAUSE_LEN_MAX);\r | |
3319 | \r | |
3320 | printf ("GRUNDIG/NOKIA 1 %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3321 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r | |
3322 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX,\r | |
3323 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_BIT_LEN_MAX);\r | |
3324 | \r | |
3325 | printf ("SIEMENS/RUWIDO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3326 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3327 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
3328 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX,\r | |
3329 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX,\r | |
3330 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN_2, SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX_2,\r | |
3331 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN_2, SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX_2);\r | |
3332 | \r | |
3333 | printf ("FDC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3334 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX,\r | |
3335 | FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_0_PAUSE_LEN_MIN, FDC_0_PAUSE_LEN_MAX,\r | |
3336 | FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_1_PAUSE_LEN_MIN, FDC_1_PAUSE_LEN_MAX);\r | |
3337 | \r | |
3338 | printf ("RCCAR 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3339 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX, RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX,\r | |
3340 | RCCAR_PULSE_LEN_MIN, RCCAR_PULSE_LEN_MAX, RCCAR_0_PAUSE_LEN_MIN, RCCAR_0_PAUSE_LEN_MAX,\r | |
3341 | RCCAR_PULSE_LEN_MIN, RCCAR_PULSE_LEN_MAX, RCCAR_1_PAUSE_LEN_MIN, RCCAR_1_PAUSE_LEN_MAX);\r | |
3342 | \r | |
3343 | printf ("NIKON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3344 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX, NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX,\r | |
3345 | NIKON_PULSE_LEN_MIN, NIKON_PULSE_LEN_MAX, NIKON_0_PAUSE_LEN_MIN, NIKON_0_PAUSE_LEN_MAX,\r | |
3346 | NIKON_PULSE_LEN_MIN, NIKON_PULSE_LEN_MAX, NIKON_1_PAUSE_LEN_MIN, NIKON_1_PAUSE_LEN_MAX);\r | |
3347 | }\r | |
3348 | \r | |
3349 | void\r | |
3350 | print_spectrum (char * text, int * buf, int is_pulse)\r | |
3351 | {\r | |
3352 | int i;\r | |
3353 | int j;\r | |
3354 | int min;\r | |
3355 | int max;\r | |
3356 | int max_value = 0;\r | |
3357 | int value;\r | |
3358 | int sum = 0;\r | |
3359 | int counter = 0;\r | |
3360 | double average = 0;\r | |
3361 | double tolerance;\r | |
3362 | \r | |
3363 | puts ("-------------------------------------------------------------------------------");\r | |
3364 | printf ("%s:\n", text);\r | |
3365 | \r | |
3366 | for (i = 0; i < 256; i++)\r | |
3367 | {\r | |
3368 | if (buf[i] > max_value)\r | |
3369 | {\r | |
3370 | max_value = buf[i];\r | |
3371 | }\r | |
3372 | }\r | |
3373 | \r | |
3374 | for (i = 1; i < 100; i++)\r | |
3375 | {\r | |
3376 | if (buf[i] > 0)\r | |
3377 | {\r | |
3378 | printf ("%3d ", i);\r | |
3379 | value = (buf[i] * 60) / max_value;\r | |
3380 | \r | |
3381 | for (j = 0; j < value; j++)\r | |
3382 | {\r | |
3383 | putchar ('o');\r | |
3384 | }\r | |
3385 | printf (" %d\n", buf[i]);\r | |
3386 | \r | |
3387 | sum += i * buf[i];\r | |
3388 | counter += buf[i];\r | |
3389 | }\r | |
3390 | else\r | |
3391 | {\r | |
3392 | max = i - 1;\r | |
3393 | \r | |
3394 | if (counter > 0)\r | |
3395 | {\r | |
3396 | average = (float) sum / (float) counter;\r | |
3397 | \r | |
3398 | if (is_pulse)\r | |
3399 | {\r | |
3400 | printf ("pulse ");\r | |
3401 | }\r | |
3402 | else\r | |
3403 | {\r | |
3404 | printf ("pause ");\r | |
3405 | }\r | |
3406 | \r | |
3407 | printf ("avg: %4.1f=%6.1f us, ", average, (1000000. * average) / (float) F_INTERRUPTS);\r | |
3408 | printf ("min: %2d=%6.1f us, ", min, (1000000. * min) / (float) F_INTERRUPTS);\r | |
3409 | printf ("max: %2d=%6.1f us, ", max, (1000000. * max) / (float) F_INTERRUPTS);\r | |
3410 | \r | |
3411 | tolerance = (max - average);\r | |
3412 | \r | |
3413 | if (average - min > tolerance)\r | |
3414 | {\r | |
3415 | tolerance = average - min;\r | |
3416 | }\r | |
3417 | \r | |
3418 | tolerance = tolerance * 100 / average;\r | |
3419 | printf ("tol: %4.1f%%\n", tolerance);\r | |
3420 | }\r | |
3421 | \r | |
3422 | counter = 0;\r | |
3423 | sum = 0;\r | |
3424 | min = i + 1;\r | |
3425 | }\r | |
3426 | }\r | |
3427 | }\r | |
3428 | \r | |
3429 | #define STATE_LEFT_SHIFT 0x01\r | |
3430 | #define STATE_RIGHT_SHIFT 0x02\r | |
3431 | #define STATE_LEFT_CTRL 0x04\r | |
3432 | #define STATE_LEFT_ALT 0x08\r | |
3433 | #define STATE_RIGHT_ALT 0x10\r | |
3434 | \r | |
3435 | #define KEY_ESCAPE 0x1B // keycode = 0x006e\r | |
3436 | #define KEY_MENUE 0x80 // keycode = 0x0070\r | |
3437 | #define KEY_BACK 0x81 // keycode = 0x0071\r | |
3438 | #define KEY_FORWARD 0x82 // keycode = 0x0072\r | |
3439 | #define KEY_ADDRESS 0x83 // keycode = 0x0073\r | |
3440 | #define KEY_WINDOW 0x84 // keycode = 0x0074\r | |
3441 | #define KEY_1ST_PAGE 0x85 // keycode = 0x0075\r | |
3442 | #define KEY_STOP 0x86 // keycode = 0x0076\r | |
3443 | #define KEY_MAIL 0x87 // keycode = 0x0077\r | |
3444 | #define KEY_FAVORITES 0x88 // keycode = 0x0078\r | |
3445 | #define KEY_NEW_PAGE 0x89 // keycode = 0x0079\r | |
3446 | #define KEY_SETUP 0x8A // keycode = 0x007a\r | |
3447 | #define KEY_FONT 0x8B // keycode = 0x007b\r | |
3448 | #define KEY_PRINT 0x8C // keycode = 0x007c\r | |
3449 | #define KEY_ON_OFF 0x8E // keycode = 0x007c\r | |
3450 | \r | |
3451 | #define KEY_INSERT 0x90 // keycode = 0x004b\r | |
3452 | #define KEY_DELETE 0x91 // keycode = 0x004c\r | |
3453 | #define KEY_LEFT 0x92 // keycode = 0x004f\r | |
3454 | #define KEY_HOME 0x93 // keycode = 0x0050\r | |
3455 | #define KEY_END 0x94 // keycode = 0x0051\r | |
3456 | #define KEY_UP 0x95 // keycode = 0x0053\r | |
3457 | #define KEY_DOWN 0x96 // keycode = 0x0054\r | |
3458 | #define KEY_PAGE_UP 0x97 // keycode = 0x0055\r | |
3459 | #define KEY_PAGE_DOWN 0x98 // keycode = 0x0056\r | |
3460 | #define KEY_RIGHT 0x99 // keycode = 0x0059\r | |
3461 | #define KEY_MOUSE_1 0x9E // keycode = 0x0400\r | |
3462 | #define KEY_MOUSE_2 0x9F // keycode = 0x0800\r | |
3463 | \r | |
3464 | static uint8_t\r | |
3465 | get_fdc_key (uint16_t cmd)\r | |
3466 | {\r | |
3467 | static uint8_t key_table[128] =\r | |
3468 | {\r | |
3469 | // 0 1 2 3 4 5 6 7 8 9 A B C D E F\r | |
3470 | Content-type: text/html ]>