]> cloudbase.mooo.com Git - irmp.git/blobdiff - irsndconfig.h
Merge branch 'libopencm3' of cu.loc:git/irmp into libopencm3
[irmp.git] / irsndconfig.h
index 14d6dd6a7bd68d89722ccd04455ea42c8fb29190..4f58bdafb9209fda75b5f8cf2d03c0f2d63b80a6 100644 (file)
@@ -3,9 +3,9 @@
  *\r
  * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRSND.H!\r
  *\r
- * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2016 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irsndconfig.h,v 1.64 2015/01/26 13:09:28 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.89 2016/12/19 09:01:41 fm Exp $\r
  *\r
  * This program is free software; you can redistribute it and/or modify\r
  * it under the terms of the GNU General Public License as published by\r
@@ -21,7 +21,7 @@
 #  error please include only irsnd.h, not irsndconfig.h\r
 #endif\r
 \r
-//~ #define IRSND_DEBUG 1                                   // activate debugging\r
+// #define IRSND_DEBUG 1                                // activate debugging\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000\r
@@ -48,7 +48,7 @@
 \r
 // more protocols, enable here!                 Enable  Remarks                 F_INTERRUPTS            Program Space\r
 #define IRSND_SUPPORT_DENON_PROTOCOL            0       // DENON, Sharp         >= 10000                 ~200 bytes\r
-#define IRSND_SUPPORT_RC5_PROTOCOL              0       // RC5                  >= 10000                 ~150 bytes\r
+#define IRSND_SUPPORT_RC5_PROTOCOL              1       // RC5                  >= 10000                 ~150 bytes\r
 #define IRSND_SUPPORT_RC6_PROTOCOL              0       // RC6                  >= 10000                 ~250 bytes\r
 #define IRSND_SUPPORT_RC6A_PROTOCOL             0       // RC6A                 >= 10000                 ~250 bytes\r
 #define IRSND_SUPPORT_JVC_PROTOCOL              0       // JVC                  >= 10000                 ~150 bytes\r
 #define IRSND_SUPPORT_NOKIA_PROTOCOL            0       // Nokia                >= 10000                 ~400 bytes\r
 \r
 // exotic protocols, enable here!               Enable  Remarks                 F_INTERRUPTS            Program Space\r
+#define IRSND_SUPPORT_BOSE_PROTOCOL             0       // BOSE                 >= 10000                 ~100 bytes\r
 #define IRSND_SUPPORT_KATHREIN_PROTOCOL         0       // Kathrein             >= 10000                 DON'T CHANGE, NOT SUPPORTED YET!\r
 #define IRSND_SUPPORT_NUBERT_PROTOCOL           0       // NUBERT               >= 10000                 ~100 bytes\r
+#define IRSND_SUPPORT_FAN_PROTOCOL              0       // FAN (ventilator)     >= 10000                 ~100 bytes\r
 #define IRSND_SUPPORT_SPEAKER_PROTOCOL          0       // SPEAKER              >= 10000                 ~100 bytes\r
 #define IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL     0       // Bang&Olufsen         >= 10000                 ~250 bytes\r
 #define IRSND_SUPPORT_RECS80_PROTOCOL           0       // RECS80               >= 15000                 ~100 bytes\r
 #define IRSND_SUPPORT_RCMM_PROTOCOL             0       // RCMM 12,24, or 32    >= 20000                 DON'T CHANGE, NOT SUPPORTED YET!\r
 #define IRSND_SUPPORT_LGAIR_PROTOCOL            0       // LG Air Condition     >= 10000                 ~150 bytes.\r
 #define IRSND_SUPPORT_SAMSUNG48_PROTOCOL        0       // Samsung48            >= 10000                 ~100 bytes\r
+#define IRSND_SUPPORT_PENTAX_PROTOCOL           0       // Pentax               >= 10000                 ~150 bytes\r
+#define IRSND_SUPPORT_S100_PROTOCOL             0       // S100                 >= 10000                 ~150 bytes\r
+#define IRSND_SUPPORT_ACP24_PROTOCOL            0       // ACP24                >= 10000                 ~150 bytes\r
+#define IRSND_SUPPORT_TECHNICS_PROTOCOL         0       // TECHNICS             >= 10000                 DON'T CHANGE, NOT SUPPORTED YET!\r
+#define IRSND_SUPPORT_PANASONIC_PROTOCOL        0       // PANASONIC Beamer     >= 10000                 ~150 bytes\r
+#define IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL      0       // Mitsubishi-Heavy Aircondition, similar Timing to Panasonic beamer\r
+\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * AVR XMega section:\r
+ *\r
+ * Change hardware pin here:                    IRSND_XMEGA_OC0A = OC0A on ATxmegas  supporting OC0A, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC0B = OC0B on ATxmegas  supporting OC0B, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC0C = OC0C on ATxmegas  supporting OC0C, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC0D = OC0D on ATxmegas  supporting OC0D, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC1A = OC1A on ATxmegas  supporting OC1A, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC1B = OC1B on ATxmegas  supporting OC1B, e.g. ATxmega128A1U\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#if defined(__AVR_XMEGA__)                                              // XMEGA\r
+#  define IRSND_PORT_PRE                        PORTD\r
+#  define XMEGA_Timer                           TCD0\r
+#  define IRSND_OCx                             IRSND_XMEGA_OC0B        // use OC0B\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * AVR section:\r
+ * AVR ATMega/ATTiny section:\r
  *\r
  * Change hardware pin here:                    IRSND_OC2  = OC2  on ATmegas         supporting OC2,  e.g. ATmega8\r
  *                                              IRSND_OC2A = OC2A on ATmegas         supporting OC2A, e.g. ATmega88\r
  *                                              IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
-#if defined(ATMEL_AVR)\r
+#elif defined(ATMEL_AVR)\r
 #  define IRSND_OCx                             IRSND_OC2B              // use OC2B\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 #elif defined(PIC_C18)                                                  // C18 or XC8 compiler\r
-# if defined(__12F1840)                                                 // XC8 compiler\r
-#  define Pre_Scaler                            1                       // define prescaler for timer2 e.g. 1,4,16\r
-#  define F_CPU                                 32000000UL              // PIC frequency: set your freq here\r
-#  define PIC_Scaler                            2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+#  if defined(__12F1840)                                                // XC8 compiler\r
+#    define Pre_Scaler                          1                       // define prescaler for timer2 e.g. 1,4,16\r
+#    define F_CPU                               32000000UL              // PIC frequency: set your freq here\r
+#    define PIC_Scaler                          2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
 \r
-# else                                                                  // C18 compiler\r
-#  define IRSND_OCx                             IRSND_PIC_CCP2          // Use PWMx for PIC\r
+#  else                                                                 // C18 compiler\r
+#    define IRSND_OCx                           IRSND_PIC_CCP2          // Use PWMx for PIC\r
                                                                         // change other PIC C18 specific settings:\r
-#  define F_CPU                                 48000000UL              // PIC frequency: set your freq here\r
-#  define Pre_Scaler                            4                       // define prescaler for timer2 e.g. 1,4,16\r
-#  define PIC_Scaler                            2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
-# endif\r
+#    define F_CPU                               48000000UL              // PIC frequency: set your freq here\r
+#    define Pre_Scaler                          4                       // define prescaler for timer2 e.g. 1,4,16\r
+#    define PIC_Scaler                          2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+#  endif\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * ARM STM32 section:\r
 #  define IRSND_TIMER_CHANNEL_NUMBER            1                       // only channel 1 can be used at the moment, others won't work\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Other target system\r
+ * ARM STM32 with libopencm3 section:\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#elif defined (LIBOPENCM3)                                              // use B6 as IR output on STM32 whith libopencm3\r
+#  define IRSND_PORT_LETTER                     B\r
+#  define IRSND_BIT_NUMBER                      9\r
+#  define IRSND_TIMER_NUMBER                    4\r
+#  define IRSND_TIMER_CHANNEL_NUMBER            4\r
+#  define F_CPU                                                         // KLUDGE: make irsnd.c happy (TODO:)\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * Teensy 3.x with teensyduino gcc compiler\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#elif defined (TEENSY_ARM_CORTEX_M4)\r
+#  define IRSND_PIN                             5                       // choose an arduino pin with PWM function!\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * ESP8266 (Arduino, see IRSEND.ino)\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#elif defined (__xtensa__)\r
+#  define IRSND_PIN                             0                       // choose an arduino pin with PWM function!\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * Other target systems\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 #elif !defined (UNIX_OR_WINDOWS)\r