Version 2.8.0: port to AVR XMEGA

[irmp.git] / irsndconfig.h

diff --git a/irsndconfig.h b/irsndconfig.h
index 14d6dd6a7bd68d89722ccd04455ea42c8fb29190..9399b9bef3fc710da8ef03b9b2991e418af09296 100644 (file)
--- a/irsndconfig.h
+++ b/irsndconfig.h
@@ -5,7 +5,7 @@
  *\r
  * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irsndconfig.h,v 1.64 2015/01/26 13:09:28 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.65 2015/02/26 15:42:53 fm Exp $\r
  *\r
  * This program is free software; you can redistribute it and/or modify\r
  * it under the terms of the GNU General Public License as published by\r
@@ -81,8 +81,25 @@
 #define IRSND_SUPPORT_LGAIR_PROTOCOL            0       // LG Air Condition     >= 10000                 ~150 bytes.\r
 #define IRSND_SUPPORT_SAMSUNG48_PROTOCOL        0       // Samsung48            >= 10000                 ~100 bytes\r
 \r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * AVR XMega section:\r
+ *\r
+ * Change hardware pin here:                    IRSND_XMEGA_OC0A = OC0A on ATxmegas  supporting OC0A, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC0B = OC0B on ATxmegas  supporting OC0B, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC0C = OC0C on ATxmegas  supporting OC0C, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC0D = OC0D on ATxmegas  supporting OC0D, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC1A = OC0A on ATxmegas  supporting OC1A, e.g. ATxmega128A1U\r
+ *                                              IRSND_XMEGA_OC1B = OC0B on ATxmegas  supporting OC1B, e.g. ATxmega128A1U\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#if defined(__AVR_XMEGA__)                                              // XMEGA\r
+#  define XMEGA_Timer_NR                        2                       // 1 == Timer PORTC //2 == Timer PORTD //3 == Timer PORTE //4 == Timer PORTF\r
+#  define XMEGA_Timer                           TCD0\r
+#  define IRSND_OCx                             IRSND_XMEGA_OC0B        // use OC0B\r
+\r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * AVR section:\r
+ * AVR ATMega/ATTiny section:\r
  *\r
  * Change hardware pin here:                    IRSND_OC2  = OC2  on ATmegas         supporting OC2,  e.g. ATmega8\r
  *                                              IRSND_OC2A = OC2A on ATmegas         supporting OC2A, e.g. ATmega88\r
@@ -92,7 +109,7 @@
  *                                              IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
-#if defined(ATMEL_AVR)\r
+#elif defined(ATMEL_AVR)\r
 #  define IRSND_OCx                             IRSND_OC2B              // use OC2B\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
@@ -103,18 +120,18 @@
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 #elif defined(PIC_C18)                                                  // C18 or XC8 compiler\r
-# if defined(__12F1840)                                                 // XC8 compiler\r
-#  define Pre_Scaler                            1                       // define prescaler for timer2 e.g. 1,4,16\r
-#  define F_CPU                                 32000000UL              // PIC frequency: set your freq here\r
-#  define PIC_Scaler                            2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+#  if defined(__12F1840)                                                // XC8 compiler\r
+#    define Pre_Scaler                          1                       // define prescaler for timer2 e.g. 1,4,16\r
+#    define F_CPU                               32000000UL              // PIC frequency: set your freq here\r
+#    define PIC_Scaler                          2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
 \r
-# else                                                                  // C18 compiler\r
-#  define IRSND_OCx                             IRSND_PIC_CCP2          // Use PWMx for PIC\r
+#  else                                                                 // C18 compiler\r
+#    define IRSND_OCx                           IRSND_PIC_CCP2          // Use PWMx for PIC\r
                                                                         // change other PIC C18 specific settings:\r
-#  define F_CPU                                 48000000UL              // PIC frequency: set your freq here\r
-#  define Pre_Scaler                            4                       // define prescaler for timer2 e.g. 1,4,16\r
-#  define PIC_Scaler                            2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
-# endif\r
+#    define F_CPU                               48000000UL              // PIC frequency: set your freq here\r
+#    define Pre_Scaler                          4                       // define prescaler for timer2 e.g. 1,4,16\r
+#    define PIC_Scaler                          2                       // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+#  endif\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * ARM STM32 section:\r
@@ -127,7 +144,7 @@
 #  define IRSND_TIMER_CHANNEL_NUMBER            1                       // only channel 1 can be used at the moment, others won't work\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Other target system\r
+ * Other target systems\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 #elif !defined (UNIX_OR_WINDOWS)\r