Version 2.4.0:

[irmp.git] / irsnd.h

diff --git a/irsnd.h b/irsnd.h
index 88f6d314c165a87ef21e2a84b6b00f63d27e69b1..28f90df84fd75fb04ae0aa8844a27cc933c4107c 100644 (file)
--- a/irsnd.h
+++ b/irsnd.h
@@ -1,9 +1,9 @@
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * irsnd.h\r
  *\r
- * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irsnd.h,v 1.12 2012/05/23 12:26:26 fm Exp $\r
+ * $Id: irsnd.h,v 1.17 2014/02/19 12:57:36 fm Exp $\r
  *\r
  * ATMEGA88 @ 8 MHz\r
  *\r
@@ -37,6 +37,7 @@
 #  endif\r
 #  define IRSND_BIT                             CONCAT(GPIO_Pin_, IRSND_BIT_NUMBER)\r
 #  define IRSND_TIMER                           CONCAT(TIM, IRSND_TIMER_NUMBER)\r
+#  define IRSND_TIMER_CHANNEL                   CONCAT(TIM_Channel_, IRSND_TIMER_CHANNEL_NUMBER)\r
 #  if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
 #    define IRSND_TIMER_RCC                     CONCAT(RCC_APB1Periph_TIM, IRSND_TIMER_NUMBER)\r
 #  elif (IRSND_TIMER_NUMBER == 1) || ((IRSND_TIMER_NUMBER >= 8) && (IRSND_TIMER_NUMBER <= 11))\r
@@ -52,12 +53,16 @@
 // Do not change lines below until you have a different HW. Example is for 18F2550/18F4550\r
 // setup macro for PWM used PWM module\r
 #  if IRSND_OCx == IRSND_PIC_CCP2        \r
+#    define PWMon()                             TMR2=0,CCP2CON |=0b1100\r
+#    define PWMoff()                            CCP2CON &=(~0b1100)\r
 #    define IRSND_PIN                           TRISCbits.TRISC1        // RC1 = PWM2\r
 #    define SetDCPWM(x)                         SetDCPWM2(x)                    \r
 #    define ClosePWM                            ClosePWM2\r
 #    define OpenPWM(x)                          OpenPWM2(x) \r
 #  endif\r
 #  if IRSND_OCx == IRSND_PIC_CCP1        \r
+#    define PWMon()                             TMR2=0,CCP1CON |=0b1100\r
+#    define PWMoff()                            CCP1CON &=(~0b1100)\r
 #    define IRSND_PIN                           TRISCbits.TRISC2        // RC2 = PWM1\r
 #    define SetDCPWM(x)                         SetDCPWM1(x)\r
 #    define ClosePWM                            ClosePWM1\r
@@ -81,14 +86,20 @@
 #  define IRSND_SUPPORT_SIEMENS_PROTOCOL        0\r
 #endif\r
 \r
-#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
-#  warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 20000)\r
+#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+#  warning F_INTERRUPTS too low, A1TVBOX protocol disabled (should be at least 15000)\r
+#  undef IRSND_SUPPORT_A1TVBOX_PROTOCOL\r
+#  define IRSND_SUPPORT_A1TVBOX_PROTOCOL        0\r
+#endif\r
+\r
+#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+#  warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 15000)\r
 #  undef IRSND_SUPPORT_RECS80_PROTOCOL\r
 #  define IRSND_SUPPORT_RECS80_PROTOCOL         0\r
 #endif\r
 \r
-#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
-#  warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 20000)\r
+#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+#  warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 15000)\r
 #  undef IRSND_SUPPORT_RECS80EXT_PROTOCOL\r
 #  define IRSND_SUPPORT_RECS80EXT_PROTOCOL      0\r
 #endif\r