/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* @file irsnd.c\r
*\r
- * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2016 Frank Meyer - frank(at)fli4l.de\r
*\r
* Supported AVR mikrocontrollers:\r
*\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.99 2015/12/16 14:12:17 fm Exp $\r
+ * $Id: irsnd.c,v 1.103 2017/02/17 09:13:06 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
# endif // IRSND_OCx\r
\r
#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
-# if IRSND_OCx == IRSND_OC0 \r
+# if IRSND_OCx == IRSND_OC0\r
# define IRSND_PORT_LETTER B\r
# define IRSND_BIT_NUMBER 0\r
-# elif IRSND_OCx == IRSND_OC1A \r
+# elif IRSND_OCx == IRSND_OC1A\r
# define IRSND_PORT_LETTER D\r
# define IRSND_BIT_NUMBER 5\r
-# elif IRSND_OCx == IRSND_OC1B \r
+# elif IRSND_OCx == IRSND_OC1B\r
# define IRSND_PORT_LETTER E\r
# define IRSND_BIT_NUMBER 2\r
# endif // IRSND_OCx\r
\r
#elif defined (__AVR_XMEGA__) // ATxmega\r
-# if IRSND_OCx == IRSND_XMEGA_OC0A \r
+# if IRSND_OCx == IRSND_XMEGA_OC0A\r
# define IRSND_BIT_NUMBER 0\r
# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
# define IRSND_BIT_NUMBER 1\r
# error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h\r
# endif // IRSND_OCx\r
\r
-#elif defined (PIC_C18) //Microchip C18 compiler\r
+#elif defined (PIC_C18) // Microchip C18 compiler\r
//Nothing here to do here -> See irsndconfig.h\r
-#elif defined (ARM_STM32) //STM32\r
+#elif defined (ARM_STM32) // STM32\r
//Nothing here to do here -> See irsndconfig.h\r
-#elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3\r
-# if !digitalPinHasPWM(IRSND_PIN)\r
-# error need pin with PWM output.\r
-# endif\r
+#elif defined (__xtensa__) // ESP8266\r
+ //Nothing here to do here -> See irsndconfig.h\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * Macro digitalPinHasPWM bothers PIC_C18 compiler, but why?\r
+ *\r
+ * #elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3\r
+ * # if !digitalPinHasPWM(IRSND_PIN)\r
+ * # error need pin with PWM output.\r
+ * # endif\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
#else\r
# if !defined (unix) && !defined (WIN32)\r
# error mikrocontroller not defined, please fill in definitions here.\r
#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
-#define PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5)\r
-#define PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5)\r
-#define PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5)\r
-#define PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5)\r
-#define PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5)\r
-#define PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5)\r
+#define PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5)\r
+#define PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5)\r
+#define PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5)\r
+#define PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5)\r
+#define PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define MITSU_HEAVY_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME + 0.5)\r
+#define MITSU_HEAVY_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME + 0.5)\r
+#define MITSU_HEAVY_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME + 0.5)\r
+#define MITSU_HEAVY_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME + 0.5)\r
+#define MITSU_HEAVY_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME + 0.5)\r
+#define MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MITSU_HEAVY_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
+#elif defined (__xtensa__) // ESP8266\r
+# define IRSND_FREQ_TYPE float\r
+# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
+# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
+# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
+# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
+# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
+# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
+# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
#else // AVR\r
# if F_CPU >= 16000000L\r
# define AVR_PRESCALER 8\r
\r
static volatile uint8_t irsnd_busy = 0;\r
static volatile uint8_t irsnd_protocol = 0;\r
-static volatile uint8_t irsnd_buffer[9] = {0};\r
+static volatile uint8_t irsnd_buffer[11] = {0};\r
static volatile uint8_t irsnd_repeat = 0;\r
static volatile uint8_t irsnd_is_on = FALSE;\r
\r
# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r
analogWrite(IRSND_PIN, 33 * 255 / 100); // pwm 33%\r
\r
-# elif defined (__AVR_XMEGA__) \r
+# elif defined (__xtensa__) // ESP8266 (Arduino)\r
+ analogWrite(IRSND_PIN, 33 * 1023 / 100); // pwm 33%\r
+\r
+# elif defined (__AVR_XMEGA__)\r
# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
- XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A\r
# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
- XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B\r
# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
if (irsnd_is_on)\r
{\r
#ifndef ANALYZE\r
- \r
-# if defined(PIC_C18) // PIC C18\r
+\r
+# if defined(PIC_C18) // PIC C18\r
PWMoff();\r
// IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
\r
-# elif defined (ARM_STM32) // STM32\r
- TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
- TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
- TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
- TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
+# elif defined (ARM_STM32) // STM32\r
+ TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
+ TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
+ TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
+ TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
\r
-# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r
- analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r
+ analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+\r
+# elif defined (__xtensa__) // ESP8266\r
+ analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
\r
# elif defined (__AVR_XMEGA__)\r
-# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A \r
+# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
-# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B \r
+# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
- XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
- XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
# else\r
# error wrong value of IRSND_OCx\r
# endif // IRSND_OCx\r
#ifndef ANALYZE\r
# if defined(PIC_C18) // PIC C18 or XC8\r
# if defined(__12F1840) // XC8\r
- TRISA2=0; \r
+ TRISA2=0;\r
PR2=freq;\r
CCP1M0=1;\r
CCP1M1=1;\r
TMR2ON=1;\r
CCP1CON &=(~0b0011); // p 197 "active high"\r
# else // PIC C18\r
- OpenPWM(freq); \r
+ OpenPWM(freq);\r
SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
# endif\r
PWMoff();\r
TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
\r
# elif defined (TEENSY_ARM_CORTEX_M4)\r
- analogWriteResolution(8); // 8 bit\r
+ analogWriteResolution(8); // 8 bit\r
analogWriteFrequency(IRSND_PIN, freq);\r
- analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+ analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+\r
+#elif defined (__xtensa__)\r
+ // analogWriteRange(255);\r
+ analogWriteFreq(freq);\r
+ analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
\r
# elif defined (__AVR_XMEGA__)\r
XMEGA_Timer.CCA = freq;\r
return;\r
}\r
\r
+# elif defined (__xtensa__)\r
+ pinMode(IRSND_PIN, OUTPUT);\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
+\r
# elif defined (__AVR_XMEGA__)\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
# else\r
XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1\r
# endif\r
- \r
+\r
# else // AVR\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r
+ case IRMP_MITSU_HEAVY_PROTOCOL:\r
+ {\r
+ address = irmp_data_p->address;\r
+ command = irmp_data_p->command;\r
+\r
+ irsnd_buffer[0] = 0x4A;\r
+ irsnd_buffer[1] = 0x75;\r
+ irsnd_buffer[2] = 0xC3;\r
+ irsnd_buffer[3] = 0x64;\r
+ irsnd_buffer[4] = 0x9B;\r
+ irsnd_buffer[5] = ~(address & 0xFF00) >> 8;\r
+ irsnd_buffer[6] = (address & 0xFF00) >> 8;\r
+ irsnd_buffer[7] = ~(address & 0x00FF);\r
+ irsnd_buffer[8] = (address & 0x00FF);\r
+ irsnd_buffer[9] = ~(command & 0x00FF);\r
+ irsnd_buffer[10] = (command & 0x00FF);\r
+\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
case IRMP_RECS80_PROTOCOL:\r
{\r
- toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
+ toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x80;\r
\r
- irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
- ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
- irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
+ irsnd_buffer[0] = toggle_bit_recs80 | ((irmp_data_p->address & 0x000F) << 4) |\r
+ ((irmp_data_p->command & 0x003C) >> 2); // TAAACCCC\r
+ irsnd_buffer[1] = (irmp_data_p->command & 0x03) << 6; // CC000000\r
irsnd_busy = TRUE;\r
break;\r
}\r
\r
irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
- \r
+\r
irsnd_busy = TRUE;\r
break;\r
}\r
// 1 2 3 4 5 6\r
// 0123456789012345678901234567890123456789012345678901234567890123456789\r
// N VVMMM ? ??? t vmA x y TTTT\r
- // \r
+ //\r
// irmp_data_p->command:\r
- // \r
+ //\r
// 5432109876543210\r
// NAVVvMMMmtxyTTTT\r
\r
send_trailer = FALSE;\r
return irsnd_busy;\r
}\r
- \r
+\r
n_repeat_frames = irsnd_repeat;\r
\r
if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r
+ case IRMP_MITSU_HEAVY_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = MITSU_HEAVY_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = MITSU_HEAVY_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = MITSU_HEAVY_PULSE_LEN;\r
+ pause_1_len = MITSU_HEAVY_1_PAUSE_LEN - 1;\r
+ pulse_0_len = MITSU_HEAVY_PULSE_LEN;\r
+ pause_0_len = MITSU_HEAVY_0_PAUSE_LEN - 1;\r
+ has_stop_bit = MITSU_HEAVY_STOP_BIT;\r
+ complete_data_len = MITSU_HEAVY_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = MITSU_HEAVY_FRAMES; // 1 frame\r
+ auto_repetition_pause_len = 0;;\r
+ repeat_frame_pause_len = MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
case IRMP_RECS80_PROTOCOL:\r
{\r
#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1\r
case IRMP_PANASONIC_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r
+ case IRMP_MITSU_HEAVY_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
case IRMP_RECS80_PROTOCOL:\r
#endif\r
IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \\r
IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \\r
- IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 || IRSND_SUPPORT_BOSE_PROTOCOL == 1\r
+ IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 || IRSND_SUPPORT_BOSE_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r
{\r
if (pulse_counter == 0)\r
{\r