/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * irsndmain.c - demo main module to test irmp decoder\r
+ * irsndmain.c - demo main module to test IRSND encoder on AVRs\r
*\r
- * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * ATMEGA88 @ 8 MHz\r
- *\r
- * Fuses: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9\r
+ * ATMEGA88 @ 8 MHz internal RC Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9\r
+ * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
* (at your option) any later version.\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-\r
-#include <inttypes.h>\r
-#include <avr/io.h>\r
-#include <util/delay.h>\r
-#include <avr/pgmspace.h>\r
-#include <avr/interrupt.h>\r
-#include "irmp.h"\r
-#include "irsndconfig.h"\r
#include "irsnd.h"\r
\r
#ifndef F_CPU\r
-#error F_CPU unkown\r
+# error F_CPU unkown\r
#endif\r
\r
void\r
timer1_init (void)\r
{\r
-#if defined (__AVR_ATtiny85__) // ATtiny85:\r
- OCR1A = (F_CPU / (2 * F_INTERRUPTS) / 2) - 1; // compare value: 1/28800 of CPU frequency, presc = 2\r
- TCCR1 = (1 << CTC1) | (1 << CS11); // switch CTC Mode on, set prescaler to 2\r
-#else // ATmegaXX:\r
- OCR1A = (F_CPU / (2 * F_INTERRUPTS)) - 1; // compare value: 1/28800 of CPU frequency\r
- TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1\r
+#if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:\r
+ OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4\r
+ TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4\r
+#else // ATmegaXX:\r
+ OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency\r
+ TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1\r
#endif\r
\r
#ifdef TIMSK1\r
- TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r
+ TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r
#else\r
- TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r
+ TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r
#endif\r
}\r
\r
+#ifdef TIM1_COMPA_vect // ATtiny84\r
+#define COMPA_VECT TIM1_COMPA_vect\r
+#else\r
+#define COMPA_VECT TIMER1_COMPA_vect // ATmega\r
+#endif\r
+\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* timer 1 compare handler, called every 1/10000 sec\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-ISR(TIMER1_COMPA_vect)\r
+ISR(COMPA_VECT) // Timer1 output compare A interrupt service routine, called every 1/15000 sec\r
{\r
(void) irsnd_ISR(); // call irsnd ISR\r
// call other timer interrupt routines here...\r
{\r
IRMP_DATA irmp_data;\r
\r
- irsnd_init(); // initialize irsnd\r
- timer1_init(); // initialize timer\r
- sei (); // enable interrupts\r
+ irsnd_init(); // initialize irsnd\r
+ timer1_init(); // initialize timer\r
+ sei (); // enable interrupts\r
\r
for (;;)\r
{\r
- irmp_data.protocol = IRMP_NEC_PROTOCOL;\r
- irmp_data.address = 0x00FF;\r
- irmp_data.command = 0x0001;\r
- irmp_data.flags = 0;\r
+ irmp_data.protocol = IRMP_NEC_PROTOCOL; // use NEC protocol\r
+ irmp_data.address = 0x00FF; // set address to 0x00FF\r
+ irmp_data.command = 0x0001; // set command to 0x0001\r
+ irmp_data.flags = 0; // don't repeat frame\r
\r
- irsnd_send_data (&irmp_data, TRUE);\r
+ irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion\r
_delay_ms (1000);\r
}\r
}\r