* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.46 2012/02/15 11:02:42 fm Exp $\r
+ * $Id: irsnd.c,v 1.45 2012/02/13 11:02:29 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
+#if defined(__18CXX) \r
+#define PIC_C18 // Microchip C18\r
+#include <p18cxxx.h> // basic P18 lib\r
+#include "timers.h" // timer lib\r
+#include "pwm.h" // pwm lib\r
+#endif \r
+\r
#ifdef unix // test/debug on linux/unix\r
#include <stdio.h>\r
#include <unistd.h>\r
#else\r
\r
#ifdef CODEVISION\r
- #define COM2A0 6\r
- #define WGM21 1\r
- #define CS20 0\r
+#define COM2A0 6\r
+#define WGM21 1\r
+#define CS20 0\r
+#elif defined(PIC_C18)\r
+ //nothing to do here\r
#else\r
- #include <inttypes.h>\r
- #include <util/delay.h>\r
-
#include <avr/pgmspace.h>
\r+#include <inttypes.h>\r
+#include <avr/io.h>\r
+#include <util/delay.h>\r
+#include <avr/pgmspace.h>\r
#endif // CODEVISION\r
\r
#endif // WIN32\r
#include "irsndconfig.h"\r
#include "irsnd.h"\r
\r
-/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * ATtiny pin definition of OC0A / OC0B\r
- * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- */\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* ATtiny pin definition of OC0A / OC0B\r
* ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
#define IRSND_PORT PORTB // port B\r
#define IRSND_DDR DDRB // ddr B\r
#define IRSND_BIT 1 // OC2\r
+\r
#elif IRSND_OCx == IRSND_OC0 // OC0\r
#define IRSND_PORT PORTB // port B\r
#define IRSND_DDR DDRB // ddr B\r
#error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
#endif // IRSND_OCx\r
\r
+#elif defined (PIC_C18) //Microchip C18 compiler\r
+ //Nothing here to do here -> See irsndconfig.h\r
+\r
#else\r
#if !defined (unix) && !defined (WIN32)\r
#error mikrocontroller not defined, please fill in definitions here.\r
#endif // __AVR...\r
\r
#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
-typedef uint16_t IRSND_PAUSE_LEN;\r
+ typedef uint16_t IRSND_PAUSE_LEN;\r
#else\r
-typedef uint8_t IRSND_PAUSE_LEN;\r
+ typedef uint8_t IRSND_PAUSE_LEN;\r
#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
-#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
-#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
+#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
+#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
+\r
+#ifdef PIC_C18\r
+#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#else // AVR\r
#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2) - 1)\r
#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2) - 1)\r
#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2) - 1)\r
#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2) - 1)\r
#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2) - 1)\r
#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2) - 1)\r
+#endif\r
\r
#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
-static volatile uint8_t irsnd_busy;\r
-static volatile uint8_t irsnd_protocol;\r
-static volatile uint8_t irsnd_buffer[6];\r
-static volatile uint8_t irsnd_repeat;\r
+static volatile uint8_t irsnd_busy = 0;\r
+static volatile uint8_t irsnd_protocol = 0;\r
+static volatile uint8_t irsnd_buffer[6] = {0};\r
+static volatile uint8_t irsnd_repeat = 0;\r
static volatile uint8_t irsnd_is_on = FALSE;\r
\r
#if IRSND_USE_CALLBACK == 1\r
if (! irsnd_is_on)\r
{\r
#ifndef DEBUG\r
+\r
+#if defined(PIC_C18)\r
+ IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
+#else\r
+\r
+\r
#if IRSND_OCx == IRSND_OC2 // use OC2\r
TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
#else\r
#error wrong value of IRSND_OCx\r
#endif // IRSND_OCx\r
+\r
+#endif //C18\r
#endif // DEBUG\r
\r
#if IRSND_USE_CALLBACK == 1\r
if (irsnd_is_on)\r
{\r
#ifndef DEBUG\r
+ \r
+#if defined(PIC_C18)\r
+ IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
+#else //AVR\r
+\r
#if IRSND_OCx == IRSND_OC2 // use OC2\r
TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
#error wrong value of IRSND_OCx\r
#endif // IRSND_OCx\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
+#endif //C18\r
#endif // DEBUG\r
\r
#if IRSND_USE_CALLBACK == 1\r
irsnd_set_freq (uint8_t freq)\r
{\r
#ifndef DEBUG\r
+\r
+#if defined(PIC_C18)\r
+ OpenPWM(freq); \r
+ SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
+#else //AVR\r
+\r
#if IRSND_OCx == IRSND_OC2\r
OCR2 = freq; // use register OCR2 for OC2\r
#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
#else\r
#error wrong value of IRSND_OCx\r
#endif\r
+#endif //PIC_C18\r
#endif // DEBUG\r
}\r
\r
irsnd_init (void)\r
{\r
#ifndef DEBUG\r
+#if defined(PIC_C18)\r
+ OpenTimer;\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
+ IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
+#else\r
+\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
\r
#endif\r
\r
irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
+#endif //PIC_C18\r
#endif // DEBUG\r
}\r
\r
uint8_t\r
irsnd_ISR (void)\r
{\r
- static uint8_t send_trailer;\r
- static uint8_t current_bit = 0xFF;\r
- static uint8_t pulse_counter;\r
- static IRSND_PAUSE_LEN pause_counter;\r
- static uint8_t startbit_pulse_len;\r
- static IRSND_PAUSE_LEN startbit_pause_len;\r
- static uint8_t pulse_1_len;\r
- static uint8_t pause_1_len;\r
- static uint8_t pulse_0_len;\r
- static uint8_t pause_0_len;\r
- static uint8_t has_stop_bit;\r
+ static uint8_t send_trailer = FALSE;\r
+ static uint8_t current_bit = 0;// 0xFF;\r
+ static uint8_t pulse_counter = 0;\r
+ static IRSND_PAUSE_LEN pause_counter = 0;\r
+ static uint8_t startbit_pulse_len = 0;\r
+ static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
+ static uint8_t pulse_1_len = 0;\r
+ static uint8_t pause_1_len = 0;\r
+ static uint8_t pulse_0_len = 0;\r
+ static uint8_t pause_0_len = 0;\r
+ static uint8_t has_stop_bit = 0;\r
static uint8_t new_frame = TRUE;\r
- static uint8_t complete_data_len;\r
- static uint8_t n_repeat_frames; // number of repetition frames\r
- static uint8_t n_auto_repetitions; // number of auto_repetitions\r
- static uint8_t auto_repetition_counter; // auto_repetition counter\r
- static uint16_t auto_repetition_pause_len; // pause before auto_repetition, uint16_t!\r
- static uint16_t auto_repetition_pause_counter; // pause before auto_repetition, uint16_t!\r
- static uint8_t repeat_counter; // repeat counter\r
- static uint16_t repeat_frame_pause_len; // pause before repeat, uint16_t!\r
- static uint16_t packet_repeat_pause_counter; // pause before repeat, uint16_t!\r
+ static uint8_t complete_data_len = 0;\r
+ static uint8_t n_repeat_frames = 0; // number of repetition frames\r
+ static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
+ static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
+ static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
+ static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
+ static uint8_t repeat_counter = 0; // repeat counter\r
+ static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
+ static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
static uint8_t last_bit_value;\r
#endif\r
}\r
else\r
{\r
+ \r
if (send_trailer)\r
{\r
irsnd_busy = FALSE;\r
send_trailer = FALSE;\r
return irsnd_busy;\r
}\r
+ \r
\r
n_repeat_frames = irsnd_repeat;\r
\r
}\r
else\r
{\r
- irsnd_busy = TRUE;\r
+ irsnd_busy = TRUE; //Rainer\r
send_trailer = TRUE;\r
n_repeat_frames = 0;\r
repeat_counter = 0;\r
projects / irmp.git / blobdiff