]> cloudbase.mooo.com Git - irmp.git/blobdiff - irsnd.c
Version 3.0.7 - added SAMSUNGAH protocol, improved some code for ESP8266
[irmp.git] / irsnd.c
diff --git a/irsnd.c b/irsnd.c
index 15692c15bc2a01c09bd404d517cd27ed2c121097..1656bde8c305a07bff1f8b325c5a773b4d7b4c6e 100644 (file)
--- a/irsnd.c
+++ b/irsnd.c
@@ -14,7 +14,7 @@
  * ATmega164, ATmega324, ATmega644,  ATmega644P, ATmega1284, ATmega1284P\r
  * ATmega88,  ATmega88P, ATmega168,  ATmega168P, ATmega328P\r
  *\r
- * $Id: irsnd.c,v 1.101 2016/09/09 07:53:29 fm Exp $\r
+ * $Id: irsnd.c,v 1.103 2017/02/17 09:13:06 fm Exp $\r
  *\r
  * This program is free software; you can redistribute it and/or modify\r
  * it under the terms of the GNU General Public License as published by\r
 #  endif // IRSND_OCx\r
 \r
 #elif defined (__AVR_ATmega8515__)                                  // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
-#  if IRSND_OCx == IRSND_OC0   \r
+#  if IRSND_OCx == IRSND_OC0\r
 #    define IRSND_PORT_LETTER                       B\r
 #    define IRSND_BIT_NUMBER                        0\r
-#  elif IRSND_OCx == IRSND_OC1A \r
+#  elif IRSND_OCx == IRSND_OC1A\r
 #    define IRSND_PORT_LETTER                       D\r
 #    define IRSND_BIT_NUMBER                        5\r
-#  elif IRSND_OCx == IRSND_OC1B \r
+#  elif IRSND_OCx == IRSND_OC1B\r
 #    define IRSND_PORT_LETTER                       E\r
 #    define IRSND_BIT_NUMBER                        2\r
 #  endif // IRSND_OCx\r
 \r
 #elif defined (__AVR_XMEGA__)                                       // ATxmega\r
-#  if IRSND_OCx == IRSND_XMEGA_OC0A   \r
+#  if IRSND_OCx == IRSND_XMEGA_OC0A\r
 #    define IRSND_BIT_NUMBER                        0\r
 #  elif IRSND_OCx == IRSND_XMEGA_OC0B\r
 #    define IRSND_BIT_NUMBER                        1\r
 #    error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h\r
 #  endif // IRSND_OCx\r
 \r
-#elif defined (PIC_C18)    //Microchip C18 compiler\r
+#elif defined (PIC_C18)                                                 // Microchip C18 compiler\r
     //Nothing here to do here -> See irsndconfig.h\r
-#elif defined (ARM_STM32)  //STM32\r
+#elif defined (ARM_STM32)                                               // STM32\r
     //Nothing here to do here -> See irsndconfig.h\r
+#elif defined (__xtensa__)                                              // ESP8266\r
+    //Nothing here to do here -> See irsndconfig.h\r
+\r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * Macro digitalPinHasPWM bothers PIC_C18 compiler, but why?\r
  *\r
 #  define IRSND_FREQ_40_KHZ                     (IRSND_FREQ_TYPE) (40000)\r
 #  define IRSND_FREQ_56_KHZ                     (IRSND_FREQ_TYPE) (56000)\r
 #  define IRSND_FREQ_455_KHZ                    (IRSND_FREQ_TYPE) (455000)\r
+#elif defined (__xtensa__)                      // ESP8266\r
+#  define IRSND_FREQ_TYPE                       float\r
+#  define IRSND_FREQ_30_KHZ                     (IRSND_FREQ_TYPE) (30000)\r
+#  define IRSND_FREQ_32_KHZ                     (IRSND_FREQ_TYPE) (32000)\r
+#  define IRSND_FREQ_36_KHZ                     (IRSND_FREQ_TYPE) (36000)\r
+#  define IRSND_FREQ_38_KHZ                     (IRSND_FREQ_TYPE) (38000)\r
+#  define IRSND_FREQ_40_KHZ                     (IRSND_FREQ_TYPE) (40000)\r
+#  define IRSND_FREQ_56_KHZ                     (IRSND_FREQ_TYPE) (56000)\r
+#  define IRSND_FREQ_455_KHZ                    (IRSND_FREQ_TYPE) (455000)\r
 #else                                           // AVR\r
 #  if F_CPU >= 16000000L\r
 #    define AVR_PRESCALER                       8\r
@@ -535,11 +547,14 @@ irsnd_on (void)
 #  elif defined (TEENSY_ARM_CORTEX_M4)                  // TEENSY\r
         analogWrite(IRSND_PIN, 33 * 255 / 100);         // pwm 33%\r
 \r
-#  elif defined (__AVR_XMEGA__) \r
+#  elif defined (__xtensa__)                            // ESP8266 (Arduino)\r
+        analogWrite(IRSND_PIN, 33 * 1023 / 100);        // pwm 33%\r
+\r
+#  elif defined (__AVR_XMEGA__)\r
 #    if (IRSND_OCx == IRSND_XMEGA_OC0A)                                 // use OC0A\r
-                XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp);                 // Compare A \r
+                XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp);                 // Compare A\r
 #    elif (IRSND_OCx == IRSND_XMEGA_OC0B)                               // use OC0B\r
-                XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp);                 // Compare B \r
+                XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp);                 // Compare B\r
 #    elif IRSND_OCx == IRSND_XMEGA_OC0C                                 // use OC0C\r
                 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp);                 // Compare C\r
 #    elif IRSND_OCx == IRSND_XMEGA_OC0D                                 // use OC0D\r
@@ -593,33 +608,36 @@ irsnd_off (void)
     if (irsnd_is_on)\r
     {\r
 #ifndef ANALYZE\r
-    \r
-#  if defined(PIC_C18)                                  // PIC C18\r
+\r
+#  if defined(PIC_C18)                                                                  // PIC C18\r
         PWMoff();\r
         // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
 \r
-#  elif defined (ARM_STM32)                             // STM32\r
-        TIM_Cmd(IRSND_TIMER, DISABLE);                  // disable counter\r
-        TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive);   // force output inactive\r
-        TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable);      // enable OC-output (is being disabled in TIM_SelectOCxM())\r
-        TIM_SetCounter(IRSND_TIMER, 0);                 // reset counter value\r
+#  elif defined (ARM_STM32)                                                             // STM32\r
+        TIM_Cmd(IRSND_TIMER, DISABLE);                                                  // disable counter\r
+        TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive);    // force output inactive\r
+        TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable);                   // enable OC-output (is being disabled in TIM_SelectOCxM())\r
+        TIM_SetCounter(IRSND_TIMER, 0);                                                 // reset counter value\r
 \r
-#  elif defined (TEENSY_ARM_CORTEX_M4)                  // TEENSY\r
-        analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+#  elif defined (TEENSY_ARM_CORTEX_M4)                                                  // TEENSY\r
+        analogWrite(IRSND_PIN, 0);                                                      // pwm off, LOW level\r
+\r
+#  elif defined (__xtensa__)                                                            // ESP8266\r
+        analogWrite(IRSND_PIN, 0);                                                      // pwm off, LOW level\r
 \r
 #  elif defined (__AVR_XMEGA__)\r
-#    if (IRSND_OCx == IRSND_XMEGA_OC0A)                                                                                                 // use OC0A \r
+#    if (IRSND_OCx == IRSND_XMEGA_OC0A)                                                 // use OC0A\r
         XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp);                                        // Compare A disconnected\r
-#    elif (IRSND_OCx == IRSND_XMEGA_OC0B)                                                                                               // use OC0B \r
+#    elif (IRSND_OCx == IRSND_XMEGA_OC0B)                                               // use OC0B\r
         XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp);                                        // Compare B disconnected\r
 #    elif IRSND_OCx == IRSND_XMEGA_OC0C                                                 // use OC0C\r
         XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp);                                        // Compare C disconnected\r
 #    elif IRSND_OCx == IRSND_XMEGA_OC0D                                                 // use OC0D\r
         XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp);                                        // Compare D disconnected\r
 #    elif IRSND_OCx == IRSND_XMEGA_OC1A                                                 // use OC1A\r
-                XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp);                                        // Compare A disconnected\r
+                XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp);                                // Compare A disconnected\r
 #    elif IRSND_OCx == IRSND_XMEGA_OC1B                                                 // use OC1B\r
-                XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp);                                        // Compare B disconnected\r
+                XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp);                                // Compare B disconnected\r
 #    else\r
 #       error wrong value of IRSND_OCx\r
 #    endif // IRSND_OCx\r
@@ -672,7 +690,7 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq)
 #ifndef ANALYZE\r
 #  if defined(PIC_C18)                                                                      // PIC C18 or XC8\r
 #    if defined(__12F1840)                                                                  // XC8\r
-        TRISA2=0; \r
+        TRISA2=0;\r
         PR2=freq;\r
         CCP1M0=1;\r
         CCP1M1=1;\r
@@ -685,7 +703,7 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq)
         TMR2ON=1;\r
         CCP1CON &=(~0b0011); // p 197 "active high"\r
 #    else                                                                                   // PIC C18\r
-        OpenPWM(freq); \r
+        OpenPWM(freq);\r
         SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
 #    endif\r
         PWMoff();\r
@@ -726,9 +744,14 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq)
         TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
 \r
 #  elif defined (TEENSY_ARM_CORTEX_M4)\r
-        analogWriteResolution(8);  // 8 bit\r
+        analogWriteResolution(8);                                                           // 8 bit\r
         analogWriteFrequency(IRSND_PIN, freq);\r
-        analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+        analogWrite(IRSND_PIN, 0);                                                          // pwm off, LOW level\r
+\r
+#elif defined (__xtensa__)\r
+        // analogWriteRange(255);\r
+        analogWriteFreq(freq);\r
+        analogWrite(IRSND_PIN, 0);                                                          // pwm off, LOW level\r
 \r
 #  elif defined (__AVR_XMEGA__)\r
         XMEGA_Timer.CCA = freq;\r
@@ -834,6 +857,10 @@ irsnd_init (void)
             return;\r
         }\r
 \r
+#  elif defined (__xtensa__)\r
+        pinMode(IRSND_PIN, OUTPUT);\r
+        irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
+\r
 #  elif defined (__AVR_XMEGA__)\r
         IRSND_PORT &= ~(1<<IRSND_BIT);                                              // set IRSND_BIT to low\r
         IRSND_DDR |= (1<<IRSND_BIT);                                                // set IRSND_BIT to output\r
@@ -846,7 +873,7 @@ irsnd_init (void)
 #    else\r
         XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc;                                     // start Timer  prescaler = 1\r
 #    endif\r
-                \r
+\r
 # else                                                                              // AVR\r
         IRSND_PORT &= ~(1<<IRSND_BIT);                                              // set IRSND_BIT to low\r
         IRSND_DDR |= (1<<IRSND_BIT);                                                // set IRSND_BIT to output\r
@@ -1208,11 +1235,11 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
         case IRMP_RECS80_PROTOCOL:\r
         {\r
-            toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
+            toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x80;\r
 \r
-            irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
-                              ((irmp_data_p->command & 0x0038) >> 3);                                           // STAAACCC\r
-            irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5;                                               // CCC00000\r
+            irsnd_buffer[0] = toggle_bit_recs80 | ((irmp_data_p->address & 0x000F) << 4) |\r
+                              ((irmp_data_p->command & 0x003C) >> 2);                                           // TAAACCCC\r
+            irsnd_buffer[1] = (irmp_data_p->command & 0x03) << 6;                                               // CC000000\r
             irsnd_busy      = TRUE;\r
             break;\r
         }\r
@@ -1438,7 +1465,7 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
 \r
             irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7);  //          C0 C1 A0 A1 D0 D1 D2 D3\r
             irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3);                              //          D4 D5 D6 D7 V  0  0  0\r
-                                                                                                                \r
+\r
             irsnd_busy      = TRUE;\r
             break;\r
         }\r
@@ -1528,9 +1555,9 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
             //           1         2         3         4         5         6\r
             // 0123456789012345678901234567890123456789012345678901234567890123456789\r
             // N VVMMM    ? ???    t vmA x                 y                     TTTT\r
-            // \r
+            //\r
             // irmp_data_p->command:\r
-            // \r
+            //\r
             //         5432109876543210\r
             //         NAVVvMMMmtxyTTTT\r
 \r
@@ -1700,7 +1727,7 @@ irsnd_ISR (void)
                     send_trailer = FALSE;\r
                     return irsnd_busy;\r
                 }\r
-                \r
+\r
                 n_repeat_frames             = irsnd_repeat;\r
 \r
                 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r