Version 2.1.1: added GRUNDIG2 protocol

[irmp.git] / irsndconfig.h

diff --git a/irsndconfig.h b/irsndconfig.h
index b669221f25aab2c41e05bc5bb2df1b49d2523a0a..746f57a853708a85c99fa0b24c161d8c14dcc990 100644 (file)
--- a/irsndconfig.h
+++ b/irsndconfig.h
@@ -3,7 +3,7 @@
  *\r
  * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irsndconfig.h,v 1.27 2011/09/20 10:45:28 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.29 2012/02/16 12:39:36 fm Exp $\r
  *\r
  * ATMEGA88 @ 8 MHz\r
  *\r
@@ -80,7 +80,7 @@
 #define IRSND_PIC_CCP1                          1       // PIC C18 RC2 = PWM1 module\r
 #define IRSND_PIC_CCP2                          2       // PIC C18 RC1 = PWM2 module\r
 \r
-#ifndef PIC_C18                                                                // AVR part\r
+#ifndef PIC_C18                                                                 // AVR part\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * AVR\r
@@ -91,8 +91,8 @@
  *                                              IRSND_OC0  = OC0  on ATmegas         supporting OC0,  e.g. ATmega162\r
  *                                              IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85\r
  *                                              IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
- *                                                                                             IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
- *                                                                                             IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
+ *                                                                                              IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
+ *                                                                                              IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 \r
@@ -102,12 +102,12 @@
  * PIC C18\r
  *\r
  * Change hardware pin here:                    IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
- *                                                                                             IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
+ *                                                                                              IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 \r
 #else\r
-#define IRSND_OCx                                  IRSND_PIC_CCP2      // Use PWMx for PIC\r
+#define IRSND_OCx                                   IRSND_PIC_CCP2      // Use PWMx for PIC\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  * PIC C18 - change other PIC specific settings - ignore it when using AVR\r
@@ -125,9 +125,9 @@
 #if IRSND_OCx == IRSND_PIC_CCP2        \r
 #define IRSND_PIN                               TRISCbits.TRISC1    // RC1 = PWM2\r
 \r
-#define SetDCPWM(x)                            SetDCPWM2(x)                    \r
-#define ClosePWM                                       ClosePWM2\r
-#define OpenPWM(x)                                     OpenPWM2(x) \r
+#define SetDCPWM(x)                             SetDCPWM2(x)                    \r
+#define ClosePWM                                        ClosePWM2\r
+#define OpenPWM(x)                                      OpenPWM2(x) \r
 #endif\r
 \r
 #if IRSND_OCx == IRSND_PIC_CCP1        \r