+#define FDC_START_BIT_PULSE_TIME 1390.0e-6 // 1390 usec pulse\r
+#define FDC_START_BIT_PAUSE_TIME 640.0e-6 // 640 usec pause\r
+#define FDC_PULSE_TIME 200.0e-6 // 200 usec pulse\r
+#define FDC_1_PAUSE_TIME 475.0e-6 // 475 usec pause\r
+#define FDC_0_PAUSE_TIME 145.0e-6 // 145 usec pause\r
+#define FDC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
+#define FDC_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define FDC_ADDRESS_LEN 16 // read 16 address bits\r
+#define FDC_COMMAND_OFFSET 25 // skip 25 bits (16 address + 9 0-bits)\r
+#define FDC_COMMAND_LEN 12 // read 12 bits\r
+#define FDC_COMPLETE_DATA_LEN 40 // complete length\r
+#define FDC_STOP_BIT 1 // has stop bit\r
+#define FDC_LSB 1 // LSB...MSB\r
+\r