]> cloudbase.mooo.com Git - irmp.git/blobdiff - irsnd.c
Version 2.3.0: some timer and variable name corrections
[irmp.git] / irsnd.c
diff --git a/irsnd.c b/irsnd.c
index efdc93d56794d7e5becb6391f30fec8eb79e83fb..ad14dd85c450c85557561ba38e9fb8660f08c62d 100644 (file)
--- a/irsnd.c
+++ b/irsnd.c
@@ -5,6 +5,7 @@
  *\r
  * Supported mikrocontrollers:\r
  *\r
+ * ATtiny87,  ATtiny167\r
  * ATtiny45,  ATtiny85\r
  * ATtiny84\r
  * ATmega8,   ATmega16,  ATmega32\r
@@ -12,7 +13,7 @@
  * ATmega164, ATmega324, ATmega644,  ATmega644P, ATmega1284\r
  * ATmega88,  ATmega88P, ATmega168,  ATmega168P, ATmega328P\r
  *\r
- * $Id: irsnd.c,v 1.56 2012/06/05 12:00:46 fm Exp $\r
+ * $Id: irsnd.c,v 1.60 2012/10/05 07:58:39 fm Exp $\r
  *\r
  * This program is free software; you can redistribute it and/or modify\r
  * it under the terms of the GNU General Public License as published by\r
 \r
 #include "irsnd.h"\r
 \r
+#ifndef F_CPU\r
+#  error F_CPU unkown\r
+#endif\r
+\r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  *  ATtiny pin definition of OC0A / OC0B\r
  *  ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
 #  else\r
 #    error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
 #  endif // IRSND_OCx\r
+#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__)     // ATtiny87/167 uses OC0A = PA2\r
+#  if IRSND_OCx == IRSND_OC0A                                       // OC0A\r
+#    define IRSND_PORT                              PORTA           // port A\r
+#    define IRSND_DDR                               DDRA            // ddr A\r
+#    define IRSND_BIT                               2               // OC0A\r
+#  else\r
+#    error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
+#  endif // IRSND_OCx\r
 #elif defined (__AVR_ATmega8__)                                     // ATmega8 uses only OC2 = PB3\r
 #  if IRSND_OCx == IRSND_OC2                                        // OC0A\r
 #    define IRSND_PORT                              PORTB           // port B\r
 #  define IRSND_FREQ_56_KHZ                     (IRSND_FREQ_TYPE) (56000)\r
 #  define IRSND_FREQ_455_KHZ                    (IRSND_FREQ_TYPE) (455000)\r
 #else                                           // AVR\r
+#  if F_CPU >= 16000000L\r
+#    define AVR_PRESCALER                       8\r
+#  else\r
+#    define AVR_PRESCALER                       1\r
+#  endif\r
 #  define IRSND_FREQ_TYPE                       uint8_t\r
-#  define IRSND_FREQ_30_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2) - 1)\r
-#  define IRSND_FREQ_32_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2) - 1)\r
-#  define IRSND_FREQ_36_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2) - 1)\r
-#  define IRSND_FREQ_38_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2) - 1)\r
-#  define IRSND_FREQ_40_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2) - 1)\r
-#  define IRSND_FREQ_56_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2) - 1)\r
-#  define IRSND_FREQ_455_KHZ                    (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2) - 1)\r
+#  define IRSND_FREQ_30_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
+#  define IRSND_FREQ_32_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
+#  define IRSND_FREQ_36_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
+#  define IRSND_FREQ_38_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
+#  define IRSND_FREQ_40_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
+#  define IRSND_FREQ_56_KHZ                     (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
+#  define IRSND_FREQ_455_KHZ                    (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
 #endif\r
 \r
 #define FDC_START_BIT_PULSE_LEN                 (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
@@ -357,7 +375,6 @@ static void                                     (*irsnd_callback_ptr) (uint8_t);
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r
  *  Switch PWM on\r
- *  @details  Switches PWM on with a narrow spike on all 3 channels -> leds glowing\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
 static void\r
@@ -596,16 +613,32 @@ irsnd_init (void)
 \r
 #    if   IRSND_OCx == IRSND_OC2                                                    // use OC2\r
         TCCR2 = (1<<WGM21);                                                         // CTC mode\r
-        TCCR2 |= (1<<CS20);                                                         // 0x01, start Timer 2, no prescaling\r
+#       if AVR_PRESCALER == 8\r
+          TCCR2 |= (1<<CS21);                                                       // start Timer 2, prescaler = 8\r
+#       else\r
+          TCCR2 |= (1<<CS20);                                                       // start Timer 2, prescaler = 1\r
+#       endif\r
 #    elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B                        // use OC2A or OC2B\r
         TCCR2A = (1<<WGM21);                                                        // CTC mode\r
-        TCCR2B |= (1<<CS20);                                                        // 0x01, start Timer 2, no prescaling\r
+#       if AVR_PRESCALER == 8\r
+          TCCR2B |= (1<<CS21);                                                      // start Timer 2, prescaler = 8\r
+#       else\r
+          TCCR2B |= (1<<CS20);                                                      // start Timer 2, prescaler = 1\r
+#       endif\r
 #    elif IRSND_OCx == IRSND_OC0                                                    // use OC0\r
         TCCR0 = (1<<WGM01);                                                         // CTC mode\r
-        TCCR0 |= (1<<CS00);                                                         // 0x01, start Timer 0, no prescaling\r
+#       if AVR_PRESCALER == 8\r
+          TCCR0 |= (1<<CS01);                                                       // start Timer 0, prescaler = 8\r
+#       else\r
+          TCCR0 |= (1<<CS00);                                                       // start Timer 0, prescaler = 1\r
+#       endif\r
 #    elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B                        // use OC0A or OC0B\r
         TCCR0A = (1<<WGM01);                                                        // CTC mode\r
-        TCCR0B |= (1<<CS00);                                                        // 0x01, start Timer 0, no prescaling\r
+#       if AVR_PRESCALER == 8\r
+          TCCR0B |= (1<<CS01);                                                      // start Timer 0, prescaler = 8\r
+#       else\r
+          TCCR0B |= (1<<CS00);                                                      // start Timer 0, prescaler = 1\r
+#       endif\r
 #    else\r
 #      error wrong value of IRSND_OCx\r
 #    endif\r
@@ -825,24 +858,24 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
         case IRMP_KASEIKYO_PROTOCOL:\r
         {\r
-            uint8_t xor;\r
+            uint8_t xor_value;\r
             uint16_t genre2;\r
 \r
             address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
             command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
             genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
 \r
-            xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
+            xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
 \r
             irsnd_buffer[0] = (address & 0xFF00) >> 8;                                                          // AAAAAAAA\r
             irsnd_buffer[1] = (address & 0x00FF);                                                               // AAAAAAAA\r
-            irsnd_buffer[2] = xor << 4 | (command & 0x000F);                                                    // XXXXCCCC\r
+            irsnd_buffer[2] = xor_value << 4 | (command & 0x000F);                                              // XXXXCCCC\r
             irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12;                                         // ggggCCCC\r
             irsnd_buffer[4] = (command & 0x0FF0) >> 4;                                                          // CCCCCCCC\r
 \r
-            xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
+            xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
 \r
-            irsnd_buffer[5] = xor;\r
+            irsnd_buffer[5] = xor_value;\r
             irsnd_busy      = TRUE;\r
             break;\r
         }\r
@@ -2136,6 +2169,8 @@ irsnd_ISR (void)
                         }\r
                         else\r
                         {\r
+                            // printf ("current_bit: %d  %d < %d  %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
+\r
                             if (pause_counter < pause_len)\r
                             {\r
                                 if (pause_counter == 0)\r
@@ -2254,6 +2289,15 @@ main (int argc, char ** argv)
         }\r
 \r
         putchar ('\n');\r
+\r
+        (void) irsnd_send_data (&irmp_data, TRUE);\r
+\r
+        while (irsnd_busy)\r
+        {\r
+            irsnd_ISR ();\r
+        }\r
+\r
+        putchar ('\n');\r
     }\r
     else\r
     {\r