+#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
+ case IRMP_FDC_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = FDC_START_BIT_PAUSE_LEN;\r
+ complete_data_len = FDC_COMPLETE_DATA_LEN;\r
+ pulse_1_len = FDC_PULSE_LEN;\r
+ pause_1_len = FDC_1_PAUSE_LEN;\r
+ pulse_0_len = FDC_PULSE_LEN;\r
+ pause_0_len = FDC_0_PAUSE_LEN;\r
+ has_stop_bit = FDC_STOP_BIT;\r
+ n_auto_repetitions = 1; // 1 frame\r
+ auto_repetition_pause_len = 0;\r
+ repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
+ case IRMP_RCCAR_PROTOCOL:\r