*\r
* Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.h,v 1.28 2010/06/10 21:24:50 fm Exp $\r
+ * $Id: irmp.h,v 1.34 2010/06/15 15:47:21 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#define IRMP_GRUNDIG_PROTOCOL 15 // Grundig\r
#define IRMP_NOKIA_PROTOCOL 16 // Nokia\r
#define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset\r
-#define IRMP_FDC1_PROTOCOL 18 // FDC keyboard - protocol 1\r
-#define IRMP_FDC2_PROTOCOL 19 // FDC keyboard - protocol 2\r
+#define IRMP_FDC_PROTOCOL 18 // FDC keyboard\r
+#define IRMP_RCCAR_PROTOCOL 19 // RC Car\r
+\r
+// some flags of struct IRMP_PARAMETER:\r
+#define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01\r
+#define IRMP_PARAM_FLAG_1ST_PULSE_IS_1 0x02\r
\r
#define SIRCS_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r
#define SIRCS_START_BIT_PAUSE_TIME 600.0e-6 // 600 usec pause\r
#define SIRCS_COMPLETE_DATA_LEN 20 // complete length - may be up to 20\r
#define SIRCS_STOP_BIT 0 // has no stop bit\r
#define SIRCS_LSB 1 // LSB...MSB\r
+#define SIRCS_FLAGS 0 // flags\r
\r
#define NEC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r
#define NEC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
#define NEC_COMPLETE_DATA_LEN 32 // complete length\r
#define NEC_STOP_BIT 1 // has stop bit\r
#define NEC_LSB 1 // LSB...MSB\r
+#define NEC_FLAGS 0 // flags\r
\r
#define SAMSUNG_START_BIT_PULSE_TIME 4500.0e-6 // 4500 usec pulse\r
#define SAMSUNG_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
#define SAMSUNG_COMPLETE_DATA_LEN 37 // complete length\r
#define SAMSUNG_STOP_BIT 1 // has stop bit\r
#define SAMSUNG_LSB 1 // LSB...MSB?\r
+#define SAMSUNG_FLAGS 0 // flags\r
\r
#define SAMSUNG32_COMMAND_OFFSET 16 // skip 16 bits\r
#define SAMSUNG32_COMMAND_LEN 16 // read 16 command bits\r
#define MATSUSHITA_COMPLETE_DATA_LEN 24 // complete length\r
#define MATSUSHITA_STOP_BIT 1 // has stop bit\r
#define MATSUSHITA_LSB 1 // LSB...MSB?\r
+#define MATSUSHITA_FLAGS 0 // flags\r
\r
#define KASEIKYO_START_BIT_PULSE_TIME 3380.0e-6 // 3380 usec pulse\r
#define KASEIKYO_START_BIT_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
#define KASEIKYO_COMPLETE_DATA_LEN 48 // complete length\r
#define KASEIKYO_STOP_BIT 1 // has stop bit\r
#define KASEIKYO_LSB 1 // LSB...MSB?\r
+#define KASEIKYO_FLAGS 0 // flags\r
\r
#define RECS80_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
#define RECS80_START_BIT_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
#define RECS80_COMPLETE_DATA_LEN 11 // complete length\r
#define RECS80_STOP_BIT 1 // has stop bit\r
#define RECS80_LSB 0 // MSB...LSB\r
+#define RECS80_FLAGS 0 // flags\r
\r
#define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause\r
#define RC5_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
#define RC5_COMPLETE_DATA_LEN 13 // complete length\r
#define RC5_STOP_BIT 0 // has no stop bit\r
#define RC5_LSB 0 // MSB...LSB\r
+#define RC5_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags\r
\r
#define DENON_PULSE_TIME 275.0e-6 // 275 usec pulse\r
#define DENON_1_PAUSE_TIME 1900.0e-6 // 1900 usec pause\r
#define DENON_COMPLETE_DATA_LEN 15 // complete length\r
#define DENON_STOP_BIT 1 // has stop bit\r
#define DENON_LSB 0 // MSB...LSB\r
+#define DENON_FLAGS 0 // flags\r
\r
#define RC6_START_BIT_PULSE_TIME 2666.0e-6 // 2.666 msec pulse\r
#define RC6_START_BIT_PAUSE_TIME 889.0e-6 // 889 usec pause\r
#define RC6_COMPLETE_DATA_LEN_LONG 36 // complete length\r
#define RC6_STOP_BIT 0 // has no stop bit\r
#define RC6_LSB 0 // MSB...LSB\r
+#define RC6_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
\r
#define RECS80EXT_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
#define RECS80EXT_START_BIT_PAUSE_TIME 3637.0e-6 // 3637 usec pause\r
#define RECS80EXT_COMPLETE_DATA_LEN 12 // complete length\r
#define RECS80EXT_STOP_BIT 1 // has stop bit\r
#define RECS80EXT_LSB 0 // MSB...LSB\r
+#define RECS80EXT_FLAGS 0 // flags\r
\r
#define NUBERT_START_BIT_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r
#define NUBERT_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause\r
#define NUBERT_COMPLETE_DATA_LEN 10 // complete length\r
#define NUBERT_STOP_BIT 1 // has stop bit\r
#define NUBERT_LSB 0 // MSB?\r
+#define NUBERT_FLAGS 0 // flags\r
\r
#define BANG_OLUFSEN_START_BIT1_PULSE_TIME 200.0e-6 // 200 usec pulse\r
#define BANG_OLUFSEN_START_BIT1_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
#define BANG_OLUFSEN_COMPLETE_DATA_LEN 20 // complete length: startbits 2, 3, 4 + 16 data bits + trailer bit\r
#define BANG_OLUFSEN_STOP_BIT 1 // has stop bit\r
#define BANG_OLUFSEN_LSB 0 // MSB...LSB\r
+#define BANG_OLUFSEN_FLAGS 0 // flags\r
\r
#define GRUNDIG_OR_NOKIA_BIT_TIME 528.0e-6 // 528 usec pulse/pause\r
#define GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME 2639.0e-6 // 2639 usec pause after pre bit\r
#define GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // info frame repeat after 117.76 ms\r
#define GRUNDIG_OR_NOKIA_STOP_BIT 0 // has no stop bit\r
#define GRUNDIG_OR_NOKIA_LSB 1 // MSB...LSB\r
+#define GRUNDIG_OR_NOKIA_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
\r
#define GRUNDIG_FRAMES 2 // GRUNDIG sends each frame 1+1 times\r
#define GRUNDIG_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r
#define SIEMENS_COMPLETE_DATA_LEN 23 // complete length\r
#define SIEMENS_STOP_BIT 0 // has no stop bit\r
#define SIEMENS_LSB 0 // MSB...LSB\r
-\r
-#define FDC1_START_BIT_PULSE_TIME 1390.0e-6 // 1390 usec pulse\r
-#define FDC1_START_BIT_PAUSE_TIME 640.0e-6 // 640 usec pause\r
-#define FDC1_PULSE_TIME 200.0e-6 // 200 usec pulse\r
-#define FDC1_1_PAUSE_TIME 475.0e-6 // 475 usec pause\r
-#define FDC1_0_PAUSE_TIME 145.0e-6 // 145 usec pause\r
-#define FDC1_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
-#define FDC1_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define FDC1_ADDRESS_LEN 8 // read 8 address bits\r
-#define FDC1_COMMAND_OFFSET 24 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r
-#define FDC1_COMMAND_LEN 8 // read 8 bits\r
-#define FDC1_COMPLETE_DATA_LEN 40 // complete length\r
-#define FDC1_STOP_BIT 1 // has stop bit\r
-#define FDC1_LSB 1 // LSB...MSB\r
-\r
-#define FDC2_START_BIT_PULSE_TIME 2120.0e-6 // 2120 usec pulse\r
-#define FDC2_START_BIT_PAUSE_TIME 920.0e-6 // 920 usec pause\r
-#define FDC2_PULSE_TIME 400.0e-6 // 400 usec pulse\r
-#define FDC2_1_PAUSE_TIME 660.0e-6 // 660 usec pause\r
-#define FDC2_0_PAUSE_TIME 145.0e-6 // 140 usec pause\r
-#define FDC2_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
-#define FDC2_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define FDC2_ADDRESS_LEN 8 // read 8 address bits\r
-#define FDC2_COMMAND_OFFSET 24 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r
-#define FDC2_COMMAND_LEN 8 // read 8 bits\r
-#define FDC2_COMPLETE_DATA_LEN 40 // complete length\r
-#define FDC2_STOP_BIT 1 // has stop bit\r
-#define FDC2_LSB 1 // LSB...MSB\r
+#define SIEMENS_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
+\r
+#define FDC_START_BIT_PULSE_TIME 2120.0e-6 // 2120 usec pulse\r
+#define FDC_START_BIT_PAUSE_TIME 900.0e-6 // 900 usec pause\r
+#define FDC_PULSE_TIME 360.0e-6 // 360 usec pulse\r
+#define FDC_1_PAUSE_TIME 650.0e-6 // 650 usec pause\r
+#define FDC_0_PAUSE_TIME 180.0e-6 // 180 usec pause\r
+#define FDC_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r
+#define FDC_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define FDC_ADDRESS_LEN 8 // read 8 address bits\r
+#define FDC_COMMAND_OFFSET 24 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r
+#define FDC_COMMAND_LEN 8 // read 8 bits\r
+#define FDC_COMPLETE_DATA_LEN 40 // complete length\r
+#define FDC_STOP_BIT 1 // has stop bit\r
+#define FDC_LSB 1 // LSB...MSB\r
+#define FDC_FLAGS 0 // flags\r
+\r
+#define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse\r
+#define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r
+#define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse\r
+#define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause\r
+#define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause\r
+#define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
+#define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define RCCAR_ADDRESS_LEN 0 // read 0 address bits\r
+#define RCCAR_COMMAND_OFFSET 0 // skip 0 bits\r
+#define RCCAR_COMMAND_LEN 13 // read 13 bits\r
+#define RCCAR_COMPLETE_DATA_LEN 13 // complete length\r
+#define RCCAR_STOP_BIT 1 // has stop bit\r
+#define RCCAR_LSB 1 // LSB...MSB\r
+#define RCCAR_FLAGS 0 // flags\r
\r
#define AUTO_FRAME_REPETITION_TIME 50.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms\r
\r