/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* @file irsnd.c\r
*\r
- * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
*\r
- * Supported mikrocontrollers:\r
+ * Supported AVR mikrocontrollers:\r
*\r
* ATtiny87, ATtiny167\r
* ATtiny45, ATtiny85\r
- * ATtiny84\r
+ * ATtiny44 ATtiny84\r
* ATmega8, ATmega16, ATmega32\r
* ATmega162\r
- * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
+ * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.66 2012/12/12 15:50:03 fm Exp $\r
+ * $Id: irsnd.c,v 1.96 2015/11/17 13:51:45 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
* ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r
+#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
# if IRSND_OCx == IRSND_OC0A // OC0A\r
# define IRSND_PORT_LETTER B\r
# define IRSND_BIT_NUMBER 2\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
# if IRSND_OCx == IRSND_OC0A // OC0A\r
# define IRSND_PORT_LETTER B\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
# if IRSND_OCx == IRSND_OC0A // OC0A\r
# define IRSND_PORT_LETTER A\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
# if IRSND_OCx == IRSND_OC2 // OC0A\r
# define IRSND_PORT_LETTER B\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
# if IRSND_OCx == IRSND_OC2 // OC2\r
# define IRSND_PORT_LETTER B\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega164__) \\r
|| defined (__AVR_ATmega324__) \\r
|| defined (__AVR_ATmega644__) \\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega48__) \\r
|| defined (__AVR_ATmega88__) \\r
|| defined (__AVR_ATmega88P__) \\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
# if IRSND_OCx == IRSND_OC0 \r
# define IRSND_PORT_LETTER B\r
# elif IRSND_OCx == IRSND_OC1B \r
# define IRSND_PORT_LETTER E\r
# define IRSND_BIT_NUMBER 2\r
+# endif // IRSND_OCx\r
+\r
+#elif defined (__AVR_XMEGA__) // ATxmega\r
+# if IRSND_OCx == IRSND_XMEGA_OC0A \r
+# define IRSND_BIT_NUMBER 0\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
+# define IRSND_BIT_NUMBER 1\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0C\r
+# define IRSND_BIT_NUMBER 2\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0D\r
+# define IRSND_BIT_NUMBER 3\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1A\r
+# define IRSND_BIT_NUMBER 4\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1B\r
+# define IRSND_BIT_NUMBER 5\r
# else\r
-# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
+# error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (PIC_C18) //Microchip C18 compiler\r
//Nothing here to do here -> See irsndconfig.h\r
#elif defined (ARM_STM32) //STM32\r
//Nothing here to do here -> See irsndconfig.h\r
+#elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3\r
+# if !digitalPinHasPWM(IRSND_PIN)\r
+# error need pin with PWM output.\r
+# endif\r
#else\r
# if !defined (unix) && !defined (WIN32)\r
# error mikrocontroller not defined, please fill in definitions here.\r
# endif // unix, WIN32\r
#endif // __AVR...\r
\r
-#if defined(ATMEL_AVR)\r
+#if defined(__AVR_XMEGA__)\r
+# define _CONCAT(a,b) a##b\r
+# define CONCAT(a,b) _CONCAT(a,b)\r
+# define IRSND_PORT IRSND_PORT_PRE.OUT\r
+# define IRSND_DDR IRSND_PORT_PRE.DIR\r
+# define IRSND_PIN IRSND_PORT_PRE.IN\r
+# define IRSND_BIT IRSND_BIT_NUMBER\r
+#elif defined(ATMEL_AVR)\r
# define _CONCAT(a,b) a##b\r
# define CONCAT(a,b) _CONCAT(a,b)\r
# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
-#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
-#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
-#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
-#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
-#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
-#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5)\r
+#define PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5)\r
+#define PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5)\r
+#define PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5)\r
+#define PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5)\r
+#define PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
-#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
-#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
-#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
-#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define RC6_BIT_2_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_2_TIME + 0.5)\r
+#define RC6_BIT_3_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_3_TIME + 0.5)\r
+#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
-#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
-#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
-#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)\r
+#define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)\r
+#define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)\r
+#define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)\r
+#define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)\r
+#define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define BOSE_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME + 0.5)\r
+#define BOSE_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME + 0.5)\r
+#define BOSE_PULSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME + 0.5)\r
+#define BOSE_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME + 0.5)\r
+#define BOSE_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME + 0.5)\r
+#define BOSE_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BOSE_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define BOSE_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BOSE_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
-#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)\r
+#define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)\r
+#define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)\r
+#define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)\r
+#define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)\r
+#define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)\r
+#define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)\r
+#define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)\r
+#define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)\r
+#define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)\r
+#define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)\r
+#define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)\r
+#define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
-#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
-#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
-#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
-#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
-#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
+#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r
+#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
+#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r
+#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
#ifdef PIC_C18 // PIC C18\r
# define IRSND_FREQ_TYPE uint8_t\r
# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
+#elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r
+# define IRSND_FREQ_TYPE float\r
+# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
+# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
+# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
+# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
+# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
+# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
+# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
#else // AVR\r
# if F_CPU >= 16000000L\r
# define AVR_PRESCALER 8\r
#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
+#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
+#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
+#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
+#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
+#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
+#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
+#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)\r
+#define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)\r
+#define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
+#define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)\r
+#define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)\r
+#define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)\r
+#define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
+#define ACP24_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME + 0.5)\r
+#define ACP24_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME + 0.5)\r
+#define ACP24_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
+#define ACP24_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_PULSE_TIME + 0.5)\r
+#define ACP24_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME + 0.5)\r
+#define ACP24_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME + 0.5)\r
+#define ACP24_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ACP24_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
+\r
static volatile uint8_t irsnd_busy = 0;\r
static volatile uint8_t irsnd_protocol = 0;\r
-static volatile uint8_t irsnd_buffer[6] = {0};\r
+static volatile uint8_t irsnd_buffer[9] = {0};\r
static volatile uint8_t irsnd_repeat = 0;\r
static volatile uint8_t irsnd_is_on = FALSE;\r
\r
{\r
if (! irsnd_is_on)\r
{\r
-#ifndef DEBUG\r
+#ifndef ANALYZE\r
# if defined(PIC_C18) // PIC C18\r
- IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
+ PWMon();\r
+ // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
+\r
# elif defined (ARM_STM32) // STM32\r
TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
+\r
+# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r
+ analogWrite(IRSND_PIN, 33 * 255 / 100); // pwm 33%\r
+\r
+# elif defined (__AVR_XMEGA__) \r
+# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
+# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
+# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
+ XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
+ XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif // IRSND_OCx\r
+\r
# else // AVR\r
# if IRSND_OCx == IRSND_OC2 // use OC2\r
TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
# error wrong value of IRSND_OCx\r
# endif // IRSND_OCx\r
# endif // C18\r
-#endif // DEBUG\r
+#endif // ANALYZE\r
\r
#if IRSND_USE_CALLBACK == 1\r
if (irsnd_callback_ptr)\r
{\r
if (irsnd_is_on)\r
{\r
-#ifndef DEBUG\r
+#ifndef ANALYZE\r
\r
# if defined(PIC_C18) // PIC C18\r
- IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
+ PWMoff();\r
+ // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
+\r
# elif defined (ARM_STM32) // STM32\r
TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
+\r
+# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r
+ analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+\r
+# elif defined (__AVR_XMEGA__)\r
+# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A \r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
+# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B \r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif // IRSND_OCx\r
+\r
# else //AVR\r
\r
# if IRSND_OCx == IRSND_OC2 // use OC2\r
# endif // IRSND_OCx\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
# endif //C18\r
-#endif // DEBUG\r
+#endif // ANALYZE\r
\r
#if IRSND_USE_CALLBACK == 1\r
if (irsnd_callback_ptr)\r
* @details sets pwm frequency\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
+#if defined(__12F1840)\r
+extern void pwm_init(uint16_t freq);\r
+#include <stdio.h>\r
+#endif\r
+\r
static void\r
irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
{\r
-#ifndef DEBUG\r
-# if defined(PIC_C18) // PIC C18\r
- OpenPWM(freq); \r
- SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
+#ifndef ANALYZE\r
+# if defined(PIC_C18) // PIC C18 or XC8\r
+# if defined(__12F1840) // XC8\r
+ TRISA2=0; \r
+ PR2=freq;\r
+ CCP1M0=1;\r
+ CCP1M1=1;\r
+ CCP1M2=1;\r
+ CCP1M3=1;\r
+ DC1B0=1;\r
+ DC1B1=0;\r
+ CCPR1L = 0b01101001;\r
+ TMR2IF = 0;\r
+ TMR2ON=1;\r
+ CCP1CON &=(~0b0011); // p 197 "active high"\r
+# else // PIC C18\r
+ OpenPWM(freq); \r
+ SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
+# endif\r
+ PWMoff();\r
# elif defined (ARM_STM32) // STM32\r
- static uint32_t TimeBaseFreq = 0;\r
+ static uint32_t TimeBaseFreq = 0;\r
\r
- if (TimeBaseFreq == 0)\r
- {\r
+ if (TimeBaseFreq == 0)\r
+ {\r
RCC_ClocksTypeDef RCC_ClocksStructure;\r
/* Get system clocks and store timer clock in variable */\r
RCC_GetClocksFreq(&RCC_ClocksStructure);\r
TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
}\r
# endif\r
- }\r
+ }\r
+\r
+ freq = TimeBaseFreq/freq;\r
\r
- freq = TimeBaseFreq/freq;\r
+ /* Set frequency */\r
+ TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
+ /* Set duty cycle */\r
+ TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
+\r
+# elif defined (TEENSY_ARM_CORTEX_M4)\r
+ analogWriteResolution(8); // 8 bit\r
+ analogWriteFrequency(IRSND_PIN, freq);\r
+ analogWrite(IRSND_PIN, 0); // pwm off, LOW level\r
+\r
+# elif defined (__AVR_XMEGA__)\r
+ XMEGA_Timer.CCA = freq;\r
\r
- /* Set frequency */\r
- TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
- /* Set duty cycle */\r
- TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
# else // AVR\r
\r
# if IRSND_OCx == IRSND_OC2\r
# error wrong value of IRSND_OCx\r
# endif\r
# endif //PIC_C18\r
-#endif // DEBUG\r
+#endif // ANALYZE\r
}\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
void\r
irsnd_init (void)\r
{\r
-#ifndef DEBUG\r
-# if defined(PIC_C18) // PIC C18\r
+#ifndef ANALYZE\r
+# if defined(PIC_C18) // PIC C18 or XC8 compiler\r
+# if ! defined(__12F1840) // only C18:\r
OpenTimer;\r
- irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
- IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
+# endif\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
+ IRSND_PIN = 0; // set IO to outout\r
+ PWMoff();\r
# elif defined (ARM_STM32) // STM32\r
GPIO_InitTypeDef GPIO_InitStructure;\r
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
# elif defined (ARM_STM32F10X)\r
RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
+ // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
# elif defined (ARM_STM32F4XX)\r
RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
# endif\r
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
- GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
+ // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
# endif\r
\r
/* TIMx clock enable */\r
TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
\r
irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
-# else // AVR\r
+\r
+# elif defined (TEENSY_ARM_CORTEX_M4)\r
+ if (!digitalPinHasPWM(IRSND_PIN))\r
+ {\r
+ return;\r
+ }\r
+\r
+# elif defined (__AVR_XMEGA__)\r
+ IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
+ IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
+\r
+ XMEGA_Timer.PER = 0xFFFF; //Topwert\r
+ XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC\r
+\r
+# if AVR_PRESCALER == 8\r
+ XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8\r
+# else\r
+ XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1\r
+# endif\r
+ \r
+# else // AVR\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
\r
# endif\r
irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
# endif //PIC_C18\r
-#endif // DEBUG\r
+#endif // ANALYZE\r
}\r
\r
#if IRSND_USE_CALLBACK == 1\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
+ case IRMP_LGAIR_PROTOCOL:\r
+ {\r
+ address = irmp_data_p->address;\r
+ command = irmp_data_p->command;\r
+\r
+ irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA\r
+ irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC\r
+ irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC\r
+ irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum\r
+ ((command & 0x0F00) >> 8) +\r
+ ((command & 0x00F0) >>4 ) +\r
+ ((command & 0x000F))) & 0x000F) << 4;\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
case IRMP_SAMSUNG_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
+ case IRMP_SAMSUNG48_PROTOCOL:\r
+ {\r
+ address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
+ command = bitsrevervse (irmp_data_p->command, 16);\r
+\r
+ irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
+ irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
+ irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC\r
+ irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
+ irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC\r
+ irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
case IRMP_MATSUSHITA_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1\r
+ case IRMP_TECHNICS_PROTOCOL:\r
+ {\r
+ command = bitsrevervse (irmp_data_p->command, TECHNICS_COMMAND_LEN);\r
+\r
+ irsnd_buffer[0] = (command & 0x07FC) >> 3; // CCCCCCCC\r
+ irsnd_buffer[1] = ((command & 0x0007) << 5) | ((~command & 0x07C0) >> 6); // CCCccccc\r
+ irsnd_buffer[2] = (~command & 0x003F) << 2; // cccccc\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
case IRMP_KASEIKYO_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1\r
+ case IRMP_PANASONIC_PROTOCOL:\r
+ {\r
+ address = bitsrevervse (irmp_data_p->address, PANASONIC_ADDRESS_LEN);\r
+ command = bitsrevervse (irmp_data_p->command, PANASONIC_COMMAND_LEN);\r
+\r
+ irsnd_buffer[0] = 0x40; // 01000000\r
+ irsnd_buffer[1] = 0x04; // 00000100\r
+ irsnd_buffer[2] = 0x01; // 00000001\r
+ irsnd_buffer[3] = (address & 0xFF00) >> 8; // AAAAAAAA\r
+ irsnd_buffer[4] = (address & 0x00FF); // AAAAAAAA\r
+ irsnd_buffer[5] = (command & 0xFF00) >> 8; // CCCCCCCC\r
+ irsnd_buffer[6] = (command & 0x00FF); // CCCCCCCC\r
+\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
case IRMP_RECS80_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_BOSE_PROTOCOL == 1\r
+ case IRMP_BOSE_PROTOCOL:\r
+ {\r
+ command = bitsrevervse (irmp_data_p->command, BOSE_COMMAND_LEN);\r
+\r
+ irsnd_buffer[0] = (command & 0xFF00) >> 8; // CCCCCCCC\r
+ irsnd_buffer[1] = ~((command & 0xFF00) >> 8); // cccccccc\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
case IRMP_NUBERT_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
+ case IRMP_FAN_PROTOCOL:\r
+ {\r
+ irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC\r
+ irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
+ case IRMP_SPEAKER_PROTOCOL:\r
+ {\r
+ irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
+ irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
case IRMP_BANG_OLUFSEN_PROTOCOL:\r
{\r
#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
case IRMP_GRUNDIG_PROTOCOL:\r
{\r
- command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
+ command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);\r
\r
irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
irsnd_buffer[1] = 0xC0; // 11\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
+ case IRMP_TELEFUNKEN_PROTOCOL:\r
+ {\r
+ irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC\r
+ irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC\r
+\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
case IRMP_IR60_PROTOCOL:\r
{\r
#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
case IRMP_SIEMENS_PROTOCOL:\r
{\r
- irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r
- irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r
- irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
+ irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r
+ irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r
+ irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
\r
irsnd_busy = TRUE;\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
+ case IRMP_RUWIDO_PROTOCOL:\r
+ {\r
+ irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r
+ irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r
+ irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
case IRMP_FDC_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
+ case IRMP_ROOMBA_PROTOCOL:\r
+ {\r
+ irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
+ case IRMP_PENTAX_PROTOCOL:\r
+ {\r
+ irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
+# define ACP_SET_BIT(acp24_bitno, c, irmp_bitno) \\r
+ do \\r
+ { \\r
+ if ((c) & (1<<(irmp_bitno))) \\r
+ { \\r
+ irsnd_buffer[((acp24_bitno)>>3)] |= 1 << (((7 - (acp24_bitno)) & 0x07)); \\r
+ } \\r
+ } while (0)\r
+\r
+ case IRMP_ACP24_PROTOCOL:\r
+ {\r
+ uint16_t cmd = irmp_data_p->command;\r
+ uint8_t i;\r
+\r
+ address = bitsrevervse (irmp_data_p->address, ACP24_ADDRESS_LEN);\r
+\r
+ for (i = 0; i < 8; i++)\r
+ {\r
+ irsnd_buffer[i] = 0x00; // CCCCCCCC\r
+ }\r
+\r
+ // ACP24-Frame:\r
+ // 1 2 3 4 5 6\r
+ // 0123456789012345678901234567890123456789012345678901234567890123456789\r
+ // N VVMMM ? ??? t vmA x y TTTT\r
+ // \r
+ // irmp_data_p->command:\r
+ // \r
+ // 5432109876543210\r
+ // NAVVvMMMmtxyTTTT\r
+\r
+ ACP_SET_BIT( 0, cmd, 15);\r
+ ACP_SET_BIT(24, cmd, 14);\r
+ ACP_SET_BIT( 2, cmd, 13);\r
+ ACP_SET_BIT( 3, cmd, 12);\r
+ ACP_SET_BIT(22, cmd, 11);\r
+ ACP_SET_BIT( 4, cmd, 10);\r
+ ACP_SET_BIT( 5, cmd, 9);\r
+ ACP_SET_BIT( 6, cmd, 8);\r
+ ACP_SET_BIT(23, cmd, 7);\r
+ ACP_SET_BIT(20, cmd, 6);\r
+ ACP_SET_BIT(26, cmd, 5);\r
+ ACP_SET_BIT(44, cmd, 4);\r
+ ACP_SET_BIT(66, cmd, 3);\r
+ ACP_SET_BIT(67, cmd, 2);\r
+ ACP_SET_BIT(68, cmd, 1);\r
+ ACP_SET_BIT(69, cmd, 0);\r
+\r
+ irsnd_busy = TRUE;\r
+ break;\r
+ }\r
+#endif\r
+\r
default:\r
{\r
break;\r
{\r
auto_repetition_pause_counter++;\r
\r
-#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
- if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
- {\r
- repeat_frame_pause_len--;\r
- }\r
-#endif\r
-\r
if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
{\r
auto_repetition_pause_counter = 0;\r
}\r
else\r
{\r
-#ifdef DEBUG\r
+#ifdef ANALYZE\r
if (irsnd_is_on)\r
{\r
putchar ('0');\r
return irsnd_busy;\r
}\r
}\r
-#if 0\r
- else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
-#else\r
else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
-#endif\r
{\r
packet_repeat_pause_counter++;\r
-\r
-#ifdef DEBUG\r
+#ifdef ANALYZE\r
if (irsnd_is_on)\r
{\r
putchar ('0');\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
+ case IRMP_LGAIR_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = NEC_PULSE_LEN;\r
+ pause_1_len = NEC_1_PAUSE_LEN - 1;\r
+ pulse_0_len = NEC_PULSE_LEN;\r
+ pause_0_len = NEC_0_PAUSE_LEN - 1;\r
+ has_stop_bit = NEC_STOP_BIT;\r
+ complete_data_len = LGAIR_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = 1; // 1 frame\r
+ auto_repetition_pause_len = 0;\r
+ repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
case IRMP_SAMSUNG_PROTOCOL:\r
{\r
pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
has_stop_bit = SAMSUNG_STOP_BIT;\r
complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
- n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
+ n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame\r
auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
+ case IRMP_SAMSUNG48_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = SAMSUNG_PULSE_LEN;\r
+ pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
+ pulse_0_len = SAMSUNG_PULSE_LEN;\r
+ pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
+ has_stop_bit = SAMSUNG_STOP_BIT;\r
+ complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame\r
+ auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
+ repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
case IRMP_MATSUSHITA_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1\r
+ case IRMP_TECHNICS_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = MATSUSHITA_PULSE_LEN;\r
+ pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
+ pulse_0_len = MATSUSHITA_PULSE_LEN;\r
+ pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
+ has_stop_bit = MATSUSHITA_STOP_BIT;\r
+ complete_data_len = TECHNICS_COMPLETE_DATA_LEN; // here TECHNICS\r
+ n_auto_repetitions = 1; // 1 frame\r
+ auto_repetition_pause_len = 0;\r
+ repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
case IRMP_KASEIKYO_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1\r
+ case IRMP_PANASONIC_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = PANASONIC_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = PANASONIC_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = PANASONIC_PULSE_LEN;\r
+ pause_1_len = PANASONIC_1_PAUSE_LEN - 1;\r
+ pulse_0_len = PANASONIC_PULSE_LEN;\r
+ pause_0_len = PANASONIC_0_PAUSE_LEN - 1;\r
+ has_stop_bit = PANASONIC_STOP_BIT;\r
+ complete_data_len = PANASONIC_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = PANASONIC_FRAMES; // 1 frame\r
+ auto_repetition_pause_len = PANASONIC_AUTO_REPETITION_PAUSE_LEN; // 40 ms pause\r
+ repeat_frame_pause_len = PANASONIC_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
case IRMP_RECS80_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
+ case IRMP_TELEFUNKEN_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = TELEFUNKEN_PULSE_LEN;\r
+ pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;\r
+ pulse_0_len = TELEFUNKEN_PULSE_LEN;\r
+ pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;\r
+ has_stop_bit = TELEFUNKEN_STOP_BIT;\r
+ complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = 1; // 1 frames\r
+ auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause\r
+ repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
case IRMP_RC5_PROTOCOL:\r
{\r
complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
- repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
+ repeat_frame_pause_len = THOMSON_FRAME_REPEAT_PAUSE_LEN;\r
irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_BOSE_PROTOCOL == 1\r
+ case IRMP_BOSE_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = BOSE_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = BOSE_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = BOSE_PULSE_LEN;\r
+ pause_1_len = BOSE_1_PAUSE_LEN - 1;\r
+ pulse_0_len = BOSE_PULSE_LEN;\r
+ pause_0_len = BOSE_0_PAUSE_LEN - 1;\r
+ has_stop_bit = BOSE_STOP_BIT;\r
+ complete_data_len = BOSE_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = BOSE_FRAMES; // 1 frame\r
+ auto_repetition_pause_len = BOSE_AUTO_REPETITION_PAUSE_LEN; // 40 ms pause\r
+ repeat_frame_pause_len = BOSE_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
case IRMP_NUBERT_PROTOCOL:\r
{\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
+ case IRMP_FAN_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = FAN_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = FAN_1_PULSE_LEN;\r
+ pause_1_len = FAN_1_PAUSE_LEN - 1;\r
+ pulse_0_len = FAN_0_PULSE_LEN;\r
+ pause_0_len = FAN_0_PAUSE_LEN - 1;\r
+ has_stop_bit = FAN_STOP_BIT;\r
+ complete_data_len = FAN_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = FAN_FRAMES; // only 1 frame\r
+ auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
+ repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
+ case IRMP_SPEAKER_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;\r
+ pulse_1_len = SPEAKER_1_PULSE_LEN;\r
+ pause_1_len = SPEAKER_1_PAUSE_LEN - 1;\r
+ pulse_0_len = SPEAKER_0_PULSE_LEN;\r
+ pause_0_len = SPEAKER_0_PAUSE_LEN - 1;\r
+ has_stop_bit = SPEAKER_STOP_BIT;\r
+ complete_data_len = SPEAKER_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = SPEAKER_FRAMES; // 2 frames\r
+ auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
+ repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
case IRMP_BANG_OLUFSEN_PROTOCOL:\r
{\r
pulse_len = SIEMENS_BIT_LEN;\r
pause_len = SIEMENS_BIT_LEN;\r
has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
- complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r
+ complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r
n_auto_repetitions = 1; // 1 frame\r
auto_repetition_pause_len = 0;\r
repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
break;\r
}\r
#endif\r
+#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
+ case IRMP_RUWIDO_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r
+ pulse_len = RUWIDO_BIT_PULSE_LEN;\r
+ pause_len = RUWIDO_BIT_PAUSE_LEN;\r
+ has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
+ complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = 1; // 1 frame\r
+ auto_repetition_pause_len = 0;\r
+ repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
+ break;\r
+ }\r
+#endif\r
#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
case IRMP_FDC_PROTOCOL:\r
{\r
irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
break;\r
}\r
+#endif\r
+#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
+ case IRMP_ROOMBA_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
+ pulse_1_len = ROOMBA_1_PULSE_LEN;\r
+ pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
+ pulse_0_len = ROOMBA_0_PULSE_LEN;\r
+ pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
+ has_stop_bit = ROOMBA_STOP_BIT;\r
+ complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
+ n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r
+ auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
+ repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
+ case IRMP_PENTAX_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;\r
+ complete_data_len = PENTAX_COMPLETE_DATA_LEN;\r
+ pulse_1_len = PENTAX_PULSE_LEN;\r
+ pause_1_len = PENTAX_1_PAUSE_LEN - 1;\r
+ pulse_0_len = PENTAX_PULSE_LEN;\r
+ pause_0_len = PENTAX_0_PAUSE_LEN - 1;\r
+ has_stop_bit = PENTAX_STOP_BIT;\r
+ n_auto_repetitions = 1; // 1 frame\r
+ auto_repetition_pause_len = 0;\r
+ repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
+#endif\r
+#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
+ case IRMP_ACP24_PROTOCOL:\r
+ {\r
+ startbit_pulse_len = ACP24_START_BIT_PULSE_LEN;\r
+ startbit_pause_len = ACP24_START_BIT_PAUSE_LEN - 1;\r
+ complete_data_len = ACP24_COMPLETE_DATA_LEN;\r
+ pulse_1_len = ACP24_PULSE_LEN;\r
+ pause_1_len = ACP24_1_PAUSE_LEN - 1;\r
+ pulse_0_len = ACP24_PULSE_LEN;\r
+ pause_0_len = ACP24_0_PAUSE_LEN - 1;\r
+ has_stop_bit = ACP24_STOP_BIT;\r
+ n_auto_repetitions = 1; // 1 frame\r
+ auto_repetition_pause_len = 0;\r
+ repeat_frame_pause_len = ACP24_FRAME_REPEAT_PAUSE_LEN;\r
+ irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
+ break;\r
+ }\r
#endif\r
default:\r
{\r
#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
case IRMP_NEC42_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
+ case IRMP_LGAIR_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
case IRMP_SAMSUNG_PROTOCOL:\r
case IRMP_SAMSUNG32_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
+ case IRMP_SAMSUNG48_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
case IRMP_MATSUSHITA_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
+ case IRMP_TECHNICS_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
case IRMP_KASEIKYO_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1\r
+ case IRMP_PANASONIC_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
case IRMP_RECS80_PROTOCOL:\r
#endif\r
#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
case IRMP_RECS80EXT_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
+ case IRMP_TELEFUNKEN_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
case IRMP_DENON_PROTOCOL:\r
#endif\r
-#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
- case IRMP_THOMSON_PROTOCOL:\r
+#if IRSND_SUPPORT_BOSE_PROTOCOL == 1\r
+ case IRMP_BOSE_PROTOCOL:\r
#endif\r
#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
case IRMP_NUBERT_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
+ case IRMP_FAN_PROTOCOL:\r
+#endif\r
+#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
+ case IRMP_SPEAKER_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
case IRMP_BANG_OLUFSEN_PROTOCOL:\r
#endif\r
#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
case IRMP_LEGO_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
+ case IRMP_THOMSON_PROTOCOL:\r
+#endif\r
+#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
+ case IRMP_ROOMBA_PROTOCOL:\r
+#endif\r
+#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
+ case IRMP_PENTAX_PROTOCOL:\r
+#endif\r
+#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
+ case IRMP_ACP24_PROTOCOL:\r
+#endif\r
\r
#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
- IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || IRSND_SUPPORT_TECHNICS_PROTOCOL == 1 || \\r
IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
- IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
- IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
+ IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1\r
{\r
-#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
- if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
- {\r
- if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
- {\r
- auto_repetition_pause_len--;\r
- }\r
-\r
- if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
- {\r
- repeat_frame_pause_len--;\r
- }\r
- }\r
-#endif\r
-\r
if (pulse_counter == 0)\r
{\r
if (current_bit == 0xFF) // send start bit\r
if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
{\r
pulse_len = SAMSUNG_PULSE_LEN;\r
- pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
+ pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
(SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
}\r
else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
\r
pulse_len = SAMSUNG_PULSE_LEN;\r
- pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
+ pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
(SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
}\r
}\r
if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
{\r
pulse_len = NEC_PULSE_LEN;\r
- pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
+ pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
(NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
}\r
else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
\r
pulse_len = NEC_PULSE_LEN;\r
- pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
+ pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
(NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
}\r
}\r
}\r
else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
{\r
- uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
+ uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;\r
pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
\r
if (cur_bit_value == last_bit_value)\r
}\r
else\r
#endif\r
- if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
+ if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))\r
{\r
pulse_len = pulse_1_len;\r
pause_len = pause_1_len;\r
#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
case IRMP_SIEMENS_PROTOCOL:\r
#endif\r
+#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
+ case IRMP_RUWIDO_PROTOCOL:\r
+#endif\r
#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
case IRMP_GRUNDIG_PROTOCOL:\r
#endif\r
case IRMP_A1TVBOX_PROTOCOL:\r
#endif\r
\r
-#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
- IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
+#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r
+ IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
{\r
if (pulse_counter == pulse_len && pause_counter == pause_len)\r
{\r
{\r
pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
- first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
+ first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
}\r
}\r
else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
- // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r
+ // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r
#endif\r
{\r
if (current_bit == 0xFF) // 1 start bit\r
{\r
if (current_bit == 4) // toggle bit (double len)\r
{\r
- pulse_len = 2 * RC6_BIT_LEN;\r
- pause_len = 2 * RC6_BIT_LEN;\r
+ pulse_len = RC6_BIT_2_LEN; // = 2 * RC_BIT_LEN\r
+ pause_len = RC6_BIT_2_LEN; // = 2 * RC_BIT_LEN\r
}\r
}\r
else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
{\r
if (current_bit == 4) // toggle bit (double len)\r
{\r
- pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
- pause_len = 2 * RC6_BIT_LEN;\r
+ pulse_len = RC6_BIT_3_LEN; // = 3 * RC6_BIT_LEN\r
+ pause_len = RC6_BIT_2_LEN; // = 2 * RC6_BIT_LEN\r
}\r
else if (current_bit == 5) // toggle bit (double len)\r
{\r
- pause_len = 2 * RC6_BIT_LEN;\r
+ pause_len = RC6_BIT_2_LEN; // = 2 * RC6_BIT_LEN\r
}\r
}\r
}\r
#endif\r
- first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
+ first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
}\r
\r
if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
break;\r
}\r
#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
- // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
+ // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
\r
default:\r
{\r
}\r
}\r
\r
-#ifdef DEBUG\r
+#ifdef ANALYZE\r
if (irsnd_is_on)\r
{\r
putchar ('0');\r
return irsnd_busy;\r
}\r
\r
-#ifdef DEBUG\r
+#ifdef ANALYZE\r
\r
// main function - for unix/linux + windows only!\r
// AVR: see main.c!\r
return 0;\r
}\r
\r
-#endif // DEBUG\r
+#endif // ANALYZE\r
projects / irmp.git / blobdiff