X-Git-Url: http://cloudbase.mooo.com/gitweb/irmp.git/blobdiff_plain/08f2dd9d18830e4671dd99ac04569c6dd9895b98..03148c47316df17b3f7620207c268f82c6aa6fe7:/irsnd.c diff --git a/irsnd.c b/irsnd.c index ee184e4..9d60dbd 100644 --- a/irsnd.c +++ b/irsnd.c @@ -1,18 +1,19 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * @file irsnd.c * - * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de * * Supported mikrocontrollers: * + * ATtiny87, ATtiny167 * ATtiny45, ATtiny85 - * ATtiny84 + * ATtiny44 ATtiny84 * ATmega8, ATmega16, ATmega32 * ATmega162 - * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284 + * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P * - * $Id: irsnd.c,v 1.54 2012/05/23 12:26:26 fm Exp $ + * $Id: irsnd.c,v 1.73 2014/05/19 18:55:43 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,60 +24,63 @@ #include "irsnd.h" +#ifndef F_CPU +# error F_CPU unkown +#endif + /*--------------------------------------------------------------------------------------------------------------------------------------------------- * ATtiny pin definition of OC0A / OC0B * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B *--------------------------------------------------------------------------------------------------------------------------------------------------- */ -#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7 +#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7 # if IRSND_OCx == IRSND_OC0A // OC0A -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 2 // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 2 # elif IRSND_OCx == IRSND_OC0B // OC0B -# define IRSND_PORT PORTA // port A -# define IRSND_DDR DDRA // ddr A -# define IRSND_BIT 7 // OC0B +# define IRSND_PORT_LETTER A +# define IRSND_BIT_NUMBER 7 # else # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h # endif // IRSND_OCx #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1 # if IRSND_OCx == IRSND_OC0A // OC0A -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 0 // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 0 # elif IRSND_OCx == IRSND_OC0B // OC0B -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 1 // OC0B +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 1 # else # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h # endif // IRSND_OCx +#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2 +# if IRSND_OCx == IRSND_OC0A // OC0A +# define IRSND_PORT_LETTER A +# define IRSND_BIT_NUMBER 2 +# else +# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h +# endif // IRSND_OCx #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3 # if IRSND_OCx == IRSND_OC2 // OC0A -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 3 // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 # else # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h # endif // IRSND_OCx #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7 # if IRSND_OCx == IRSND_OC2 // OC2 -# define IRSND_PORT PORTD // port D -# define IRSND_DDR DDRD // ddr D -# define IRSND_BIT 7 // OC2 +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 7 # else # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h # endif // IRSND_OCx #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0 # if IRSND_OCx == IRSND_OC2 // OC2 -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 1 // OC2 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 1 # elif IRSND_OCx == IRSND_OC0 // OC0 -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 0 // OC0 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 0 # else # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h # endif // IRSND_OCx @@ -87,21 +91,17 @@ || defined (__AVR_ATmega1284__) \ || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4 # if IRSND_OCx == IRSND_OC2A // OC2A -# define IRSND_PORT PORTD // port D -# define IRSND_DDR DDRD // ddr D -# define IRSND_BIT 7 // OC2A +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 7 # elif IRSND_OCx == IRSND_OC2B // OC2B -# define IRSND_PORT PORTD // port D -# define IRSND_DDR DDRD // ddr D -# define IRSND_BIT 6 // OC2B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 6 # elif IRSND_OCx == IRSND_OC0A // OC0A -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 3 // OC0A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 # elif IRSND_OCx == IRSND_OC0B // OC0B -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 4 // OC0B +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 4 # else # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h # endif // IRSND_OCx @@ -112,37 +112,30 @@ || defined (__AVR_ATmega168P__) \ || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5 # if IRSND_OCx == IRSND_OC2A // OC2A -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 3 // OC2A +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 3 # elif IRSND_OCx == IRSND_OC2B // OC2B -# define IRSND_PORT PORTD // port D -# define IRSND_DDR DDRD // ddr D -# define IRSND_BIT 3 // OC2B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 3 # elif IRSND_OCx == IRSND_OC0A // OC0A -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 6 // OC0A +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 6 # elif IRSND_OCx == IRSND_OC0B // OC0B -# define IRSND_PORT PORTD // port D -# define IRSND_DDR DDRD // ddr D -# define IRSND_BIT 5 // OC0B +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 5 # else # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h # endif // IRSND_OCx -#elif defined (__AVR_ATmega8515__) +#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2 # if IRSND_OCx == IRSND_OC0 -# define IRSND_PORT PORTB // port B -# define IRSND_DDR DDRB // ddr B -# define IRSND_BIT 0 // OC0 +# define IRSND_PORT_LETTER B +# define IRSND_BIT_NUMBER 0 # elif IRSND_OCx == IRSND_OC1A -# define IRSND_PORT PORTD // port D -# define IRSND_DDR DDRD // ddr D -# define IRSND_BIT 5 // OC1A +# define IRSND_PORT_LETTER D +# define IRSND_BIT_NUMBER 5 # elif IRSND_OCx == IRSND_OC1B -# define IRSND_PORT PORTE // port E -# define IRSND_DDR DDRE // ddr E -# define IRSND_BIT 2 // OC1E +# define IRSND_PORT_LETTER E +# define IRSND_BIT_NUMBER 2 # else # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h # endif // IRSND_OCx @@ -156,6 +149,14 @@ # endif // unix, WIN32 #endif // __AVR... +#if defined(ATMEL_AVR) +# define _CONCAT(a,b) a##b +# define CONCAT(a,b) _CONCAT(a,b) +# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER) +# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER) +# define IRSND_BIT IRSND_BIT_NUMBER +#endif + #if IRSND_SUPPORT_NIKON_PROTOCOL == 1 typedef uint16_t IRSND_PAUSE_LEN; #else @@ -277,6 +278,11 @@ #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5) #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! +#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5) +#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5) +#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5) +#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5) +#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! #ifdef PIC_C18 // PIC C18 # define IRSND_FREQ_TYPE uint8_t @@ -297,14 +303,19 @@ # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) #else // AVR +# if F_CPU >= 16000000L +# define AVR_PRESCALER 8 +# else +# define AVR_PRESCALER 1 +# endif # define IRSND_FREQ_TYPE uint8_t -# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2) - 1) -# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2) - 1) -# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2) - 1) -# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2) - 1) -# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2) - 1) -# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2) - 1) -# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2) - 1) +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1) #endif #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5) @@ -345,6 +356,21 @@ #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5) #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! +#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5) +#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5) +#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5) +#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5) +#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! +#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5) +#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5) +#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5) +#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5) +#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5) +#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5) +#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + static volatile uint8_t irsnd_busy = 0; static volatile uint8_t irsnd_protocol = 0; static volatile uint8_t irsnd_buffer[6] = {0}; @@ -357,7 +383,6 @@ static void (*irsnd_callback_ptr) (uint8_t); /*--------------------------------------------------------------------------------------------------------------------------------------------------- * Switch PWM on - * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing *--------------------------------------------------------------------------------------------------------------------------------------------------- */ static void @@ -365,11 +390,14 @@ irsnd_on (void) { if (! irsnd_is_on) { -#ifndef DEBUG +#ifndef ANALYZE # if defined(PIC_C18) // PIC C18 - IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off) + PWMon(); + // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off) # elif defined (ARM_STM32) // STM32 - TIM_Cmd(IRSND_TIMER, ENABLE); // TIMx enable counter + TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode + TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM()) + TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter # else // AVR # if IRSND_OCx == IRSND_OC2 // use OC2 TCCR2 |= (1< disbale PWM output pin (0=PWM on, 1=PWM off) + PWMoff(); + // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off) # elif defined (ARM_STM32) // STM32 - TIM_Cmd(IRSND_TIMER, DISABLE); // TIMx enable counter + TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter + TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive + TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM()) + TIM_SetCounter(IRSND_TIMER, 0); // reset counter value # else //AVR # if IRSND_OCx == IRSND_OC2 // use OC2 @@ -435,7 +467,7 @@ irsnd_off (void) # endif // IRSND_OCx IRSND_PORT &= ~(1<= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14)) - TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency; + if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency) + { + TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency; + } + else + { + TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2; + } # else - TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency; + if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency) + { + TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency; + } + else + { + TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2; + } # endif } freq = TimeBaseFreq/freq; - /* Time base configuration */ - TIM_TimeBaseStructure.TIM_Period = freq; - TIM_TimeBaseStructure.TIM_Prescaler = 0; - TIM_TimeBaseStructure.TIM_ClockDivision = 0; - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure); - - /* PWM1 Mode configuration: Channel1 */ - TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; - TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; - TIM_OCInitStructure.TIM_Pulse = (freq + 1) / 2; - TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; - TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure); - + /* Set frequency */ + TIM_SetAutoreload(IRSND_TIMER, freq - 1); + /* Set duty cycle */ + TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2); # else // AVR # if IRSND_OCx == IRSND_OC2 @@ -511,7 +546,7 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq) # error wrong value of IRSND_OCx # endif # endif //PIC_C18 -#endif // DEBUG +#endif // ANALYZE } /*--------------------------------------------------------------------------------------------------------------------------------------------------- @@ -522,13 +557,16 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq) void irsnd_init (void) { -#ifndef DEBUG +#ifndef ANALYZE # if defined(PIC_C18) // PIC C18 OpenTimer; - irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency - IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off) + irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency + IRSND_PIN = 0; // set IO to outout + PWMoff(); # elif defined (ARM_STM32) // STM32 - GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + TIM_OCInitTypeDef TIM_OCInitStructure; /* GPIOx clock enable */ # if defined (ARM_STM32L1XX) @@ -561,34 +599,64 @@ irsnd_init (void) # else RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE); # endif - irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency - /* TIMx Configuration */ - TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable); + /* Time base configuration */ + TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later + TIM_TimeBaseStructure.TIM_Prescaler = 0; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure); + + /* PWM1 Mode configuration */ + TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later + TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; + TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure); + + /* Preload configuration */ TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE); - TIM_Cmd(IRSND_TIMER, ENABLE); + TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable); + + irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency # else // AVR IRSND_PORT &= ~(1<address, KASEIKYO_ADDRESS_LEN); command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4); genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4); - xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F; + xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F; irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA - irsnd_buffer[2] = xor << 4 | (command & 0x000F); // XXXXCCCC + irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC - xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4]; + xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4]; - irsnd_buffer[5] = xor; + irsnd_buffer[5] = xor_value; irsnd_busy = TRUE; break; } @@ -977,14 +1045,24 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait) #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 case IRMP_SIEMENS_PROTOCOL: { - irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA - irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC - irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc + irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA + irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC + irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc irsnd_busy = TRUE; break; } #endif +#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 + case IRMP_RUWIDO_PROTOCOL: + { + irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA + irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC + irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c + irsnd_busy = TRUE; + break; + } +#endif #if IRSND_SUPPORT_FDC_PROTOCOL == 1 case IRMP_FDC_PROTOCOL: { @@ -1041,8 +1119,26 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait) irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + case IRMP_A1TVBOX_PROTOCOL: + { + irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA + irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC + irsnd_buffer[2] = (irmp_data_p->command << 6); // CC - irsnd_protocol = IRMP_LEGO_PROTOCOL; + irsnd_busy = TRUE; + break; + } +#endif +#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 + case IRMP_ROOMBA_PROTOCOL: + { + + irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC. irsnd_busy = TRUE; break; } @@ -1162,7 +1258,7 @@ irsnd_ISR (void) } else { -#ifdef DEBUG +#ifdef ANALYZE if (irsnd_is_on) { putchar ('0'); @@ -1175,15 +1271,10 @@ irsnd_ISR (void) return irsnd_busy; } } -#if 0 - else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len) -#else else if (packet_repeat_pause_counter < repeat_frame_pause_len) -#endif { packet_repeat_pause_counter++; - -#ifdef DEBUG +#ifdef ANALYZE if (irsnd_is_on) { putchar ('0'); @@ -1583,7 +1674,7 @@ irsnd_ISR (void) pulse_len = SIEMENS_BIT_LEN; pause_len = SIEMENS_BIT_LEN; has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT; - complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1; + complete_data_len = SIEMENS_COMPLETE_DATA_LEN; n_auto_repetitions = 1; // 1 frame auto_repetition_pause_len = 0; repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN; @@ -1591,6 +1682,22 @@ irsnd_ISR (void) break; } #endif +#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 + case IRMP_RUWIDO_PROTOCOL: + { + startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN; + startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN; + pulse_len = RUWIDO_BIT_PULSE_LEN; + pause_len = RUWIDO_BIT_PAUSE_LEN; + has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT; + complete_data_len = RUWIDO_COMPLETE_DATA_LEN; + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_36_KHZ); + break; + } +#endif #if IRSND_SUPPORT_FDC_PROTOCOL == 1 case IRMP_FDC_PROTOCOL: { @@ -1654,7 +1761,7 @@ irsnd_ISR (void) case IRMP_NIKON_PROTOCOL: { startbit_pulse_len = NIKON_START_BIT_PULSE_LEN; - startbit_pause_len = 271 - 1; // NIKON_START_BIT_PAUSE_LEN; + startbit_pause_len = NIKON_START_BIT_PAUSE_LEN; complete_data_len = NIKON_COMPLETE_DATA_LEN; pulse_1_len = NIKON_PULSE_LEN; pause_1_len = NIKON_1_PAUSE_LEN - 1; @@ -1685,6 +1792,40 @@ irsnd_ISR (void) irsnd_set_freq (IRSND_FREQ_38_KHZ); break; } +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + case IRMP_A1TVBOX_PROTOCOL: + { + startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN + startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN + pulse_len = A1TVBOX_BIT_PULSE_LEN; + pause_len = A1TVBOX_BIT_PAUSE_LEN; + has_stop_bit = A1TVBOX_STOP_BIT; + complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data + n_auto_repetitions = 1; // 1 frame + auto_repetition_pause_len = 0; + repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } +#endif +#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 + case IRMP_ROOMBA_PROTOCOL: + { + startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN; + startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN; + pulse_1_len = ROOMBA_1_PULSE_LEN; + pause_1_len = ROOMBA_1_PAUSE_LEN - 1; + pulse_0_len = ROOMBA_0_PULSE_LEN; + pause_0_len = ROOMBA_0_PAUSE_LEN - 1; + has_stop_bit = ROOMBA_STOP_BIT; + complete_data_len = ROOMBA_COMPLETE_DATA_LEN; + n_auto_repetitions = ROOMBA_FRAMES; // 8 frames + auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN; + repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_38_KHZ); + break; + } #endif default: { @@ -1732,9 +1873,6 @@ irsnd_ISR (void) #if IRSND_SUPPORT_DENON_PROTOCOL == 1 case IRMP_DENON_PROTOCOL: #endif -#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1 - case IRMP_THOMSON_PROTOCOL: -#endif #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1 case IRMP_NUBERT_PROTOCOL: #endif @@ -1756,13 +1894,19 @@ irsnd_ISR (void) #if IRSND_SUPPORT_LEGO_PROTOCOL == 1 case IRMP_LEGO_PROTOCOL: #endif - +#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1 + case IRMP_THOMSON_PROTOCOL: +#endif +#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 + case IRMP_ROOMBA_PROTOCOL: +#endif #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \ IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \ IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \ IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \ - IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 + IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \ + IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 { #if IRSND_SUPPORT_DENON_PROTOCOL == 1 if (irsnd_protocol == IRMP_DENON_PROTOCOL) @@ -1959,6 +2103,9 @@ irsnd_ISR (void) #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 case IRMP_SIEMENS_PROTOCOL: #endif +#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 + case IRMP_RUWIDO_PROTOCOL: +#endif #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 case IRMP_GRUNDIG_PROTOCOL: #endif @@ -1968,9 +2115,19 @@ irsnd_ISR (void) #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1 case IRMP_NOKIA_PROTOCOL: #endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + case IRMP_A1TVBOX_PROTOCOL: +#endif -#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \ - IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 +#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \ + IRSND_SUPPORT_RC6_PROTOCOL == 1 || \ + IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \ + IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \ + IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \ + IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \ + IRSND_SUPPORT_IR60_PROTOCOL == 1 || \ + IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \ + IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 { if (pulse_counter == pulse_len && pause_counter == pause_len) { @@ -2039,7 +2196,7 @@ irsnd_ISR (void) } } else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL || - // irsnd_protocol == IRMP_SIEMENS_PROTOCOL) + // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL) #endif { if (current_bit == 0xFF) // 1 start bit @@ -2050,7 +2207,19 @@ irsnd_ISR (void) pulse_len = startbit_pulse_len; pause_len = startbit_pause_len; } + else +#endif +#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1 + if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL) + { + current_bit = 0; + } + else #endif + { + ; + } + first_pulse = TRUE; } else // send n'th bit @@ -2094,6 +2263,8 @@ irsnd_ISR (void) if (first_pulse) { + // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len); + if (pulse_counter < pulse_len) { if (pulse_counter == 0) @@ -2113,6 +2284,8 @@ irsnd_ISR (void) } else { + // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len); + if (pause_counter < pause_len) { if (pause_counter == 0) @@ -2134,7 +2307,7 @@ irsnd_ISR (void) break; } #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || - // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 + // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 default: { @@ -2167,7 +2340,7 @@ irsnd_ISR (void) } } -#ifdef DEBUG +#ifdef ANALYZE if (irsnd_is_on) { putchar ('0'); @@ -2181,7 +2354,7 @@ irsnd_ISR (void) return irsnd_busy; } -#ifdef DEBUG +#ifdef ANALYZE // main function - for unix/linux + windows only! // AVR: see main.c! @@ -2231,6 +2404,17 @@ main (int argc, char ** argv) } putchar ('\n'); + +#if 1 // enable here to send twice + (void) irsnd_send_data (&irmp_data, TRUE); + + while (irsnd_busy) + { + irsnd_ISR (); + } + + putchar ('\n'); +#endif } else { @@ -2240,4 +2424,4 @@ main (int argc, char ** argv) return 0; } -#endif // DEBUG +#endif // ANALYZE