X-Git-Url: http://cloudbase.mooo.com/gitweb/irmp.git/blobdiff_plain/173b00a6f5d5c604471f9755d80c9181da15133c..refs/heads/master:/irsnd.c?ds=sidebyside diff --git a/irsnd.c b/irsnd.c index 8e1fd51..1656bde 100644 --- a/irsnd.c +++ b/irsnd.c @@ -1,7 +1,7 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * @file irsnd.c * - * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2016 Frank Meyer - frank(at)fli4l.de * * Supported AVR mikrocontrollers: * @@ -14,7 +14,7 @@ * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P * - * $Id: irsnd.c,v 1.99 2015/12/16 14:12:17 fm Exp $ + * $Id: irsnd.c,v 1.103 2017/02/17 09:13:06 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -149,19 +149,19 @@ # endif // IRSND_OCx #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2 -# if IRSND_OCx == IRSND_OC0 +# if IRSND_OCx == IRSND_OC0 # define IRSND_PORT_LETTER B # define IRSND_BIT_NUMBER 0 -# elif IRSND_OCx == IRSND_OC1A +# elif IRSND_OCx == IRSND_OC1A # define IRSND_PORT_LETTER D # define IRSND_BIT_NUMBER 5 -# elif IRSND_OCx == IRSND_OC1B +# elif IRSND_OCx == IRSND_OC1B # define IRSND_PORT_LETTER E # define IRSND_BIT_NUMBER 2 # endif // IRSND_OCx #elif defined (__AVR_XMEGA__) // ATxmega -# if IRSND_OCx == IRSND_XMEGA_OC0A +# if IRSND_OCx == IRSND_XMEGA_OC0A # define IRSND_BIT_NUMBER 0 # elif IRSND_OCx == IRSND_XMEGA_OC0B # define IRSND_BIT_NUMBER 1 @@ -177,14 +177,22 @@ # error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h # endif // IRSND_OCx -#elif defined (PIC_C18) //Microchip C18 compiler +#elif defined (PIC_C18) // Microchip C18 compiler //Nothing here to do here -> See irsndconfig.h -#elif defined (ARM_STM32) //STM32 +#elif defined (ARM_STM32) // STM32 //Nothing here to do here -> See irsndconfig.h -#elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3 -# if !digitalPinHasPWM(IRSND_PIN) -# error need pin with PWM output. -# endif +#elif defined (__xtensa__) // ESP8266 + //Nothing here to do here -> See irsndconfig.h + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * Macro digitalPinHasPWM bothers PIC_C18 compiler, but why? + * + * #elif defined (TEENSY_ARM_CORTEX_M4) // Teensy3 + * # if !digitalPinHasPWM(IRSND_PIN) + * # error need pin with PWM output. + * # endif + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ #else # if !defined (unix) && !defined (WIN32) # error mikrocontroller not defined, please fill in definitions here. @@ -260,13 +268,20 @@ #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! -#define PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5) -#define PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5) -#define PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5) -#define PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5) -#define PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5) -#define PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! -#define PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! +#define PANASONIC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME + 0.5) +#define PANASONIC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME + 0.5) +#define PANASONIC_PULSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME + 0.5) +#define PANASONIC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME + 0.5) +#define PANASONIC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME + 0.5) +#define PANASONIC_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t! +#define PANASONIC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PANASONIC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! + +#define MITSU_HEAVY_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME + 0.5) +#define MITSU_HEAVY_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME + 0.5) +#define MITSU_HEAVY_PULSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME + 0.5) +#define MITSU_HEAVY_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME + 0.5) +#define MITSU_HEAVY_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME + 0.5) +#define MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MITSU_HEAVY_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t! #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5) #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5) @@ -406,6 +421,15 @@ # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000) # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) +#elif defined (__xtensa__) // ESP8266 +# define IRSND_FREQ_TYPE float +# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000) +# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000) +# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000) +# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000) +# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000) +# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000) +# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000) #else // AVR # if F_CPU >= 16000000L # define AVR_PRESCALER 8 @@ -493,7 +517,7 @@ static volatile uint8_t irsnd_busy = 0; static volatile uint8_t irsnd_protocol = 0; -static volatile uint8_t irsnd_buffer[9] = {0}; +static volatile uint8_t irsnd_buffer[11] = {0}; static volatile uint8_t irsnd_repeat = 0; static volatile uint8_t irsnd_is_on = FALSE; @@ -523,11 +547,14 @@ irsnd_on (void) # elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY analogWrite(IRSND_PIN, 33 * 255 / 100); // pwm 33% -# elif defined (__AVR_XMEGA__) +# elif defined (__xtensa__) // ESP8266 (Arduino) + analogWrite(IRSND_PIN, 33 * 1023 / 100); // pwm 33% + +# elif defined (__AVR_XMEGA__) # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A - XMEGA_Timer.CTRLB |= (1< disbale PWM output pin (0=PWM on, 1=PWM off) -# elif defined (ARM_STM32) // STM32 - TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter - TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive - TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM()) - TIM_SetCounter(IRSND_TIMER, 0); // reset counter value +# elif defined (ARM_STM32) // STM32 + TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter + TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive + TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM()) + TIM_SetCounter(IRSND_TIMER, 0); // reset counter value -# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY - analogWrite(IRSND_PIN, 0); // pwm off, LOW level +# elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY + analogWrite(IRSND_PIN, 0); // pwm off, LOW level + +# elif defined (__xtensa__) // ESP8266 + analogWrite(IRSND_PIN, 0); // pwm off, LOW level # elif defined (__AVR_XMEGA__) -# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A +# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A XMEGA_Timer.CTRLB &= ~(1<address; + command = irmp_data_p->command; + + irsnd_buffer[0] = 0x4A; + irsnd_buffer[1] = 0x75; + irsnd_buffer[2] = 0xC3; + irsnd_buffer[3] = 0x64; + irsnd_buffer[4] = 0x9B; + irsnd_buffer[5] = ~(address & 0xFF00) >> 8; + irsnd_buffer[6] = (address & 0xFF00) >> 8; + irsnd_buffer[7] = ~(address & 0x00FF); + irsnd_buffer[8] = (address & 0x00FF); + irsnd_buffer[9] = ~(command & 0x00FF); + irsnd_buffer[10] = (command & 0x00FF); + + irsnd_busy = TRUE; + break; + } +#endif #if IRSND_SUPPORT_RECS80_PROTOCOL == 1 case IRMP_RECS80_PROTOCOL: { - toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40; + toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x80; - irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) | - ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC - irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000 + irsnd_buffer[0] = toggle_bit_recs80 | ((irmp_data_p->address & 0x000F) << 4) | + ((irmp_data_p->command & 0x003C) >> 2); // TAAACCCC + irsnd_buffer[1] = (irmp_data_p->command & 0x03) << 6; // CC000000 irsnd_busy = TRUE; break; } @@ -1404,7 +1465,7 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait) irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0 - + irsnd_busy = TRUE; break; } @@ -1494,9 +1555,9 @@ irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait) // 1 2 3 4 5 6 // 0123456789012345678901234567890123456789012345678901234567890123456789 // N VVMMM ? ??? t vmA x y TTTT - // + // // irmp_data_p->command: - // + // // 5432109876543210 // NAVVvMMMmtxyTTTT @@ -1666,7 +1727,7 @@ irsnd_ISR (void) send_trailer = FALSE; return irsnd_busy; } - + n_repeat_frames = irsnd_repeat; if (n_repeat_frames == IRSND_ENDLESS_REPETITION) @@ -1905,6 +1966,24 @@ irsnd_ISR (void) break; } #endif +#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 + case IRMP_MITSU_HEAVY_PROTOCOL: + { + startbit_pulse_len = MITSU_HEAVY_START_BIT_PULSE_LEN; + startbit_pause_len = MITSU_HEAVY_START_BIT_PAUSE_LEN - 1; + pulse_1_len = MITSU_HEAVY_PULSE_LEN; + pause_1_len = MITSU_HEAVY_1_PAUSE_LEN - 1; + pulse_0_len = MITSU_HEAVY_PULSE_LEN; + pause_0_len = MITSU_HEAVY_0_PAUSE_LEN - 1; + has_stop_bit = MITSU_HEAVY_STOP_BIT; + complete_data_len = MITSU_HEAVY_COMPLETE_DATA_LEN; + n_auto_repetitions = MITSU_HEAVY_FRAMES; // 1 frame + auto_repetition_pause_len = 0;; + repeat_frame_pause_len = MITSU_HEAVY_FRAME_REPEAT_PAUSE_LEN; + irsnd_set_freq (IRSND_FREQ_40_KHZ); + break; + } +#endif #if IRSND_SUPPORT_RECS80_PROTOCOL == 1 case IRMP_RECS80_PROTOCOL: { @@ -2428,6 +2507,9 @@ irsnd_ISR (void) #if IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 case IRMP_PANASONIC_PROTOCOL: #endif +#if IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 + case IRMP_MITSU_HEAVY_PROTOCOL: +#endif #if IRSND_SUPPORT_RECS80_PROTOCOL == 1 case IRMP_RECS80_PROTOCOL: #endif @@ -2489,7 +2571,8 @@ irsnd_ISR (void) IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \ IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \ IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \ - IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 || IRSND_SUPPORT_BOSE_PROTOCOL == 1 + IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1 || IRSND_SUPPORT_PANASONIC_PROTOCOL == 1 || IRSND_SUPPORT_BOSE_PROTOCOL == 1 || \ + IRSND_SUPPORT_MITSU_HEAVY_PROTOCOL == 1 { if (pulse_counter == 0) {