X-Git-Url: http://cloudbase.mooo.com/gitweb/irmp.git/blobdiff_plain/476267f4e9854c75c890799df29225e61623c3cc..ac8504f8f769cf786c176198ac386007a9606812:/main.c?ds=sidebyside diff --git a/main.c b/main.c index 44fe1bb..25600d6 100644 --- a/main.c +++ b/main.c @@ -1,13 +1,14 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * main.c - demo main module to test irmp decoder * - * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de * - * $Id: main.c,v 1.10 2011/09/08 13:22:16 fm Exp $ + * $Id: main.c,v 1.18 2014/07/01 07:50:33 fm Exp $ * - * ATMEGA88 @ 8 MHz + * This demo module is runnable on AVRs and LM4F120 Launchpad (ARM Cortex M4) * - * Fuses: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9 + * ATMEGA88 @ 8 MHz internal RC Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9 + * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,25 +17,31 @@ *--------------------------------------------------------------------------------------------------------------------------------------------------- */ -#include -#include -#include -#include -#include - -#include "irmpconfig.h" #include "irmp.h" #ifndef F_CPU #error F_CPU unkown #endif +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * ATMEL AVR part: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#if defined (ATMEL_AVR) + void timer1_init (void) { #if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85: - OCR1A = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4 + +#if F_CPU >= 16000000L + OCR1C = (F_CPU / F_INTERRUPTS / 8) - 1; // compare value: 1/15000 of CPU frequency, presc = 8 + TCCR1 = (1 << CTC1) | (1 << CS12); // switch CTC Mode on, set prescaler to 8 +#else + OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4 TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4 +#endif + #else // ATmegaXX: OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1 @@ -47,28 +54,77 @@ timer1_init (void) #endif } -/*--------------------------------------------------------------------------------------------------------------------------------------------------- - * Timer 1 output compare A interrupt service routine, called every 1/15000 sec - *--------------------------------------------------------------------------------------------------------------------------------------------------- - */ #ifdef TIM1_COMPA_vect // ATtiny84 -ISR(TIM1_COMPA_vect) +#define COMPA_VECT TIM1_COMPA_vect #else -ISR(TIMER1_COMPA_vect) +#define COMPA_VECT TIMER1_COMPA_vect // ATmega #endif + +ISR(COMPA_VECT) // Timer1 output compare A interrupt service routine, called every 1/15000 sec { (void) irmp_ISR(); // call irmp ISR // call other timer interrupt routines... } +int +main (void) +{ + IRMP_DATA irmp_data; + + irmp_init(); // initialize irmp + timer1_init(); // initialize timer1 + sei (); // enable interrupts + + for (;;) + { + if (irmp_get_data (&irmp_data)) + { + // ir signal decoded, do something here... + // irmp_data.protocol is the protocol, see irmp.h + // irmp_data.address is the address/manufacturer code of ir sender + // irmp_data.command is the command code + // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h) + } + } +} + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * LM4F120 Launchpad (ARM Cortex M4): + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined(STELLARIS_ARM_CORTEX_M4) + +void +timer1_init (void) +{ + SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1); + TimerConfigure(TIMER1_BASE, TIMER_CFG_32_BIT_PER); + + TimerLoadSet(TIMER1_BASE, TIMER_A, (F_CPU / F_INTERRUPTS) -1); + IntEnable(INT_TIMER1A); + TimerIntEnable(TIMER1_BASE, TIMER_TIMA_TIMEOUT); + TimerEnable(TIMER1_BASE, TIMER_A); + // Important: Timer1IntHandler has to be configured in startup_ccs.c ! +} + +void +Timer1IntHandler(void) // Timer1 Interrupt Handler +{ + (void) irmp_ISR(); // call irmp ISR + // call other timer interrupt routines... +} int main (void) { IRMP_DATA irmp_data; + ROM_FPUEnable(); + ROM_FPUStackingEnable(); + ROM_SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN); + irmp_init(); // initialize irmp - timer1_init(); // initialize timer 1 + timer1_init(); // initialize timer1 sei (); // enable interrupts for (;;) @@ -83,3 +139,54 @@ main (void) } } } + +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * PIC18F4520 with XC8 compiler: + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ +#elif defined (__XC8) + +#define _XTAL_FREQ 32000000UL // 32MHz clock +#define FOSC _XTAL_FREQ +#define FCY FOSC / 4UL // --> 8MHz + +#define BAUDRATE 19200UL +#define BRG (( FCY 16 BAUDRATE ) -1UL) + +#include +#include + +int +main (void) +{ + IRMP_DATA irmp_data; + + irmp_init(); // initialize irmp + + // infinite loop, interrupts will blink PORTD pins and handle UART communications. + while (1) + { + LATBbits.LATB0 = ~LATBbits.LATB0; + + if (irmp_get_data (&irmp_data)) + { + // ir signal decoded, do something here... + // irmp_data.protocol is the protocol, see irmp.h + // irmp_data.address is the address/manufacturer code of ir sender + // irmp_data.command is the command code + // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h) + printf("proto %d addr %d cmd %d\n", irmp_data.protocol, irmp_data.address, irmp_data.command ); + } + } +} + +void interrupt high_priority high_isr(void) +{ + if (TMR2IF) + { + TMR2IF = 0; // clear Timer 0 interrupt flag + irmp_ISR(); + } +} + +#endif