X-Git-Url: http://cloudbase.mooo.com/gitweb/irmp.git/blobdiff_plain/ac8504f8f769cf786c176198ac386007a9606812..327b855b93f9938b2db9ecf6ca60f9c23410a3fc:/irsnd.c diff --git a/irsnd.c b/irsnd.c index 2ba1e28..00f80e3 100644 --- a/irsnd.c +++ b/irsnd.c @@ -1,9 +1,9 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * @file irsnd.c * - * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de * - * Supported mikrocontrollers: + * Supported AVR mikrocontrollers: * * ATtiny87, ATtiny167 * ATtiny45, ATtiny85 @@ -13,7 +13,7 @@ * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P * - * $Id: irsnd.c,v 1.78 2014/07/10 09:48:23 fm Exp $ + * $Id: irsnd.c,v 1.82 2014/09/15 10:27:38 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -505,14 +505,34 @@ irsnd_off (void) * @details sets pwm frequency *--------------------------------------------------------------------------------------------------------------------------------------------------- */ +#if defined(__12F1840) +extern void pwm_init(uint16_t freq); +#include +#endif + static void irsnd_set_freq (IRSND_FREQ_TYPE freq) { #ifndef ANALYZE -# if defined(PIC_C18) // PIC C18 - OpenPWM(freq); - SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50% - PWMoff(); +# if defined(PIC_C18) // PIC C18 or XC8 +# if defined(__12F1840) // XC8 + TRISA2=0; + PR2=freq; + CCP1M0=1; + CCP1M1=1; + CCP1M2=1; + CCP1M3=1; + DC1B0=1; + DC1B1=0; + CCPR1L = 0b01101001; + TMR2IF = 0; + TMR2ON=1; + CCP1CON &=(~0b0011); // p 197 "active high" +# else // PIC C18 + OpenPWM(freq); + SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50% +# endif + PWMoff(); # elif defined (ARM_STM32) // STM32 static uint32_t TimeBaseFreq = 0; @@ -578,8 +598,10 @@ void irsnd_init (void) { #ifndef ANALYZE -# if defined(PIC_C18) // PIC C18 +# if defined(PIC_C18) // PIC C18 or XC8 compiler +# if ! defined(__12F1840) // only C18: OpenTimer; +# endif irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency IRSND_PIN = 0; // set IO to outout PWMoff(); @@ -593,6 +615,7 @@ irsnd_init (void) RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE); # elif defined (ARM_STM32F10X) RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE); + // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping # elif defined (ARM_STM32F4XX) RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE); # endif @@ -610,7 +633,7 @@ irsnd_init (void) GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(IRSND_PORT, &GPIO_InitStructure); - GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required + // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping # endif /* TIMx clock enable */ @@ -2094,7 +2117,7 @@ irsnd_ISR (void) if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits { pulse_len = SAMSUNG_PULSE_LEN; - pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? + pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1); } else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit) @@ -2107,7 +2130,7 @@ irsnd_ISR (void) uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 ! pulse_len = SAMSUNG_PULSE_LEN; - pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ? + pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ? (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1); } } @@ -2120,7 +2143,7 @@ irsnd_ISR (void) if (current_bit < NEC16_ADDRESS_LEN) // send address bits { pulse_len = NEC_PULSE_LEN; - pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? + pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1); } else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit) @@ -2133,7 +2156,7 @@ irsnd_ISR (void) uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 ! pulse_len = NEC_PULSE_LEN; - pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ? + pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ? (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1); } } @@ -2165,7 +2188,7 @@ irsnd_ISR (void) } else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit { - uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0; + uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0; pulse_len = BANG_OLUFSEN_PULSE_LEN; if (cur_bit_value == last_bit_value) @@ -2181,7 +2204,7 @@ irsnd_ISR (void) } else #endif - if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) + if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) { pulse_len = pulse_1_len; pause_len = pause_1_len; @@ -2348,7 +2371,7 @@ irsnd_ISR (void) { pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN; pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN; - first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE; + first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE; } } else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL || @@ -2408,7 +2431,7 @@ irsnd_ISR (void) } } #endif - first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE; + first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE; } if (irsnd_protocol == IRMP_RC5_PROTOCOL)