From: ukw Date: Mon, 21 Jul 2014 09:05:03 +0000 (+0000) Subject: Version 2.6.2: port to PIC 12F1840 X-Git-Tag: irmp-libopencm3-pre-1~46 X-Git-Url: http://cloudbase.mooo.com/gitweb/irmp.git/commitdiff_plain/7fe8188d6871371baf83a08d1ab42c094525c04b?hp=c6a60200d5a77ef8011dba4523a92c9f09569e1b Version 2.6.2: port to PIC 12F1840 git-svn-id: svn://mikrocontroller.net/irmp@143 aeb2e35e-bfc4-4214-b83c-9e8de998ed28 --- diff --git a/README.txt b/README.txt index 58afd88..24bd1ca 100644 --- a/README.txt +++ b/README.txt @@ -1,8 +1,8 @@ IRMP - Infrared Multi Protocol Decoder -------------------------------------- -Version IRMP: 2.6.0 09.07.2014 -Version IRSND: 2.6.1 10.07.2014 +Version IRMP: 2.6.2 21.07.2014 +Version IRSND: 2.6.2 21.07.2014 Dokumentation: diff --git a/irmp.c b/irmp.c index 851c270..5b25eea 100644 --- a/irmp.c +++ b/irmp.c @@ -1,9 +1,9 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * irmp.c - infrared multi-protocol decoder, supports several remote control protocols * - * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: irmp.c,v 1.159 2014/07/09 15:31:25 fm Exp $ + * $Id: irmp.c,v 1.161 2014/07/21 08:58:58 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -498,7 +498,7 @@ static void (*irmp_callback_ptr) (uint8_t); *--------------------------------------------------------------------------------------------------------------------------------------------------- */ #if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1 -char * +const char * irmp_protocol_names[IRMP_N_PROTOCOLS + 1] = { "UNKNOWN", diff --git a/irmp.h b/irmp.h index faa4201..8b61f25 100644 --- a/irmp.h +++ b/irmp.h @@ -1,9 +1,9 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * irmp.h * - * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: irmp.h,v 1.86 2014/07/09 15:26:02 fm Exp $ + * $Id: irmp.h,v 1.88 2014/07/21 08:58:58 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -178,7 +178,7 @@ extern uint8_t irmp_is_busy (void); extern uint8_t irmp_ISR (void); #if IRMP_PROTOCOL_NAMES == 1 -extern char * irmp_protocol_names[IRMP_N_PROTOCOLS + 1]; +extern const char * irmp_protocol_names[IRMP_N_PROTOCOLS + 1]; #endif #if IRMP_USE_CALLBACK == 1 diff --git a/irmpconfig.h b/irmpconfig.h index 5c78bd4..218e939 100644 --- a/irmpconfig.h +++ b/irmpconfig.h @@ -3,11 +3,10 @@ * * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRMP.H! * - * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de + * Extensions for PIC 12F1820 W.Strobl 2014-07-20 * - * $Id: irmpconfig.h,v 1.116 2014/07/10 09:49:24 fm Exp $ - * - * ATMEGA88 @ 8 MHz + * $Id: irmpconfig.h,v 1.117 2014/07/21 08:56:39 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -106,7 +105,10 @@ *--------------------------------------------------------------------------------------------------------------------------------------------------- */ #elif defined (PIC_C18) // use RB4 as IR input on PIC (C18 or XC8 compiler) -# define IRMP_PIN PORTBbits.RB4 +#if defined(__12F1840) +# define IRMP_PIN RA5 // on 12F1840 with XC8 compiler +#endif +# define IRMP_PIN PORTBbits.RB4 // PIC C18 /*--------------------------------------------------------------------------------------------------------------------------------------------------- * Change hardware pin here for PIC CCS compiler diff --git a/irmpprotocols.h b/irmpprotocols.h index 0f66c9c..05c009d 100644 --- a/irmpprotocols.h +++ b/irmpprotocols.h @@ -3,9 +3,9 @@ * * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRMP.H or IRSND.H! * - * Copyright (c) 2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2013-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: irmpprotocols.h,v 1.25 2014/07/09 14:45:56 fm Exp $ + * $Id: irmpprotocols.h,v 1.26 2014/07/21 08:58:58 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/irmpsystem.h b/irmpsystem.h index fdd2fa3..575bfda 100644 --- a/irmpsystem.h +++ b/irmpsystem.h @@ -1,9 +1,9 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * irmpsystem.h - system specific includes and defines * - * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: irmpsystem.h,v 1.12 2014/07/01 20:08:20 fm Exp $ + * $Id: irmpsystem.h,v 1.13 2014/07/21 08:58:58 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/irsnd.c b/irsnd.c index c5f7004..447971e 100644 --- a/irsnd.c +++ b/irsnd.c @@ -1,7 +1,7 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * @file irsnd.c * - * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de * * Supported mikrocontrollers: * @@ -13,7 +13,7 @@ * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P * - * $Id: irsnd.c,v 1.79 2014/07/10 10:38:07 fm Exp $ + * $Id: irsnd.c,v 1.81 2014/07/21 08:58:58 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -505,14 +505,34 @@ irsnd_off (void) * @details sets pwm frequency *--------------------------------------------------------------------------------------------------------------------------------------------------- */ +#if defined(__12F1840) +extern void pwm_init(uint16_t freq); +#include +#endif + static void irsnd_set_freq (IRSND_FREQ_TYPE freq) { #ifndef ANALYZE -# if defined(PIC_C18) // PIC C18 - OpenPWM(freq); - SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50% - PWMoff(); +# if defined(PIC_C18) // PIC C18 or XC8 +# if defined(__12F1840) // XC8 + TRISA2=0; + PR2=freq; + CCP1M0=1; + CCP1M1=1; + CCP1M2=1; + CCP1M3=1; + DC1B0=1; + DC1B1=0; + CCPR1L = 0b01101001; + TMR2IF = 0; + TMR2ON=1; + CCP1CON &=(~0b0011); // p 197 "active high" +# else // PIC C18 + OpenPWM(freq); + SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50% +# endif + PWMoff(); # elif defined (ARM_STM32) // STM32 static uint32_t TimeBaseFreq = 0; @@ -578,8 +598,10 @@ void irsnd_init (void) { #ifndef ANALYZE -# if defined(PIC_C18) // PIC C18 +# if defined(PIC_C18) // PIC C18 or XC8 compiler +# if ! defined(__12F1840) // only C18: OpenTimer; +# endif irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency IRSND_PIN = 0; // set IO to outout PWMoff(); @@ -2095,7 +2117,7 @@ irsnd_ISR (void) if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits { pulse_len = SAMSUNG_PULSE_LEN; - pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? + pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1); } else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit) @@ -2108,7 +2130,7 @@ irsnd_ISR (void) uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 ! pulse_len = SAMSUNG_PULSE_LEN; - pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ? + pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ? (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1); } } @@ -2121,7 +2143,7 @@ irsnd_ISR (void) if (current_bit < NEC16_ADDRESS_LEN) // send address bits { pulse_len = NEC_PULSE_LEN; - pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? + pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1); } else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit) @@ -2134,7 +2156,7 @@ irsnd_ISR (void) uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 ! pulse_len = NEC_PULSE_LEN; - pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ? + pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ? (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1); } } @@ -2166,7 +2188,7 @@ irsnd_ISR (void) } else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit { - uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0; + uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0; pulse_len = BANG_OLUFSEN_PULSE_LEN; if (cur_bit_value == last_bit_value) @@ -2182,7 +2204,7 @@ irsnd_ISR (void) } else #endif - if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) + if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) { pulse_len = pulse_1_len; pause_len = pause_1_len; @@ -2349,7 +2371,7 @@ irsnd_ISR (void) { pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN; pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN; - first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE; + first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE; } } else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL || @@ -2409,7 +2431,7 @@ irsnd_ISR (void) } } #endif - first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE; + first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE; } if (irsnd_protocol == IRMP_RC5_PROTOCOL) diff --git a/irsnd.h b/irsnd.h index 28f90df..e9e1736 100644 --- a/irsnd.h +++ b/irsnd.h @@ -1,9 +1,9 @@ -/*--------------------------------------------------------------------------------------------------------------------------------------------------- + /*--------------------------------------------------------------------------------------------------------------------------------------------------- * irsnd.h * - * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: irsnd.h,v 1.17 2014/02/19 12:57:36 fm Exp $ + * $Id: irsnd.h,v 1.19 2014/07/21 08:58:58 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -50,35 +50,46 @@ # endif #elif defined(PIC_C18) -// Do not change lines below until you have a different HW. Example is for 18F2550/18F4550 -// setup macro for PWM used PWM module -# if IRSND_OCx == IRSND_PIC_CCP2 -# define PWMon() TMR2=0,CCP2CON |=0b1100 -# define PWMoff() CCP2CON &=(~0b1100) -# define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2 -# define SetDCPWM(x) SetDCPWM2(x) -# define ClosePWM ClosePWM2 -# define OpenPWM(x) OpenPWM2(x) -# endif -# if IRSND_OCx == IRSND_PIC_CCP1 -# define PWMon() TMR2=0,CCP1CON |=0b1100 -# define PWMoff() CCP1CON &=(~0b1100) -# define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1 -# define SetDCPWM(x) SetDCPWM1(x) -# define ClosePWM ClosePWM1 -# define OpenPWM(x) OpenPWM1(x) -# endif -//Setup macro for OpenTimer with defined Pre_Scaler -# if Pre_Scaler == 1 -# define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_1); -# elif Pre_Scaler == 4 -# define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_4); -# elif Pre_Scaler == 16 -# define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_16); -# else -# error Incorrect value for Pre_Scaler -# endif -#endif // ARM_STM32 + +# if defined(__12F1840) + // Do not change lines below unless you have a different HW. This example is for 12F1840 + // setup macro for PWM used PWM module + + //~ # define PWMon() TMR2=0,IRSND_PIN=1 + //~ # define PWMoff() CCP1CON &=(~0b1100) + //~ # define PWMon() TMR2ON=1 + //~ # define PWMoff() TMR2ON=0 + #if defined(IRSND_DEBUG) + #define PWMon() LATA0=1 + #define PWMoff() LATA0=0 + #define IRSND_PIN LATA0 + #else + # define PWMon() TMR2=0,CCP1CON |=0b1100 + # define PWMoff() CCP1CON &=(~0b1100) + # define IRSND_PIN RA2 + #endif + +#else + // Do not change lines below until you have a different HW. Example is for 18F2550/18F4550 + // setup macro for PWM used PWM module + # if IRSND_OCx == IRSND_PIC_CCP2 + # define PWMon() TMR2=0,CCP2CON |=0b1100 + # define PWMoff() CCP2CON &=(~0b1100) + # define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2 + # define SetDCPWM(x) SetDCPWM2(x) + # define ClosePWM ClosePWM2 + # define OpenPWM(x) OpenPWM2(x) + # endif + # if IRSND_OCx == IRSND_PIC_CCP1 + # define PWMon() TMR2=0,CCP1CON |=0b1100 + # define PWMoff() CCP1CON &=(~0b1100) + # define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1 + # define SetDCPWM(x) SetDCPWM1(x) + # define ClosePWM ClosePWM1 + # define OpenPWM(x) OpenPWM1(x) + # endif +# endif +# endif // PIC_C18 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000 # warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000) diff --git a/irsndconfig.h b/irsndconfig.h index 402f125..97d1d35 100644 --- a/irsndconfig.h +++ b/irsndconfig.h @@ -3,9 +3,9 @@ * * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRSND.H! * - * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: irsndconfig.h,v 1.61 2014/07/10 10:38:07 fm Exp $ + * $Id: irsndconfig.h,v 1.62 2014/07/21 08:56:39 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -23,6 +23,8 @@ # error please include only irsnd.h, not irsndconfig.h #endif +//~ #define IRSND_DEBUG 1 // activate debugging + /*--------------------------------------------------------------------------------------------------------------------------------------------------- * F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000 *--------------------------------------------------------------------------------------------------------------------------------------------------- @@ -96,19 +98,25 @@ # define IRSND_OCx IRSND_OC2B // use OC2B /*--------------------------------------------------------------------------------------------------------------------------------------------------- - * PIC C18 section: + * PIC C18 or XC8 section: * * Change hardware pin here: IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ... * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ... *--------------------------------------------------------------------------------------------------------------------------------------------------- */ -#elif defined(PIC_C18) +#elif defined(PIC_C18) // C18 or XC8 compiler +# if defined(__12F1840) // XC8 compiler +# define Pre_Scaler 1 // define prescaler for timer2 e.g. 1,4,16 +# define F_CPU 32000000UL // PIC frequency: set your freq here +# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value + +# else // C18 compiler # define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC // change other PIC C18 specific settings: # define F_CPU 48000000UL // PIC frequency: set your freq here # define Pre_Scaler 4 // define prescaler for timer2 e.g. 1,4,16 # define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value -# warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself ! +# endif /*--------------------------------------------------------------------------------------------------------------------------------------------------- * ARM STM32 section: diff --git a/irsndmain.c b/irsndmain.c index ae918ec..ee6f660 100644 --- a/irsndmain.c +++ b/irsndmain.c @@ -1,7 +1,7 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * irsndmain.c - demo main module to test IRSND encoder on AVRs * - * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de * * ATMEGA88 @ 8 MHz internal RC Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9 * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9 diff --git a/main.c b/main.c index 25600d6..9c1cc24 100644 --- a/main.c +++ b/main.c @@ -1,9 +1,9 @@ /*--------------------------------------------------------------------------------------------------------------------------------------------------- * main.c - demo main module to test irmp decoder * - * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de + * Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de * - * $Id: main.c,v 1.18 2014/07/01 07:50:33 fm Exp $ + * $Id: main.c,v 1.19 2014/07/21 08:58:59 fm Exp $ * * This demo module is runnable on AVRs and LM4F120 Launchpad (ARM Cortex M4) * diff --git a/pic/main_pic.c b/pic/main_pic.c new file mode 100644 index 0000000..6b5eab5 --- /dev/null +++ b/pic/main_pic.c @@ -0,0 +1,203 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * main_pic.c - example main module + * + * IR decoder using IRMP + * + * (c) 2014 Wolfgang Strobl (ws at mystrobl.de) 2014-03-12:2014-07-05 + * + * This demo module is runnable on a Microchip PIC 12F1840 + * + * To be used with IRMP by Frank Meyer (frank(at)fli4l.de) + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + + +/* + PIC12F1840 + ___ __ + 10k -|___|-+ Vdd -o| o|o- Vss + ___ +-RS232in / GP5 -o| |o- GP0 / ICSPDAT + 1k -|___|-- RS232out/ GP4 -o| |o- GP1 / ICSPCLK + Vpp / GP3 -o|__|o- GP2 / TS TSOP1736 + +Example output, using a bunch of different remote controls + +IRMP PIC 12F1840 1.1 ws +P 7 a=0x0011 c=0x000c f=0x00 (RC5) +P 6 a=0x0001 c=0x0018 f=0x00 (RECS80) +P 2 a=0xbf00 c=0x0019 f=0x00 (NEC) +P 2 a=0xeb14 c=0x0001 f=0x00 (NEC) +P 7 a=0x001c c=0x0005 f=0x00 (RC5) +P 7 a=0x000a c=0x0057 f=0x00 (RC5) +P 7 a=0x000a c=0x0057 f=0x01 (RC5) +P 2 a=0xfb04 c=0x0008 f=0x00 (NEC) + +*/ + +#include + +#include "irmp.h" + +/******************************************************************************/ +// "system.h" +/******************************************************************************/ +#define SYS_FREQ 32000000L +#define _XTAL_FREQ 32000000 // for _delay +#define FCY (SYS_FREQ/4) + +/******************************************************************************/ +// "user.c" +/******************************************************************************/ +void InitApp(void) +{ + ANSELA=0; + TRISA4=0; + IRCF0=0; // p. 45 + IRCF1=1; + IRCF2=1; + IRCF3=1; + SPLLEN=1; // p 46 and 54 +} + +/******************************************************************************/ +// "configuration_bits.c" 12F1848 +/******************************************************************************/ +// CONFIG1 +#pragma config FOSC = INTOSC // Oscillator Selection (INTOSC oscillator: I/O function on CLKIN pin) +#pragma config WDTE = OFF // Watchdog Timer Enable (WDT disabled) +#pragma config PWRTE = ON // Power-up Timer Enable (PWRT enabled) +#pragma config MCLRE = OFF // MCLR Pin Function Select (MCLR/VPP pin function is digital input) +#pragma config CP = OFF // Flash Program Memory Code Protection (Program memory code protection is disabled) +#pragma config CPD = OFF // Data Memory Code Protection (Data memory code protection is disabled) +#pragma config BOREN = ON // Brown-out Reset Enable (Brown-out Reset enabled) +#pragma config CLKOUTEN = OFF // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin) +#pragma config IESO = OFF // Internal/External Switchover (Internal/External Switchover mode is disabled) +#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled) + +// CONFIG2 +#pragma config WRT = OFF // Flash Memory Self-Write Protection (Write protection off) +#pragma config PLLEN = OFF // PLL Enable (4x PLL disabled) +#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset) +#pragma config BORV = LO // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.) +#pragma config LVP = OFF // Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming) +/******************************************************************************/ + +/******************************************************************************/ +// UART +/******************************************************************************/ + +// This demo module uses RS232 TX via EUSART, only + +#define useEUSART 1 +#define BAUD 19200 + + +void +RS232init(void) + { + // Transmit + TXCKSEL = 1; // put TX on pin 4 - not 0 -, p 102 + SPBRGL = (_XTAL_FREQ/BAUD/64-1); + SPBRGH = 0; + BRGH = 0; + BRG16 = 0; + // p 259 manual + SYNC = 0; // 0 p. 267 + SPEN = 1; // 26.1.1.7 + SCKP = 1; // invert p 269 + TXEN = 1; + } + + // EUSART transmit + void + putch(char c) + { + while (!TRMT) _delay(1); + TXREG=c; + } + +/******************************************************************************/ +// Timer and ISR +/******************************************************************************/ + +void +timer1_init(void) +{ + // p 154 + TMR1=0xFC00; // p. 155 wait 1024 cycles for stabilization. + TMR1CS1=0; // Clock source == System Clock + TMR1CS0=1; + TMR1IE=1; // enable TMR1 interrupts + PEIE=1; // enable Pheripheral Interrupts + +} + + +/******************************************************************************/ +// Interrupt handler +/******************************************************************************/ + +void interrupt isr(void) +{ + irmp_ISR(); + TMR1=0xffff-_XTAL_FREQ/F_INTERRUPTS; + TMR1IF=0; // clear timer 1 interrupt +} + +/******************************************************************************/ +// MAIN +/******************************************************************************/ + +int +main (void) +{ + IRMP_DATA irmp_data; + InitApp(); // später inlinen + +#if useEUSART + RS232init(); +#endif + __delay_ms(200); + printf("IRMP PIC 12F1840 1.1 ws\r\n"); + irmp_init(); // initialize irmp + timer1_init(); // initialize timer1 + ei(); // enable interrupts + TMR1ON=1; // start timer + + for (;;) + { + if (irmp_get_data (&irmp_data)) + { + printf("P "); + printf("%d a=0x%04x c=0x%04x f=0x%02x (",irmp_data.protocol, irmp_data.address,irmp_data.command,irmp_data.flags); + + +#if IRMP_PROTOCOL_NAMES + printf(irmp_protocol_names[irmp_data.protocol]); +#else + switch(irmp_data.protocol) + { + case 1: + printf("Sony"); + break; + case 2: + printf("NEC"); + break; + case 7: + printf("RC5"); + break; + case 0x21: + printf("Ortek"); + break; + } +#endif + printf(")\r\n"); + } + } +} diff --git a/pic/main_pic12f1840.c b/pic/main_pic12f1840.c new file mode 100644 index 0000000..235105e --- /dev/null +++ b/pic/main_pic12f1840.c @@ -0,0 +1,324 @@ +/*--------------------------------------------------------------------------------------------------------------------------------------------------- + * main_pic12f1840.c - example main module for PIC 12f1840 + * + * IR decoder using IRMP + * + * (c) 2014 Wolfgang Strobl (news4 at mystrobl.de) 2014-03-12:2014-07-20 + * + * This demo module is runnable on a Microchip PIC 12F1840 + * + * To be used with IRMP by Frank Meyer (frank(at)fli4l.de) + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + *--------------------------------------------------------------------------------------------------------------------------------------------------- + */ + + +/* + +Hauptprogramm fuer den nachfolgenden Testaufbau, bestehend aus zwei mal + + + TSOP1736+ PIC12F1840 + | __ + 1k | Vdd--o| o|o--Vss + ___ +--GP5--o| |o--GP0 / ICSPDAT +RS232 out -|___|-------GP4--o| |o--GP1 / ICSPCLK ___ LED +RS232 in -|___|---Vpp/GP3--o|__|o--GP2-----------|___|- ->|---Vss + 10k + +auf einem Steckbrett. (Genauer gesagt, dies ist die aktuelle Beschaltung +fuer V1.8, V1.0 ist aber bzgl. IRMP-Empfang funktional identisch. Nicht eingezeichnet +ist ein Abblockkondensator von 100nF ueber Vss und Vdd. + +Uebersetzt mit Microchip MPLAB XC8 C Compiler (Free Mode) V1.31 +im stark gecrippelten "Free Mode". + +Memory Summary: (V 1.8) + Program space used C6Fh ( 3183) of 1000h words ( 77.7%) + Data space used 9Bh ( 155) of 100h bytes ( 60.5%) + EEPROM space used 0h ( 0) of 100h bytes ( 0.0%) + Data stack space used 0h ( 0) of 5Eh bytes ( 0.0%) + Configuration bits used 2h ( 2) of 2h words (100.0%) + ID Location space used 0h ( 0) of 4h bytes ( 0.0%) + + +Testaufbau: + +Zwei Steckbretter, +urspruengliche Version des Programms als Empfaenger, +aktuelle Version als Sender, Aufzeichnung mit putty, +angeschlossen jeweils per USB2RS232-Kabel von Conrad +(972543, basierend auf Prolific PL2303). Soft-UART +fuer Input, da 12F1820 keine Kontrolle ueber Input- +Polaritaet erlaubt und ich fuer Testaufbauten eine +Minimalbeschaltung bevorzuge. + +Kurze Distanz +(~30 cm) zwischen Sender und Empfaenger), keine genaue Ausrichtung. +Stromversorgung wahlwweise mit 5V via PICkit 2 oder 3x1.2V NiMH-AA. + +Zunaechst +CD TAPE TUNER AUX OFF mit Philips FB, +OFF mit VAOVA TV-2900HDD FB +dann Eingabe . und n beim Sender. + +Sender: + +IRMP PIC 12F1840 1.8 ws +P 7 a=0x0014 c=0x003f f=0x00 (RC5) +P 7 a=0x0014 c=0x003f f=0x01 (RC5) +P 7 a=0x0012 c=0x003f f=0x00 (RC5) +P 7 a=0x0011 c=0x003f f=0x00 (RC5) +P 7 a=0x0015 c=0x003f f=0x00 (RC5) +P 7 a=0x0015 c=0x000c f=0x00 (RC5) +P 2 a=0xbf00 c=0x0059 f=0x00 (NEC) +P 2 a=0xbf00 c=0x0059 f=0x01 (NEC) +. MX115OFF PR2 221 +n NEC PR2 209 + +Empfaenger: + +IRMP PIC 12F1840 1.0 ws +P 7 a=0x0014 c=0x003f f=0x00 (RC5) +P 7 a=0x0014 c=0x003f f=0x01 (RC5) +P 7 a=0x0012 c=0x003f f=0x00 (RC5) +P 7 a=0x0011 c=0x003f f=0x00 (RC5) +P 7 a=0x0015 c=0x000c f=0x00 (RC5) +P 2 a=0xbf00 c=0x0059 f=0x00 (NEC) +P 2 a=0xbf00 c=0x0059 f=0x01 (NEC) +P 7 a=0x0015 c=0x000c f=0x00 (RC5) +P 7 a=0x0015 c=0x000c f=0x01 (RC5) +P 7 a=0x0015 c=0x000c f=0x01 (RC5) +P 2 a=0x0055 c=0x00aa f=0x00 (NEC) + +Die via DSO an der LED gemessenen Frequenzen sind 36.0 resp. 38.0 kHz + +*/ + +#include + +#include "irmp.h" +#include "irsnd.h" + +/******************************************************************************/ +// "system.h" +/******************************************************************************/ +#define SYS_FREQ 32000000L +#define _XTAL_FREQ 32000000 // for _delay +#define FCY (SYS_FREQ/4) + +/******************************************************************************/ +// "user.c" +/******************************************************************************/ +void InitApp(void) +{ + ANSELA=0; + TRISA4=0; + IRCF0=0; // p. 45 + IRCF1=1; + IRCF2=1; + IRCF3=1; + SPLLEN=1; // p 46 and 54 +} + +/******************************************************************************/ +// "configuration_bits.c" 12F1848 +/******************************************************************************/ +// CONFIG1 +#pragma config FOSC = INTOSC // Oscillator Selection (INTOSC oscillator: I/O function on CLKIN pin) +#pragma config WDTE = OFF // Watchdog Timer Enable (WDT disabled) +#pragma config PWRTE = ON // Power-up Timer Enable (PWRT enabled) +#pragma config MCLRE = OFF // MCLR Pin Function Select (MCLR/VPP pin function is digital input) +#pragma config CP = OFF // Flash Program Memory Code Protection (Program memory code protection is disabled) +#pragma config CPD = OFF // Data Memory Code Protection (Data memory code protection is disabled) +#pragma config BOREN = ON // Brown-out Reset Enable (Brown-out Reset enabled) +#pragma config CLKOUTEN = OFF // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin) +#pragma config IESO = OFF // Internal/External Switchover (Internal/External Switchover mode is disabled) +#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled) + +// CONFIG2 +#pragma config WRT = OFF // Flash Memory Self-Write Protection (Write protection off) +#pragma config PLLEN = OFF // PLL Enable (4x PLL disabled) +#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset) +#pragma config BORV = LO // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.) +#pragma config LVP = OFF // Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming) +/******************************************************************************/ + +/******************************************************************************/ +// UART +/******************************************************************************/ + +#define GPIO3 RA3 +#define GPIO4 RA4 + +#define SOFTUART_RXPIN GPIO3 +#define SOFTUART_STDIO 1 +#define SOFTUART_DI 1 + + +#define BAUD 19200 // 38200 ginge auch noch +#define SOFTUART_BAUD BAUD +#include "softuart_pic.h" + +#define kbhit softuartkbhit + + +void +RS232init(void) + { + // Transmit + TXCKSEL = 1; // put TX on pin 4 - not 0 -, p 102 + SPBRGL = (_XTAL_FREQ/BAUD/64-1); + SPBRGH = 0; + BRGH = 0; + BRG16 = 0; + // p 259 manual + SYNC = 0; // 0 p. 267 + SPEN = 1; // 26.1.1.7 + SCKP = 1; // invert p 269 + TXEN = 1; + } + + // EUSART transmit + void + putch(char c) + { + while (!TRMT) _delay(1); + TXREG=c; + } + +/******************************************************************************/ +// Timer and ISR +/******************************************************************************/ + +void +timer1_init(void) +{ + // p 154 + TMR1=0xFC00; // p. 155 wait 1024 cycles for stabilization. + TMR1CS1=0; // Clock source == System Clock + TMR1CS0=1; + TMR1IE=1; // enable TMR1 interrupts + PEIE=1; // enable Pheripheral Interrupts + TMR1IF=0; + TMR1ON=1; +} + + +/******************************************************************************/ +// Interrupt handler +/******************************************************************************/ + +void interrupt isr(void) +{ + TMR1=0xffff-_XTAL_FREQ/F_INTERRUPTS; + TMR1IF=0; // clear timer 1 interrupt + + if (!irsnd_ISR()) + { + irmp_ISR(); + } +} + + +IRMP_DATA irmp_data; + +void RC5(uint16_t addr,uint16_t cmd, uint8_t repetitions) +{ + irmp_data.protocol = IRMP_RC5_PROTOCOL; + irmp_data.address = addr; + irmp_data.command = cmd; + irmp_data.flags = repetitions; + irsnd_send_data (&irmp_data, FALSE); +} + +void NEC(int addr,int cmd) +{ + irmp_data.protocol = IRMP_NEC_PROTOCOL; + irmp_data.address = addr; + irmp_data.command = cmd; + irmp_data.flags = 0; + irsnd_send_data (&irmp_data, FALSE); +} + + +/******************************************************************************/ +// MAIN +/******************************************************************************/ + +int +main (void) +{ + IRMP_DATA irmp_data; + char c; + InitApp(); + + PWMoff(); + RS232init(); + + __delay_ms(200); + printf("IRMP PIC 12F1840 1.8 ws\r\n"); + irmp_init(); // initialize irmp + timer1_init(); // initialize timer1 + ei(); // enable interrupts + TMR1ON=1; // start timer + + for (;;) + { + if (kbhit()) + { + c=getch(); + if (c>32 && c<127) putch(c); + putch(' '); + if (c=='.') + { + printf("MX115OFF "); + RC5(0x15,0x0c,2); // Philips MC115 AUX OFF + } + else if (c=='n') + { + printf("NEC "); + NEC(0x55,0xaa); + } + else + { + putch('?'); + continue; + } + while (irsnd_is_busy ()) ; + printf("PR2 %d\r\n",PR2); + continue; + } + if (irmp_get_data (&irmp_data)) + { + printf("P "); + printf("%d a=0x%04x c=0x%04x f=0x%02x (",irmp_data.protocol, irmp_data.address,irmp_data.command,irmp_data.flags); + +#if IRMP_PROTOCOL_NAMES + printf(irmp_protocol_names[irmp_data.protocol]); +#else + switch(irmp_data.protocol) + { + case 1: + printf("Sony"); + break; + case 2: + printf("NEC"); + break; + case 7: + printf("RC5"); + break; + case 0x21: + printf("Ortek"); + break; + } +#endif + printf(")\r\n"); + } + } +} diff --git a/pic/softuart_pic.h b/pic/softuart_pic.h new file mode 100644 index 0000000..3d40bc8 --- /dev/null +++ b/pic/softuart_pic.h @@ -0,0 +1,151 @@ +/* + W. Strobl, Bonn, March 2014 + +Simple minded software bit banging async RS232 implementation for Microchip XC8 + +http://en.wikipedia.org/wiki/Bit_banging + +Tested with 2400, 9600 and 19200 baud on a 4 MHz 16F675 so far +Tested with 9600 baud on a 32 MHz 12F1840. +19200 softuard doesn't work. + + PIC12F1840 + + ___ __ + 10k -|___|-+ Vdd -o| o|o- Vss + ___ +-RS232in / GP5 -o| |o- GP0 / ICSPDAT + 1k -|___|-- RS232out/ GP4 -o| |o- GP1 / ICSPCLK + Vpp / GP3 -o|__|o- GP2 / + +Necessary definitions (examples) + +#define FCY 1000000 // cycles per second (4 MHz PIC) +#define SOFTUART_RXPIN GPIO5 // if input is desired +#define SOFTUART_TXPIN GPIO4 // if output is desired + +Optional definitions + +#define SOFTUART_BAUD 19200 // default: 9600 +#define SOFTUART_STDIO 1 // if definition for getch, putch is desired + // default: 0 +#define SOFTUART_DI 1 // if interrupts are to be disabled during IO + // default: 0 +#define SOFTUART_MARK 0 // 0: not inverted (default: 1) + + +Typical: + + +#define SOFTUART_RXPIN GPIO5 +#define SOFTUART_TXPIN GPIO4 +#define SOFTUART_STDIO 1 +#define SOFTUART_DI 1 +#include "softuart.h" + +#define kbhit softuartkbhit + +*/ + +/******************************************************************************/ +// Software UART +/******************************************************************************/ +// FCY == instructions per second, see system.h for xc8 +#ifndef SOFTUART_BAUD // default baudrate +#define SOFTUART_BAUD 9600 +#endif +#define SOFTUART_BITLEN (FCY/SOFTUART_BAUD) +#define SOFTUART_DELAY (SOFTUART_BITLEN/5) + +#ifndef SOFTUART_MARK +#define SOFTUART_MARK 1 // 0: not inverted (default: 1) +#endif + + +// Input Pin defined? +#ifdef SOFTUART_RXPIN +/******************************************************************************/ +// Input +/******************************************************************************/ + +char softuartgetch(void) +{ + char rcvd,i; +#if SOFTUART_DI + di(); +#endif + rcvd=0; + _delay(SOFTUART_BITLEN/2-10); // wait half a startbit + if (SOFTUART_RXPIN != SOFTUART_MARK) + { +#if SOFTUART_DI + ei(); +#endif + return 0; // glitch + } + _delay(SOFTUART_BITLEN/2-10); // wait half a startbit + for (i=0;i<8;i++) + { + rcvd >>= 1; // shift previous bits, LSB comes first + _delay(SOFTUART_BITLEN/2-12); // ADJUST + rcvd |= ((SOFTUART_RXPIN != SOFTUART_MARK)?0x80:0); + _delay(SOFTUART_BITLEN/2-10); // ADJUST + } +#ifdef SOFTUART_DI + ei(); +#endif + _delay(SOFTUART_BITLEN); // stopbit + return rcvd; +} + +#define softuartkbhit() (SOFTUART_RXPIN == SOFTUART_MARK) + +#endif + +// Output Pin defined? +#ifdef SOFTUART_TXPIN +/******************************************************************************/ +// Output +//******************************************************************************/ + +#if defined(SOFTUART_TXPIN) || defined(SOFTUART_STDIO) +#define softuartputch putch +#endif + +void softuartputch(char c) +{ + char i; +#ifdef SOFTUART_DI + di(); +#endif + SOFTUART_TXPIN = SOFTUART_MARK; // startbit + _delay(SOFTUART_BITLEN-20); // Adjust Schleifeninit braucht + for (i=0;i<8;i++) + { + SOFTUART_TXPIN = c; // checken, ob da das untere Bit verwendet wird sonst +#if SOFTUART_MARK + SOFTUART_TXPIN = ~(c&1); +#else + SOFTUART_TXPIN = c&1; +#endif + c >>=1; + _delay(SOFTUART_BITLEN-20); // Adjust + } + SOFTUART_TXPIN = ~SOFTUART_MARK; + _delay(SOFTUART_BITLEN*2); // two stop bits +#ifdef SOFTUART_DI + ei(); +#endif +} +#endif + +/******************************************************************************/ +// Utility +/******************************************************************************/ +#if defined(SOFTUART_RXPIN) || defined(SOFTUART_STDIO) +// getch with wait +char getch(void) +{ + while (!softuartkbhit()) _delay(1); + return softuartgetch(); +} +#endif