From 02dbaeffae89ad466196bf621ea1d05f397a1417 Mon Sep 17 00:00:00 2001 From: ukw Date: Thu, 10 Jun 2010 23:20:36 +0000 Subject: [PATCH] Version 1.6.2: added FDC2 protocol git-svn-id: svn://mikrocontroller.net/irmp@25 aeb2e35e-bfc4-4214-b83c-9e8de998ed28 --- irmp.c | 21 +++++++++++++++------ irmpconfig.h | 5 +++++ 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/irmp.c b/irmp.c index 90bc280..1dc8fd7 100644 --- a/irmp.c +++ b/irmp.c @@ -3,7 +3,7 @@ * * Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de * - * $Id: irmp.c,v 1.41 2010/06/10 21:24:50 fm Exp $ + * $Id: irmp.c,v 1.42 2010/06/10 23:16:03 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -329,6 +329,15 @@ typedef unsigned int16 uint16_t; #define MIN_TOLERANCE_00 1.0 // -0% #define MAX_TOLERANCE_00 1.0 // +0% +#define MIN_TOLERANCE_02 0.98 // -2% +#define MAX_TOLERANCE_02 1.02 // +2% + +#define MIN_TOLERANCE_03 0.97 // -3% +#define MAX_TOLERANCE_03 1.03 // +3% + +#define MIN_TOLERANCE_04 0.96 // -4% +#define MAX_TOLERANCE_04 1.04 // +4% + #define MIN_TOLERANCE_05 0.95 // -5% #define MAX_TOLERANCE_05 1.05 // +5% @@ -421,10 +430,10 @@ typedef unsigned int16 uint16_t; #define RECS80_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) #define RECS80_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) -#define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_00 + 0.5) - 1) -#define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_00 + 0.5) + 1) -#define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_00 + 0.5) - 1) -#define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_00 + 0.5) + 1) +#define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1) +#define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1) +#define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1) +#define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1) #define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) #define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) @@ -1304,7 +1313,7 @@ irmp_ISR (void) #if IRMP_SUPPORT_RC5_PROTOCOL == 1 static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit #endif -#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 +#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 static uint8_t last_pause; // last pause value #endif #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \ diff --git a/irmpconfig.h b/irmpconfig.h index 7fadb90..1e503ad 100644 --- a/irmpconfig.h +++ b/irmpconfig.h @@ -61,6 +61,11 @@ #define IRMP_SUPPORT_FDC2_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low! #endif + +#if IRMP_SUPPORT_FDC2_PROTOCOL == 1 && IRMP_SUPPORT_RC5_PROTOCOL == 1 +#error Protocols RC5 and FDC2 may not be enabled both at the same time. Please disable one of them in irmpconfig.h. +#endif + /*--------------------------------------------------------------------------------------------------------------------------------------------------- * Change hardware pin here: *--------------------------------------------------------------------------------------------------------------------------------------------------- -- 2.39.2