From cea9614894a5e560540dadc2e480fb64ec0451e1 Mon Sep 17 00:00:00 2001 From: ukw Date: Tue, 21 Feb 2012 08:43:09 +0000 Subject: [PATCH] Version 2.1.1: added GRUNDIG2 protocol git-svn-id: svn://mikrocontroller.net/irmp@89 aeb2e35e-bfc4-4214-b83c-9e8de998ed28 --- irmp.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++---- irmp.h | 21 ++++++++++++-- irmpconfig.h | 3 +- irsnd.c | 2 +- irsnd.h | 6 ++-- irsndconfig.h | 18 ++++++------ 6 files changed, 106 insertions(+), 22 deletions(-) diff --git a/irmp.c b/irmp.c index 1496c6b..ea36ed0 100644 --- a/irmp.c +++ b/irmp.c @@ -3,7 +3,7 @@ * * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de * - * $Id: irmp.c,v 1.113 2012/02/16 10:40:07 fm Exp $ + * $Id: irmp.c,v 1.115 2012/02/21 08:41:46 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -375,6 +375,7 @@ typedef unsigned int16 uint16_t; IRMP_SUPPORT_RC6_PROTOCOL == 1 || \ IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \ IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \ + IRMP_SUPPORT_GRUNDIG2_PROTOCOL == 1 || \ IRMP_SUPPORT_IR60_PROTOCOL #define IRMP_SUPPORT_MANCHESTER 1 #else @@ -601,6 +602,15 @@ typedef unsigned int16 uint16_t; #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) +#define GRUNDIG2_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG2_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) +#define GRUNDIG2_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG2_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) +#define GRUNDIG2_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG2_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) +#define GRUNDIG2_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG2_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) +#define GRUNDIG2_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG2_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) +#define GRUNDIG2_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG2_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) +#define GRUNDIG2_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG2_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) +#define GRUNDIG2_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG2_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1) + #define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX #define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5)) #define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) @@ -782,7 +792,7 @@ irmp_protocol_names[IRMP_N_PROTOCOLS + 1] = #define UART0_TXEN_BIT_VALUE (1<>= 1; + rtc = TRUE; + } + break; +#endif #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1 case IRMP_KATHREIN_PROTOCOL: if (irmp_command != 0x0000) @@ -1818,7 +1862,7 @@ irmp_store_bit (uint8_t value) { irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - 8)); // store 4 system bits (genre 1) in upper nibble with LSB first } - else if (irmp_bit >= 24 && irmp_bit < 28) + else if (irmp_bit >= 24 && irmp_bit < 28) { genre2 |= (((uint8_t) (value)) << (irmp_bit - 20)); // store 4 system bits (genre 2) in upper nibble with LSB first } @@ -2337,6 +2381,22 @@ irmp_ISR (void) else #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 +#if IRMP_SUPPORT_GRUNDIG2_PROTOCOL == 1 + if ((irmp_pulse_time >= GRUNDIG2_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= GRUNDIG2_START_BIT_PULSE_LEN_MAX) && + (irmp_pause_time >= GRUNDIG2_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG2_START_BIT_PAUSE_LEN_MAX)) + { // it's GRUNDIG2 + ANALYZE_PRINTF ("protocol = GRUNDIG2, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n", + GRUNDIG2_START_BIT_PULSE_LEN_MIN, GRUNDIG2_START_BIT_PULSE_LEN_MAX, + 2 * GRUNDIG2_START_BIT_PULSE_LEN_MIN, 2 * GRUNDIG2_START_BIT_PULSE_LEN_MAX, + GRUNDIG2_START_BIT_PAUSE_LEN_MIN, GRUNDIG2_START_BIT_PAUSE_LEN_MAX, + 2 * GRUNDIG2_START_BIT_PAUSE_LEN_MIN, 2 * GRUNDIG2_START_BIT_PAUSE_LEN_MAX); + irmp_param_p = (IRMP_PARAMETER *) &grundig2_param; + last_pause = irmp_pause_time; + last_value = 1; + } + else +#endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 + #if IRMP_SUPPORT_FDC_PROTOCOL == 1 if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX && irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX) @@ -3360,7 +3420,7 @@ irmp_ISR (void) irmp_ir_detected = FALSE; } - irmp_flags |= genre2; // write the genre2 bits into MSB of the flag byte + irmp_flags |= genre2; // write the genre2 bits into MSB of the flag byte } #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1 @@ -3574,6 +3634,14 @@ print_timings (void) 2 * SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, 2 * SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX); + printf ("GRUNDIG2 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n", + GRUNDIG2_START_BIT_PULSE_LEN_MIN, GRUNDIG2_START_BIT_PULSE_LEN_MAX, + GRUNDIG2_START_BIT_PAUSE_LEN_MIN, GRUNDIG2_START_BIT_PAUSE_LEN_MAX, + GRUNDIG2_BIT_PULSE_LEN_MIN, GRUNDIG2_BIT_PULSE_LEN_MAX, + GRUNDIG2_BIT_PAUSE_LEN_MIN, GRUNDIG2_BIT_PAUSE_LEN_MAX, + 2 * GRUNDIG2_BIT_PULSE_LEN_MIN, 2 * GRUNDIG2_BIT_PULSE_LEN_MAX, + 2 * GRUNDIG2_BIT_PAUSE_LEN_MIN, 2 * GRUNDIG2_BIT_PAUSE_LEN_MAX); + printf ("FDC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n", FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX, FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_0_PAUSE_LEN_MIN, FDC_0_PAUSE_LEN_MAX, diff --git a/irmp.h b/irmp.h index ccaee81..140c5a7 100644 --- a/irmp.h +++ b/irmp.h @@ -3,7 +3,7 @@ * * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de * - * $Id: irmp.h,v 1.68 2012/02/13 10:55:50 fm Exp $ + * $Id: irmp.h,v 1.70 2012/02/21 08:41:46 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -79,8 +79,9 @@ typedef uint8_t PAUSE_LEN; #define IRMP_NEC42_PROTOCOL 28 // NEC with 42 bits #define IRMP_LEGO_PROTOCOL 29 // LEGO Power Functions RC #define IRMP_THOMSON_PROTOCOL 30 // Thomson +#define IRMP_GRUNDIG2_PROTOCOL 31 // Grundig, e.g. TP400 -#define IRMP_N_PROTOCOLS 30 // number of supported protocols +#define IRMP_N_PROTOCOLS 31 // number of supported protocols // some flags of struct IRMP_PARAMETER: #define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01 @@ -156,7 +157,7 @@ typedef uint8_t PAUSE_LEN; #define SAMSUNG32_COMPLETE_DATA_LEN 32 // complete length #define SAMSUNG32_FRAMES 1 // SAMSUNG32 sends each frame 1 times #define SAMSUNG32_AUTO_REPETITION_PAUSE_TIME 47.0e-3 // repetition after 47 ms -#define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 40ms +#define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 47ms #define MATSUSHITA_START_BIT_PULSE_TIME 3488.0e-6 // 3488 usec pulse #define MATSUSHITA_START_BIT_PAUSE_TIME 3488.0e-6 // 3488 usec pause @@ -481,6 +482,20 @@ typedef uint8_t PAUSE_LEN; #define THOMSON_LSB 0 // MSB...LSB #define THOMSON_FLAGS 0 // flags +#define GRUNDIG2_START_BIT_PULSE_TIME 550.0e-6 // 550 usec pulse +#define GRUNDIG2_START_BIT_PAUSE_TIME 2700.0e-6 // 2700 usec pause +#define GRUNDIG2_BIT_PULSE_TIME 550.0e-6 // 550 usec short pulse +#define GRUNDIG2_BIT_PAUSE_TIME 550.0e-6 // 550 usec short pause +#define GRUNDIG2_FRAME_REPEAT_PAUSE_TIME 100.0e-3 // frame repeat after 100ms +#define GRUNDIG2_STOP_BIT 0 // has no stop bit +#define GRUNDIG2_LSB 1 // MSB...LSB +#define GRUNDIG2_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags +#define GRUNDIG2_ADDRESS_OFFSET 0 // skip 0 bits +#define GRUNDIG2_ADDRESS_LEN 0 // read 0 bits +#define GRUNDIG2_COMMAND_OFFSET 0 // skip 0 bits +#define GRUNDIG2_COMMAND_LEN 7 // read 6 + 1 command bits, last bit is always 1 +#define GRUNDIG2_COMPLETE_DATA_LEN 7 // complete length + #define AUTO_FRAME_REPETITION_TIME 80.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms // KASEIKYO: automatic repetition after 75ms diff --git a/irmpconfig.h b/irmpconfig.h index a303719..225a0e4 100644 --- a/irmpconfig.h +++ b/irmpconfig.h @@ -3,7 +3,7 @@ * * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de * - * $Id: irmpconfig.h,v 1.78 2012/02/16 10:40:08 fm Exp $ + * $Id: irmpconfig.h,v 1.80 2012/02/21 08:41:46 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -62,6 +62,7 @@ #define IRMP_SUPPORT_NOKIA_PROTOCOL 0 // Nokia >= 10000 ~300 bytes // exotic protocols, enable here! Enable Remarks F_INTERRUPTS Program Space +#define IRMP_SUPPORT_GRUNDIG2_PROTOCOL 0 // Grundig TP400 >= 10000 ~300 bytes #define IRMP_SUPPORT_KATHREIN_PROTOCOL 0 // Kathrein >= 10000 ~200 bytes #define IRMP_SUPPORT_NUBERT_PROTOCOL 0 // NUBERT >= 10000 ~50 bytes #define IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL 0 // Bang & Olufsen >= 10000 ~200 bytes diff --git a/irsnd.c b/irsnd.c index f08044f..0427374 100644 --- a/irsnd.c +++ b/irsnd.c @@ -12,7 +12,7 @@ * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P * - * $Id: irsnd.c,v 1.45 2012/02/13 11:02:29 fm Exp $ + * $Id: irsnd.c,v 1.47 2012/02/16 12:37:30 fm Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/irsnd.h b/irsnd.h index a791ce5..eb50d27 100644 --- a/irsnd.h +++ b/irsnd.h @@ -3,7 +3,7 @@ * * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de * - * $Id: irsnd.h,v 1.5 2011/05/20 09:31:25 fm Exp $ + * $Id: irsnd.h,v 1.7 2012/02/16 12:39:36 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -17,10 +17,10 @@ #ifndef _WC_IRSND_H_ #define _WC_IRSND_H_ -#if defined(__18CXX) // Microchip C18 declaration of missing typedef +#if defined(__18CXX) // Microchip C18 declaration of missing typedef typedef unsigned char uint8_t; typedef unsigned int uint16_t; -#endif +#endif #define IRSND_NO_REPETITIONS 0 // no repetitions #define IRSND_MAX_REPETITIONS 14 // max # of repetitions diff --git a/irsndconfig.h b/irsndconfig.h index b669221..746f57a 100644 --- a/irsndconfig.h +++ b/irsndconfig.h @@ -3,7 +3,7 @@ * * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de * - * $Id: irsndconfig.h,v 1.27 2011/09/20 10:45:28 fm Exp $ + * $Id: irsndconfig.h,v 1.29 2012/02/16 12:39:36 fm Exp $ * * ATMEGA88 @ 8 MHz * @@ -80,7 +80,7 @@ #define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module #define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module -#ifndef PIC_C18 // AVR part +#ifndef PIC_C18 // AVR part /*--------------------------------------------------------------------------------------------------------------------------------------------------- * AVR @@ -91,8 +91,8 @@ * IRSND_OC0 = OC0 on ATmegas supporting OC0, e.g. ATmega162 * IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85 * IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85 - * IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ... - * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ... + * IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ... + * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ... *--------------------------------------------------------------------------------------------------------------------------------------------------- */ @@ -102,12 +102,12 @@ * PIC C18 * * Change hardware pin here: IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ... - * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ... + * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ... *--------------------------------------------------------------------------------------------------------------------------------------------------- */ #else -#define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC +#define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC /*--------------------------------------------------------------------------------------------------------------------------------------------------- * PIC C18 - change other PIC specific settings - ignore it when using AVR @@ -125,9 +125,9 @@ #if IRSND_OCx == IRSND_PIC_CCP2 #define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2 -#define SetDCPWM(x) SetDCPWM2(x) -#define ClosePWM ClosePWM2 -#define OpenPWM(x) OpenPWM2(x) +#define SetDCPWM(x) SetDCPWM2(x) +#define ClosePWM ClosePWM2 +#define OpenPWM(x) OpenPWM2(x) #endif #if IRSND_OCx == IRSND_PIC_CCP1 -- 2.39.2