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file reorg. move routines, that are mainly used in initialization to banked area
[z180-stamp-cpm3.git] / cbios / boot.180
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1 title 'Boot loader module for CP/M 3.0'\r
2\r
3\r
4\r
5 public hwinit,?init,?ldccp,?rlccp\r
6\r
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7 public f_cpu\r
8\r
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9 extrn ?boot,?conin\r
10 extrn pr.inln,pr.crlf,pr.dec,pr.decl\r
f80331a6 11 extrn ioini1l,msginit,mmuinit,intinit,cpu_frq\r
f4471ef9 12 extrn prt0ini,gs_rtc\r
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13 extrn @civec,@covec,@aivec,@aovec,@lovec\r
14 extrn @cbnk,?bnksl\r
15\r
16 include config.inc\r
17 include z180reg.inc\r
18\r
19\r
20bdos equ 5\r
21\r
22ccpsize equ 0c80h\r
23\r
24 if banked\r
25tpa$bank equ 1\r
26 else\r
27tpa$bank equ 0\r
28 endif\r
29\r
30\r
31 dseg ; init done from banked memory\r
32\r
33hwinit:\r
34 ld a,(INIDONE)\r
35 cp INIDONEVAL\r
36 jr z,hwini_skip\r
37 ld hl,hwini_tab\r
38 call ioini1l\r
39 ld a,0c3h\r
40 ld hl,?boot\r
41 ld (0),a\r
42 ld (1),hl\r
43hwini_skip:\r
44 call mmuinit ; setup mmu registers\r
45 call msginit\r
f80331a6 46 call cpu_frq\r
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47 ld (f_cpu),hl\r
48 ld (f_cpu+2),de\r
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49 ret\r
50\r
51?init:\r
50f3b8f0 52 ld hl,1000000000000000b ; assign console to AVRCON:\r
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53 ld (@civec),hl\r
54 ld (@covec),hl\r
55 ld hl,0000000000000000b ; assign printer to nothing:\r
56 ld (@lovec),hl\r
57 ld hl,0100000000000000b ; assign AUX to ASCI0:\r
58 ld (@aivec),hl\r
59 ld (@aovec),hl\r
60\r
61\r
d12d8b38 62 call intinit ; setup interrupts and vectors\r
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63 call prt0ini ; init timer\r
64 ei\r
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65 ld c,2\r
66 call gs_rtc ; get time and date\r
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67\r
68 xor a\r
d12d8b38 69 ld (@cbnk),a ; right now in bank 0\r
ea5293bb 70\r
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71 call pr.inln ; print signon message\r
72 db 13,10,13,10,'CP/M Version 3.0, Z180-Stamp BIOS',13,10,0\r
73\r
74 call pr.inln\r
50f3b8f0 75 db 'Estimated CPU clock [Hz]: ',0\r
d12d8b38 76\r
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77 ld hl,(f_cpu)\r
78 ld de,(f_cpu+2)\r
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79 call pr.decl\r
80 call pr.crlf\r
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81 ret\r
82\r
83\r
d12d8b38 84 cseg ; boot loading must be done from resident memory\r
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85\r
86; This version of the boot loader loads the CCP from a file\r
87; called CCP.COM on the system drive (A:).\r
88\r
89\r
90?ldccp:\r
91 ; First time, load the A:CCP.COM file into TPA\r
d12d8b38 92 call resetdsk\r
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93 xor a\r
94 ld (ccp$fcb+15),a ; zero extent\r
95 ld hl,0\r
96 ld (fcb$nr),hl ; start at beginning of file\r
97 ld de,ccp$fcb\r
98 call open ; open file containing CCP\r
99 inc a\r
100 jp z,no$ccp ; error if no file...\r
101 ld de,0100h\r
102 call setdma ; start of TPA\r
103 ld de,128\r
104 call setmulti ; allow up to 16k bytes\r
105 ld de,ccp$fcb\r
106 call read ; load the thing\r
107 ; now,\r
108 ; copy CCP to bank 0 for reloading\r
109 ld hl,0100h\r
110 ld bc,ccpsize ; clone 3K, just in case\r
111 ld a,(@cbnk)\r
112 push af ; save current bank\r
113ld$1:\r
114 ld a,tpa$bank\r
115 call ?bnksl ; select TPA\r
116 ld a,(hl)\r
117 push af ; get a byte\r
118 ld a,2\r
119 call ?bnksl ; select extra bank\r
120 pop af\r
121 ld (hl),a ; save the byte\r
122 inc hl\r
123 dec bc ; bump pointer, drop count\r
124 ld a,b\r
125 or c ; test for done\r
126 jp nz,ld$1\r
127 pop af\r
128 call ?bnksl ; restore original bank\r
129 ret\r
130\r
131no$ccp: ; here if we couldn't find the file\r
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132 call pr.inln ; report this...\r
133 db 13,10,'BIOS Err on A: No CCP.COM file',0\r
134\r
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135 call ?conin ; get a response\r
136 jp ?ldccp ; and try again\r
137\r
138\r
139?rlccp:\r
140 ld hl,0100h\r
141 ld bc,ccpsize ; clone 3K\r
142rl$1:\r
143 ld a,2\r
144 call ?bnksl ; select extra bank\r
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145 ld a,(hl) ; get a byte\r
146 ex af,af'\r
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147 ld a,tpa$bank\r
148 call ?bnksl ; select TPA\r
50f3b8f0 149 ex af,af'\r
ea5293bb 150 ld (hl),a ; save the byte\r
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151 cpi ; bump pointer, drop count\r
152 jp pe,rl$1\r
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153 ret\r
154\r
155\r
156 ; CP/M BDOS Function Interfaces\r
157\r
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158resetdsk:\r
159 ld c,13\r
160 jp bdos ; reset disk system\r
161\r
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162open:\r
163 ld c,15\r
164 jp bdos ; open file control block\r
165\r
166setdma:\r
167 ld c,26\r
168 jp bdos ; set data transfer address\r
169\r
170setmulti:\r
171 ld c,44\r
172 jp bdos ; set record count\r
173\r
174read:\r
175 ld c,20\r
176 jp bdos ; read records\r
177\r
178\r
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179\r
180ccp$fcb:db 1,'CCP ','COM',0,0,0,0\r
181 ds 16\r
182fcb$nr: db 0,0,0\r
183\r
184\r
f80331a6 185 dseg\r
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186hwini_tab:\r
187 db (hwini0_e-$)/2 ;count\r
188 db rcr,CREFSH ;configure DRAM refresh\r
189 db dcntl,CWAITIO ;wait states\r
190 db ccr,M_NCD ;No Clock Divide\r
191 db cmr,PHI_X2 ;X2 Clock Multiplier\r
192;TODO: db omr, ;Operation Mode Control Register\r
193hwini0_e:\r
194 db 0 ;stop mark\r
195\r
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196 cseg\r
197f_cpu dw 0,0 ;detected CPU clock frequency [Hz]\r
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198\r
199 end\r