[z180-stamp-cpm3.git] / cbios / ascii.180

\r
; Interrupt drivers for ASCI0 and ASCI1\r
\r
	global	as0_dev,as1_dev\r
\r
	extrn	@ctbl,f_cpu\r
	extrn	ff_empty,ff_get,ff_full,ff_put\r
	extrn	ff_puth,ff_cnt,ff_gech\r
	extrn	bufinit\r
	extrn	isv_sw,ijphl,add_hla,div32_r\r
	extrn	b_st_a,b_ld_a\r
\r
\r
\r
	maclib z180reg.inc\r
	maclib config.inc\r
	maclib ioctl.inc\r
	maclib modebaud.inc\r
\r
\r
	m2b	mbxon_bit,mb$xon$xoff\r
\r
;-----------------------------------------------------\r
\r
	dseg\r
\r
	dw	asci0_out\r
	dw	asci0_osta\r
	dw	asci0_inp\r
	dw	asci0_ista\r
	dw	asci_ioctl\r
as0_dev:\r
	db	0			;absolute device #\r
	db	0			;relative device\r
	db	0			;iflags\r
	db	M_CREAD+M_CRTS_IFLOW+M_CCTS_OFLOW	;fflags\r
	db	M_CS8			;cflags\r
o.absdev	equ	0\r
o.reldev	equ	1\r
o.iflags	equ	2\r
o.fflags	equ	3\r
o.cflags	equ	4\r
\r
	db	0\r
	db	0\r
oint.iflags	equ	as0_dev+o.iflags-s0.inbuf\r
oint.fflags	equ	as0_dev+o.fflags-s0.inbuf\r
	mkbuf	s0.rx_id, s0.inbuf, s0.rx_len\r
	mkbuf	s0.tx_id, s0.outbuf,s0.tx_len\r
\r
\r
	dw	asci1_out\r
	dw	asci1_osta\r
	dw	asci1_inp\r
	dw	asci1_ista\r
	dw	asci_ioctl\r
as1_dev:\r
	db	0			;absolute device #\r
	db	1			;relative device\r
	db	0			;iflags\r
	db	M_CREAD			;fflags\r
	db	M_CS8			;cflags\r
\r
	db	0\r
	db	0\r
	mkbuf	s1.rx_id, s1.inbuf, s1.rx_len\r
	mkbuf	s1.tx_id, s1.outbuf,s1.tx_len\r
\r
\r
\r
	dseg\r
\r
\r
ioctl_ftab:\r
	dw	func_tcinit		;(00h) CP/M 3 DEVINI function\r
	dw	func_tcgeta		;(01h) Get the current serial port settings.\r
	dw	func_tcseta		;(02h) Set the current serial port settings.\r
	dw	func_tcsetaw		;(03h) Allow the output buffer to drain\r
	dw	func_tcsetaf		;(04h) Allow the output buffer to drain, discard pending input\r
	dw	func_tcsbrk		;(05h) Sending a break (250ms .. 500ms)\r
	dw	func_tcsbrkp		;(06h) arg is timeinterval in 0.1sec\r
	dw	func_tiocsbrk		;(07h) Turn break on\r
	dw	func_tioccbrk		;(08h) Turn break off\r
	dw	func_tcxonc		;(09h) Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
	dw	func_tcflsh		;(0Ah) Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
	dw	func_fionread		;(0Bh) Get the number of bytes in the input buffer.\r
	dw	func_tiocoutq		;(0Ch) Get the number of bytes in the output buffer.\r
	dw	func_tiocmget		;(0Dh) get the status of modem bits.\r
	dw	func_tiocmbis		;(0Eh) set the indicated modem bits.\r
	dw	func_tiocmbic		;(0Fh) clear the indicated modem bits.\r
	dw	func_tiocmset		;(10h) set the status of modem bits.\r
	dw	func_tiocgsoftcar	;(11h) Get the status of the CLOCAL flag in the c_cflag field\r
	dw	func_tiocssoftcar	;(12h) Set the CLOCAL flag when  *argp  is nonzero, and clear it otherwise.\r
\r
IOCTL_MAX equ	($-ioctl_ftab)/2\r
	dw	nofunc\r
\r
\r
;--------------------------------------------------------------\r
;\r
; b:  device number\r
; c:  command\r
; de: ioctl arg pointer\r
; hl: ptr to driver local data\r
;\r
\r
asci_ioctl:\r
	ld	a,b\r
	cp	1\r
	jr	nz,asioc_1\r
	ld	a,(INIDONE)\r
	and	80h\r
	cp	INIDONEVAL\r
	ret	z\r
asioc_1:\r
	push	hl\r
	ex	(sp),ix\r
	ld	(ix+o.absdev),b\r
	ld	hl,ioctl_ftab\r
	ld	a,IOCTL_MAX\r
	cp	c\r
	jr	c,$+3\r
	 ld	a,c\r
	add	a,a\r
	call	add_hla\r
	ld	a,(hl)\r
	inc	hl\r
	ld	h,(hl)\r
	ld	l,a\r
	call	ijphl\r
	pop	ix\r
nofunc:\r
	or	a\r
	ret\r
\r
;--------------------------------------------------------------\r
; CP/M 3 DEVINI function\r
; Init Serial I/O for input and output (ASCI 0/1)\r
\r
func_tcinit:\r
	call	asci_stop\r
\r
init_st:\r
	ld	c,asext0		;Enable baud rate generator\r
	ld	a,M_BRGMOD+M_DCD0DIS 	; +M_CTS0DIS +M_BREAKEN\r
	bit	CCTS_OFLOW,(ix+o.fflags)\r
	jr	nz,$+4\r
	 or	M_CTS0DIS\r
	call	out_asci_reg\r
\r
	ld	b,(ix+o.absdev)\r
	ld	c,8			;\r
	mlt	bc			;\r
	ld	hl,@ctbl+7		;\r
	add	hl,bc			;\r
	ld	a,(hl)			;get baudrate index\r
	call	as_br_div\r
	ld	c,astc0l\r
	call	out_asci_reg_hl\r
\r
	ld	c,cntlb0\r
	ld	a,M_MPBT		;No MP Mode, X16\r
	bit	PARODD,(ix+o.iflags)\r
	jr	z,$+4\r
	 or	M_PEO\r
	call	out_asci_reg\r
\r
	ld	c,cntla0\r
	ld	a,(ix+o.cflags)\r
	srlan	CS8\r
	ld	hl,mod_tab\r
	call	add_hla\r
	ld	a,(hl)\r
	or	a,M_RE+M_TE+M_RTS0+M_EFR ;Rx/Tx enable\r
	call	out_asci_reg\r
\r
	push	ix\r
	bit	0,(ix+o.reldev)\r
	jr	nz,init_1\r
	ld	hl,rtxisvjmp0		;rx/tx int vector\r
	ld	(ivtab + IV$ASCI0),hl	;\r
	ld	ix,s0.outbuf\r
	call	bufinit\r
	ld	ix,s0.inbuf\r
	jr	init_2\r
init_1:\r
	ld	hl,rtxisvjmp1		;rx/tx int vector\r
	ld	(ivtab + IV$ASCI1),hl	;\r
	ld	ix,s1.outbuf\r
	call	bufinit\r
	ld	ix,s1.inbuf\r
init_2:\r
	call	bufinit\r
	pop	ix\r
	call	asci_start\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
mod_tab:\r
	db	000B			; 7N1\r
	db	100B			; 8N1\r
	db	001B			; 7N2\r
	db	101B			; 8N2\r
	db	010B			; 7P1\r
	db	110B			; 8P1\r
	db	011B			; 7P2\r
	db	111B			; 8P2\r
\r
\r
;--------------------------------------------------------------\r
; Get the current serial port settings.\r
\r
func_tcgeta:\r
	call	chk_ptr\r
\r
	ld	a,(ix+o.iflags)\r
	call	b_st_a\r
	inc	de\r
	ld	a,(ix+o.fflags)\r
	call	b_st_a\r
	inc	de\r
\r
	ld	b,(ix+o.absdev)\r
	ld	c,8			;\r
	mlt	bc			;\r
	ld	hl,@ctbl+7		;\r
	add	hl,bc			;\r
	ld	a,(hl)			;get baudrate index\r
	and	M_CBAUD\r
	ld	b,a\r
	ld	a,(ix+o.cflags)\r
	and	~M_CBAUD\r
	or	b\r
	call	b_st_a\r
	dec	de\r
	dec	de\r
	xor	a\r
	ret\r
\r
;--------------------------------------------------------------\r
; Set the current serial port settings.\r
\r
func_tcseta:\r
	call	chk_ptr\r
\r
	call	asci_stop\r
\r
	call	b_ld_a\r
	ld	(ix+o.iflags),a\r
	inc	de\r
	call	b_ld_a\r
	ld	(ix+o.fflags),a\r
	inc	de\r
\r
	ld	b,(ix+o.absdev)\r
	ld	c,8			;\r
	mlt	bc			;\r
	ld	hl,@ctbl+7		;\r
	add	hl,bc			;\r
	call	b_ld_a\r
	ld	(ix+o.cflags),a\r
	and	M_CBAUD\r
	ld	(hl),a			;set baudrate index\r
	dec	de\r
	dec	de\r
	push	de\r
	call	init_st\r
	pop	de\r
	xor	a\r
	ret\r
\r
;--------------------------------------------------------------\r
; Allow the output buffer to drain\r
\r
func_tcsetaw:\r
\r
;--------------------------------------------------------------\r
; Allow the output buffer to drain, discard pending input\r
\r
func_tcsetaf:\r
\r
;--------------------------------------------------------------\r
; Sending a break (250ms .. 500ms)\r
\r
func_tcsbrk:\r
\r
;--------------------------------------------------------------\r
; arg is timeinterval in 0.1sec\r
\r
func_tcsbrkp:\r
\r
;--------------------------------------------------------------\r
; Turn break on\r
\r
func_tiocsbrk:\r
\r
;--------------------------------------------------------------\r
; Turn break off\r
\r
func_tioccbrk:\r
\r
;--------------------------------------------------------------\r
; Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
\r
func_tcxonc:\r
\r
;--------------------------------------------------------------\r
; Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
\r
func_tcflsh:\r
\r
;--------------------------------------------------------------\r
; Get the number of bytes in the input buffer.\r
\r
func_fionread:\r
\r
;--------------------------------------------------------------\r
; Get the number of bytes in the output buffer.\r
\r
func_tiocoutq:\r
\r
;--------------------------------------------------------------\r
; get the status of modem bits.\r
\r
func_tiocmget:\r
\r
;--------------------------------------------------------------\r
; set the indicated modem bits.\r
\r
func_tiocmbis:\r
\r
;--------------------------------------------------------------\r
; clear the indicated modem bits.\r
\r
func_tiocmbic:\r
\r
;--------------------------------------------------------------\r
; set the status of modem bits.\r
\r
func_tiocmset:\r
\r
;--------------------------------------------------------------\r
; Get the status of the CLOCAL flag in the c_cflag field\r
\r
func_tiocgsoftcar:\r
\r
;--------------------------------------------------------------\r
; Set the CLOCAL flag when  *argp  is nonzero, and clear it otherwise.\r
\r
func_tiocssoftcar:\r
\r
	or	0ffh\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
chk_ptr:\r
	ld	a,e\r
	or	d\r
	ret	nz\r
	cpl\r
	pop	hl\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
asci_stop:\r
	ld	c,stat0			;Disable rx/tx interrupts\r
	xor	a			;\r
	call	out_asci_reg\r
\r
	ld	c,cntla0		;Disable receiver and transmitter\r
	ld	a,M_RTS0+M_EFR		;RTS/CKA1\r
	jr	out_asci_reg\r
\r
;--------------------------------------------------------------\r
\r
asci_start:\r
	ld	c,stat0			;\r
	ld	a,M_RIE\r
	jr	out_asci_reg\r
\r
;--------------------------------------------------------------\r
; output to asci0/1 register\r
;\r
; c:  register address\r
; a:  value\r
;\r
\r
out_asci_reg:\r
	push	bc\r
	bit	0,(ix+o.reldev)\r
	jr	z,$+3\r
	 inc	c\r
	ld	b,0\r
	out	(c),a\r
	pop	bc\r
	ret\r
\r
;--------------------------------------------------------------\r
; output 16 bit value to asci0/1 register\r
;\r
; c:   register address\r
; hl:  value\r
; a destroyed\r
\r
out_asci_reg_hl:\r
	ld	a,b			;save b\r
	bit	0,(ix+o.reldev)\r
	jr	z,$+4\r
	 inc	c\r
	 inc	c\r
	ld	b,0\r
	out	(c),l\r
	inc	c\r
	out	(c),h\r
	ld	b,a\r
	ret\r
\r
;--------------------------------------------------------------\r
; baud rate divider\r
;\r
;   a: index\r
; return\r
;   hl: divider\r
\r
as_br_div:\r
	push	de\r
	push	bc\r
	and	0fh\r
	add	a,a			;get factor\r
	ld	hl,bd150_tab\r
	call	add_hla\r
	ld	c,(hl)\r
	inc	hl\r
	ld	b,(hl)\r
	ld	hl,(f_cpu)\r
	ld	de,(f_cpu+2)\r
	call	div32_r\r
	ld	bc,32*150\r
	call	div32_r\r
	ld	de,2\r
	or	a\r
	sbc	hl,de\r
	pop	bc\r
	pop	de\r
	ret	nc\r
	ld	hl,0\r
	ret\r
\r
bd150_tab:\r
;		factor		index   baudrate	orig. cp/m\r
	dw	19200/150	; 0	19200		-\r
	dw	28800/150	; 1	28800		50\r
	dw	38400/150	; 2	38400		75\r
	dw	57600/150	; 3	57600		110\r
	dw	11520/15	; 4	115200		134.5\r
	dw	150/150		; 5	150\r
	dw	300/150		; 6	300\r
	dw	600/150		; 7	600\r
	dw	1200/150	; 8	1200\r
	dw	1800/150	; 9	1800\r
	dw	2400/150	;10	2400\r
	dw	3600/150	;11	3600\r
	dw	4800/150	;12	4800\r
	dw	7200/150	;13	7200\r
	dw	9600/150	;14	9600\r
	dw	19200/150	;15	19200\r
\r
\r
;--------------------------------------------------------------\r
\r
   if 0\r
\r
initab0:\r
	db	1,stat0,0		;Disable rx/tx interrupts\r
					;Enable baud rate generator\r
	db	1,asext0,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS\r
	db	2,astc0l\r
init_br_off equ $ - initab0\r
	dw	28\r
	db	1,cntlb0,M_MPBT		;No MP Mode, X16\r
	db	1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
	db	0\r
\r
initab1:\r
	db	1,stat1,0		;Disable rx/tx ints, disable CTS1\r
	db	1,asext1,M_BRGMOD	;Enable baud rate generator\r
	db	2,astc1l,low 3, high 3\r
	db	1,cntlb1,M_MPBT		;No MP Mode, X16\r
	db	1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
	db	0\r
   endif\r
\r
;--------------------------------------------------------------\r
\r
	dseg\r
asci0_ista:\r
	push	ix\r
	ld	ix,s0.inbuf		;\r
	call	ff_empty\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
asci1_ista:\r
	push	ix\r
	ld	ix,s1.inbuf		;\r
	call	ff_empty\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Get an input character\r
\r
asci0_inp:\r
	push	ix\r
	ld	ix,s0.inbuf		;\r
	call	ff_gech\r
	ld	a,b\r
	cp	s0.rx_len/4\r
	jr	nc,a0i_1\r
	bit	CRTS_IFLOW,(ix+oint.fflags)\r
	jr	z,a0i_1\r
	di\r
	in0	a,(cntla0)\r
	and	~M_RTS0			;assert RTS\r
	or	M_EFR			;don't reset error flags\r
	ei\r
	out0	(cntla0),a\r
a0i_1:\r
	ld	a,c\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Get an input character\r
\r
asci1_inp:\r
	push	ix\r
	ld	ix,s1.inbuf		;\r
	call	ff_gech\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Output status\r
\r
asci0_osta:\r
	push	ix\r
	ld	ix,s0.outbuf		;\r
	call	ff_full\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Output status\r
\r
asci1_osta:\r
	push	ix\r
	ld	ix,s1.outbuf		;\r
	call	ff_full\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; put character in c in buffer\r
; destroys hl, bc\r
; returns output char in a\r
\r
asci0_out:\r
	push	ix			;\r
	ld	ix,s0.outbuf		;\r
	call	ff_puth\r
	pop	ix			;\r
	di				;\r
	in0	c,(stat0)		;\r
	set	TIE,c			;\r
	out0	(stat0),c		;\r
	ei				;\r
	ret\r
\r
;--------------------------------------------------------------\r
; put character in c in buffer\r
; destroys hl, bc\r
; returns output char in a\r
\r
asci1_out:\r
	push	ix			;\r
	ld	ix,s1.outbuf		;\r
	call	ff_puth\r
	pop	ix			;\r
	di				;\r
	in0	c,(stat1)		;\r
	set	TIE,c			;\r
	out0	(stat1),c		;\r
	ei				;\r
	ret\r
\r
\r
;--------------------------------------------------------------\r
\r
	cseg\r
rtxisvjmp0:\r
	call	isv_sw\r
	dw	asci0_int\r
\r
rtxisvjmp1:\r
	call	isv_sw\r
	dw	asci1_int\r
\r
;--------------------------------------------------------------\r
; ASCI 0/1 Transmit/Receive interupt routines\r
\r
	.lall\r
asci_int macro	dev\r
	local	rxi_2,rxi_4\r
\r
	push	ix\r
rxtxi&dev&_lp0:\r
	ld	ix,s&dev&.inbuf		;\r
rxtxi&dev&_lp1:\r
	in0	a,(stat&dev)		;receive flag set?\r
	jp	p,txi&dev		;RDRF == Bit 7\r
	and	M_OVRN+M_PERR+M_FE\r
	ld	e,a\r
\r
	in0	a,(asext&dev)\r
	and	M_BREAK\r
	or	e\r
	ld	e,a\r
\r
	in0	d,(cntla&dev)		;\r
	res	EFR,d			;\r
	out0	(cntla&dev),d\r
\r
	ld	c,(ix+o.in_idx)		;\r
	ld	b,0\r
	ld	hl,s&dev&.inbuf		;\r
	add	hl,bc\r
\r
	in0	a,(rdr&dev)		;\r
	ld	(hl),a\r
					;todo: break detection\r
					;todo: parity, framing overrun error\r
\r
	ld	e,(ix+oint.fflags)\r
	bit	IXON,e\r
	jr	z,rxi_2\r
					;todo: test XON/XOFF\r
\r
rxi_2:\r
\r
	ld	a,c			;increment buffer in pointer\r
	inc	a			;\r
	ld	b,(ix+o.mask)		;\r
	and	b			;\r
	ld	c,a\r
\r
	sub	(ix+o.out_idx)		;\r
	jr	z,rxtxi&dev&_lp1	;skip if buffer is full\r
\r
	ld	(ix+o.in_idx),c		;\r
\r
	jr	nc,$+3			;\r
	 adc	b			;\r
\r
	cp	s&dev&.tx_len*3/4\r
	jr	c,rxi&dev&_noflow\r
\r
   if dev=0\r
	bit	CRTS_IFLOW,e\r
	jr	z,rxi_4\r
\r
	set	EFR,d\r
	set	RTS0,d			;RTS inactive\r
	out0	(cntla&dev),d		;\r
   endif\r
\r
rxi_4:\r
	bit	IXOFF,e\r
	jr	z,rxtxi&dev&_lp1\r
					;todo: send XOFF\r
\r
rxi&dev&_noflow:\r
	jr	rxtxi&dev&_lp1\r
\r
\r
txi&dev:\r
	ld	e,a\r
	bit	TDRE,e			;TX int?\r
	jr	z,rxtxi&dev&_exit\r
\r
					;todo: xon/xoff\r
\r
	ld	hl,s&dev&.outbuf+o.in_idx	;[in]\r
	ld	a,(hl)			;\r
	inc	hl			;[out]\r
	ld	c,(hl)			;\r
	cp	c			;\r
	jr	z,txi&dev&_empty	;\r
	inc	hl			;fifo base\r
	ld	b,0			;\r
	add	hl,bc			;\r
	ld	a,(hl)			;\r
	out0	(tdr&dev),a		;\r
	inc	c			;\r
	ld	a,(s&dev&.outbuf+o.mask)	;\r
	and	c			;\r
	ld	(s&dev&.outbuf+o.out_idx),a	;\r
\r
	jr	rxtxi&dev&_lp0\r
\r
txi&dev&_empty:\r
	res	TIE,e			;disable tx-int\r
	out0	(stat&dev),e		;			5\r
\r
rxtxi&dev&_exit:\r
	pop	ix\r
	ret\r
	endm\r
\r
	dseg\r
;--------------------------------------------------------------\r
; ASCI 0 Transmit/Receive interupt routines\r
\r
asci0_int:\r
	asci_int 0\r
\r
;--------------------------------------------------------------\r
; ASCI 1 Transmit/Receive interupt routines\r
\r
asci1_int:\r
	asci_int 1\r
\r
	end\r
Commit	Line	Data
d6829fd3 L	1	\r
	2	; Interrupt drivers for ASCI0 and ASCI1\r
	3	\r
6dd88c25	4	global as0_dev,as1_dev\r
d6829fd3	5	\r
1c7e3963	6	extrn @ctbl,f_cpu\r
81ba3c84 L	7	extrn ff_empty,ff_get,ff_full,ff_put\r
81ba3c84 L	8	extrn ff_puth,ff_cnt,ff_gech\r
d6829fd3	9	extrn bufinit\r
1c7e3963 L	10	extrn isv_sw,ijphl,add_hla,div32_r\r
1c7e3963 L	11	extrn b_st_a,b_ld_a\r
d6829fd3 L	12	\r
	13	\r
	14	\r
1c7e3963 L	15	maclib z180reg.inc\r
	16	maclib config.inc\r
	17	maclib ioctl.inc\r
	18	maclib modebaud.inc\r
d6829fd3 L	19	\r
d6829fd3 L	20	\r
1c7e3963	21	m2b mbxon_bit,mb$xon$xoff\r
d6829fd3 L	22	\r
	23	;-----------------------------------------------------\r
	24	\r
	25	dseg\r
	26	\r
6dd88c25 L	27	dw asci0_out\r
	28	dw asci0_osta\r
	29	dw asci0_inp\r
	30	dw asci0_ista\r
	31	dw asci_ioctl\r
	32	as0_dev:\r
1c7e3963 L	33	db 0 ;absolute device #\r
	34	db 0 ;relative device\r
	35	db 0 ;iflags\r
99b8d89e	36	db M_CREAD+M_CRTS_IFLOW+M_CCTS_OFLOW ;fflags\r
1c7e3963	37	db M_CS8 ;cflags\r
6dd88c25 L	38	o.absdev equ 0\r
6dd88c25 L	39	o.reldev equ 1\r
1c7e3963 L	40	o.iflags equ 2\r
	41	o.fflags equ 3\r
	42	o.cflags equ 4\r
	43	\r
	44	db 0\r
	45	db 0\r
	46	oint.iflags equ as0_dev+o.iflags-s0.inbuf\r
	47	oint.fflags equ as0_dev+o.fflags-s0.inbuf\r
	48	mkbuf s0.rx_id, s0.inbuf, s0.rx_len\r
	49	mkbuf s0.tx_id, s0.outbuf,s0.tx_len\r
	50	\r
6dd88c25 L	51	\r
	52	dw asci1_out\r
	53	dw asci1_osta\r
	54	dw asci1_inp\r
	55	dw asci1_ista\r
	56	dw asci_ioctl\r
	57	as1_dev:\r
1c7e3963 L	58	db 0 ;absolute device #\r
	59	db 1 ;relative device\r
	60	db 0 ;iflags\r
99b8d89e	61	db M_CREAD ;fflags\r
1c7e3963	62	db M_CS8 ;cflags\r
6dd88c25	63	\r
6dd88c25	64	db 0\r
6dd88c25	65	db 0\r
d6829fd3	66	mkbuf s1.rx_id, s1.inbuf, s1.rx_len\r
81ba3c84	67	mkbuf s1.tx_id, s1.outbuf,s1.tx_len\r
d6829fd3 L	68	\r
	69	\r
	70	\r
	71	dseg\r
	72	\r
6dd88c25 L	73	\r
6dd88c25 L	74	ioctl_ftab:\r
1c7e3963 L	75	dw func_tcinit ;(00h) CP/M 3 DEVINI function\r
	76	dw func_tcgeta ;(01h) Get the current serial port settings.\r
	77	dw func_tcseta ;(02h) Set the current serial port settings.\r
	78	dw func_tcsetaw ;(03h) Allow the output buffer to drain\r
	79	dw func_tcsetaf ;(04h) Allow the output buffer to drain, discard pending input\r
	80	dw func_tcsbrk ;(05h) Sending a break (250ms .. 500ms)\r
	81	dw func_tcsbrkp ;(06h) arg is timeinterval in 0.1sec\r
	82	dw func_tiocsbrk ;(07h) Turn break on\r
	83	dw func_tioccbrk ;(08h) Turn break off\r
	84	dw func_tcxonc ;(09h) Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
	85	dw func_tcflsh ;(0Ah) Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
	86	dw func_fionread ;(0Bh) Get the number of bytes in the input buffer.\r
	87	dw func_tiocoutq ;(0Ch) Get the number of bytes in the output buffer.\r
	88	dw func_tiocmget ;(0Dh) get the status of modem bits.\r
	89	dw func_tiocmbis ;(0Eh) set the indicated modem bits.\r
	90	dw func_tiocmbic ;(0Fh) clear the indicated modem bits.\r
	91	dw func_tiocmset ;(10h) set the status of modem bits.\r
	92	dw func_tiocgsoftcar ;(11h) Get the status of the CLOCAL flag in the c_cflag field\r
	93	dw func_tiocssoftcar ;(12h) Set the CLOCAL flag when *argp is nonzero, and clear it otherwise.\r
	94	\r
6dd88c25 L	95	IOCTL_MAX equ ($-ioctl_ftab)/2\r
	96	dw nofunc\r
	97	\r
1c7e3963	98	\r
d6829fd3	99	;--------------------------------------------------------------\r
d6829fd3	100	;\r
6dd88c25 L	101	; b: device number\r
	102	; c: command\r
	103	; de: ioctl arg pointer\r
	104	; hl: ptr to driver local data\r
d6829fd3 L	105	;\r
d6829fd3 L	106	\r
6dd88c25	107	asci_ioctl:\r
72ba3737 L	108	ld a,b\r
	109	cp 1\r
	110	jr nz,asioc_1\r
	111	ld a,(INIDONE)\r
	112	and 80h\r
	113	cp INIDONEVAL\r
	114	ret z\r
	115	asioc_1:\r
6dd88c25 L	116	push hl\r
	117	ex (sp),ix\r
	118	ld (ix+o.absdev),b\r
	119	ld hl,ioctl_ftab\r
	120	ld a,IOCTL_MAX\r
	121	cp c\r
	122	jr c,$+3\r
	123	ld a,c\r
	124	add a,a\r
	125	call add_hla\r
	126	ld a,(hl)\r
	127	inc hl\r
	128	ld h,(hl)\r
	129	ld l,a\r
	130	call ijphl\r
	131	pop ix\r
	132	nofunc:\r
1c7e3963	133	or a\r
6dd88c25 L	134	ret\r
6dd88c25 L	135	\r
6dd88c25	136	;--------------------------------------------------------------\r
1c7e3963	137	; CP/M 3 DEVINI function\r
6dd88c25	138	; Init Serial I/O for input and output (ASCI 0/1)\r
d6829fd3	139	\r
1c7e3963 L	140	func_tcinit:\r
	141	call asci_stop\r
	142	\r
	143	init_st:\r
	144	ld c,asext0 ;Enable baud rate generator\r
	145	ld a,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS +M_BREAKEN\r
	146	bit CCTS_OFLOW,(ix+o.fflags)\r
	147	jr nz,$+4\r
	148	or M_CTS0DIS\r
	149	call out_asci_reg\r
d6829fd3	150	\r
6dd88c25	151	ld b,(ix+o.absdev)\r
1c7e3963 L	152	ld c,8 ;\r
	153	mlt bc ;\r
	154	ld hl,@ctbl+7 ;\r
	155	add hl,bc ;\r
	156	ld a,(hl) ;get baudrate index\r
	157	call as_br_div\r
	158	ld c,astc0l\r
99b8d89e	159	call out_asci_reg_hl\r
1c7e3963 L	160	\r
	161	ld c,cntlb0\r
	162	ld a,M_MPBT ;No MP Mode, X16\r
	163	bit PARODD,(ix+o.iflags)\r
	164	jr z,$+4\r
	165	or M_PEO\r
	166	call out_asci_reg\r
	167	\r
	168	ld c,cntla0\r
	169	ld a,(ix+o.cflags)\r
	170	srlan CS8\r
	171	ld hl,mod_tab\r
	172	call add_hla\r
	173	ld a,(hl)\r
	174	or a,M_RE+M_TE+M_RTS0+M_EFR ;Rx/Tx enable\r
	175	call out_asci_reg\r
	176	\r
	177	push ix\r
6dd88c25 L	178	bit 0,(ix+o.reldev)\r
	179	jr nz,init_1\r
	180	ld hl,rtxisvjmp0 ;rx/tx int vector\r
	181	ld (ivtab + IV$ASCI0),hl ;\r
d6829fd3	182	ld ix,s0.outbuf\r
1c7e3963 L	183	call bufinit\r
1c7e3963 L	184	ld ix,s0.inbuf\r
6dd88c25 L	185	jr init_2\r
	186	init_1:\r
	187	ld hl,rtxisvjmp1 ;rx/tx int vector\r
	188	ld (ivtab + IV$ASCI1),hl ;\r
d6829fd3	189	ld ix,s1.outbuf\r
1c7e3963 L	190	call bufinit\r
1c7e3963 L	191	ld ix,s1.inbuf\r
6dd88c25	192	init_2:\r
d6829fd3	193	call bufinit\r
1c7e3963 L	194	pop ix\r
	195	call asci_start\r
	196	ret\r
	197	\r
	198	;--------------------------------------------------------------\r
	199	\r
	200	mod_tab:\r
	201	db 000B ; 7N1\r
	202	db 100B ; 8N1\r
	203	db 001B ; 7N2\r
	204	db 101B ; 8N2\r
	205	db 010B ; 7P1\r
	206	db 110B ; 8P1\r
	207	db 011B ; 7P2\r
	208	db 111B ; 8P2\r
	209	\r
	210	\r
	211	;--------------------------------------------------------------\r
	212	; Get the current serial port settings.\r
	213	\r
	214	func_tcgeta:\r
99b8d89e	215	call chk_ptr\r
1c7e3963 L	216	\r
	217	ld a,(ix+o.iflags)\r
	218	call b_st_a\r
	219	inc de\r
	220	ld a,(ix+o.fflags)\r
	221	call b_st_a\r
	222	inc de\r
	223	\r
	224	ld b,(ix+o.absdev)\r
	225	ld c,8 ;\r
	226	mlt bc ;\r
	227	ld hl,@ctbl+7 ;\r
	228	add hl,bc ;\r
	229	ld a,(hl) ;get baudrate index\r
	230	and M_CBAUD\r
	231	ld b,a\r
	232	ld a,(ix+o.cflags)\r
	233	and ~M_CBAUD\r
	234	or b\r
	235	call b_st_a\r
	236	dec de\r
	237	dec de\r
	238	xor a\r
1c7e3963 L	239	ret\r
1c7e3963 L	240	\r
1c7e3963 L	241	;--------------------------------------------------------------\r
	242	; Set the current serial port settings.\r
	243	\r
	244	func_tcseta:\r
99b8d89e	245	call chk_ptr\r
1c7e3963 L	246	\r
	247	call asci_stop\r
	248	\r
	249	call b_ld_a\r
	250	ld (ix+o.iflags),a\r
	251	inc de\r
	252	call b_ld_a\r
	253	ld (ix+o.fflags),a\r
	254	inc de\r
	255	\r
	256	ld b,(ix+o.absdev)\r
	257	ld c,8 ;\r
	258	mlt bc ;\r
	259	ld hl,@ctbl+7 ;\r
	260	add hl,bc ;\r
	261	call b_ld_a\r
	262	ld (ix+o.cflags),a\r
	263	and M_CBAUD\r
	264	ld (hl),a ;set baudrate index\r
	265	dec de\r
	266	dec de\r
	267	push de\r
	268	call init_st\r
	269	pop de\r
	270	xor a\r
1c7e3963 L	271	ret\r
1c7e3963 L	272	\r
1c7e3963 L	273	;--------------------------------------------------------------\r
	274	; Allow the output buffer to drain\r
	275	\r
	276	func_tcsetaw:\r
	277	\r
	278	;--------------------------------------------------------------\r
	279	; Allow the output buffer to drain, discard pending input\r
	280	\r
	281	func_tcsetaf:\r
	282	\r
	283	;--------------------------------------------------------------\r
	284	; Sending a break (250ms .. 500ms)\r
	285	\r
	286	func_tcsbrk:\r
	287	\r
	288	;--------------------------------------------------------------\r
	289	; arg is timeinterval in 0.1sec\r
	290	\r
	291	func_tcsbrkp:\r
	292	\r
	293	;--------------------------------------------------------------\r
	294	; Turn break on\r
	295	\r
	296	func_tiocsbrk:\r
	297	\r
	298	;--------------------------------------------------------------\r
	299	; Turn break off\r
	300	\r
	301	func_tioccbrk:\r
	302	\r
	303	;--------------------------------------------------------------\r
	304	; Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
	305	\r
	306	func_tcxonc:\r
	307	\r
	308	;--------------------------------------------------------------\r
	309	; Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
	310	\r
	311	func_tcflsh:\r
	312	\r
	313	;--------------------------------------------------------------\r
	314	; Get the number of bytes in the input buffer.\r
	315	\r
	316	func_fionread:\r
	317	\r
	318	;--------------------------------------------------------------\r
	319	; Get the number of bytes in the output buffer.\r
	320	\r
	321	func_tiocoutq:\r
	322	\r
	323	;--------------------------------------------------------------\r
	324	; get the status of modem bits.\r
	325	\r
	326	func_tiocmget:\r
	327	\r
	328	;--------------------------------------------------------------\r
	329	; set the indicated modem bits.\r
	330	\r
	331	func_tiocmbis:\r
	332	\r
	333	;--------------------------------------------------------------\r
	334	; clear the indicated modem bits.\r
	335	\r
	336	func_tiocmbic:\r
337	\r
338	;--------------------------------------------------------------\r
339	; set the status of modem bits.\r
340	\r
341	func_tiocmset:\r
342	\r
343	;--------------------------------------------------------------\r
344	; Get the status of the CLOCAL flag in the c_cflag field\r
345	\r
346	func_tiocgsoftcar:\r
347	\r
348	;--------------------------------------------------------------\r
349	; Set the CLOCAL flag when *argp is nonzero, and clear it otherwise.\r
350	\r
351	func_tiocssoftcar:\r
352	\r
353	or 0ffh\r
354	ret\r
355	\r
356	;--------------------------------------------------------------\r
357	\r
99b8d89e L	358	chk_ptr:\r
	359	ld a,e\r
	360	or d\r
	361	ret nz\r
	362	cpl\r
	363	pop hl\r
	364	ret\r
	365	\r
	366	;--------------------------------------------------------------\r
	367	\r
1c7e3963 L	368	asci_stop:\r
	369	ld c,stat0 ;Disable rx/tx interrupts\r
	370	xor a ;\r
	371	call out_asci_reg\r
	372	\r
	373	ld c,cntla0 ;Disable receiver and transmitter\r
	374	ld a,M_RTS0+M_EFR ;RTS/CKA1\r
	375	jr out_asci_reg\r
	376	\r
	377	;--------------------------------------------------------------\r
	378	\r
	379	asci_start:\r
	380	ld c,stat0 ;\r
d6829fd3	381	ld a,M_RIE\r
1c7e3963 L	382	jr out_asci_reg\r
	383	\r
	384	;--------------------------------------------------------------\r
	385	; output to asci0/1 register\r
	386	;\r
	387	; c: register address\r
	388	; a: value\r
	389	;\r
	390	\r
	391	out_asci_reg:\r
	392	push bc\r
99b8d89e L	393	bit 0,(ix+o.reldev)\r
	394	jr z,$+3\r
	395	inc c\r
1c7e3963 L	396	ld b,0\r
	397	out (c),a\r
	398	pop bc\r
d6829fd3 L	399	ret\r
d6829fd3 L	400	\r
99b8d89e L	401	;--------------------------------------------------------------\r
	402	; output 16 bit value to asci0/1 register\r
	403	;\r
	404	; c: register address\r
	405	; hl: value\r
	406	; a destroyed\r
	407	\r
	408	out_asci_reg_hl:\r
	409	ld a,b ;save b\r
	410	bit 0,(ix+o.reldev)\r
	411	jr z,$+4\r
	412	inc c\r
	413	inc c\r
	414	ld b,0\r
	415	out (c),l\r
	416	inc c\r
	417	out (c),h\r
	418	ld b,a\r
	419	ret\r
	420	\r
1c7e3963 L	421	;--------------------------------------------------------------\r
	422	; baud rate divider\r
	423	;\r
	424	; a: index\r
	425	; return\r
	426	; hl: divider\r
	427	\r
	428	as_br_div:\r
	429	push de\r
	430	push bc\r
	431	and 0fh\r
	432	add a,a ;get factor\r
	433	ld hl,bd150_tab\r
	434	call add_hla\r
	435	ld c,(hl)\r
	436	inc hl\r
	437	ld b,(hl)\r
	438	ld hl,(f_cpu)\r
	439	ld de,(f_cpu+2)\r
	440	call div32_r\r
	441	ld bc,32*150\r
	442	call div32_r\r
	443	ld de,2\r
	444	or a\r
	445	sbc hl,de\r
	446	pop bc\r
	447	pop de\r
	448	ret nc\r
	449	ld hl,0\r
	450	ret\r
	451	\r
	452	bd150_tab:\r
	453	; factor index baudrate orig. cp/m\r
	454	dw 19200/150 ; 0 19200 -\r
	455	dw 28800/150 ; 1 28800 50\r
	456	dw 38400/150 ; 2 38400 75\r
	457	dw 57600/150 ; 3 57600 110\r
	458	dw 11520/15 ; 4 115200 134.5\r
	459	dw 150/150 ; 5 150\r
	460	dw 300/150 ; 6 300\r
	461	dw 600/150 ; 7 600\r
	462	dw 1200/150 ; 8 1200\r
	463	dw 1800/150 ; 9 1800\r
	464	dw 2400/150 ;10 2400\r
	465	dw 3600/150 ;11 3600\r
	466	dw 4800/150 ;12 4800\r
	467	dw 7200/150 ;13 7200\r
	468	dw 9600/150 ;14 9600\r
	469	dw 19200/150 ;15 19200\r
	470	\r
	471	\r
	472	;--------------------------------------------------------------\r
	473	\r
	474	if 0\r
	475	\r
	476	initab0:\r
	477	db 1,stat0,0 ;Disable rx/tx interrupts\r
	478	;Enable baud rate generator\r
	479	db 1,asext0,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS\r
	480	db 2,astc0l\r
	481	init_br_off equ $ - initab0\r
	482	dw 28\r
	483	db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
	484	db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
485	db 0\r
486	\r
487	initab1:\r
488	db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
489	db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
490	db 2,astc1l,low 3, high 3\r
491	db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
492	db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
493	db 0\r
494	endif\r
d6829fd3	495	\r
d6829fd3 L	496	;--------------------------------------------------------------\r
	497	\r
	498	dseg\r
6dd88c25	499	asci0_ista:\r
d6829fd3 L	500	push ix\r
	501	ld ix,s0.inbuf ;\r
	502	call ff_empty\r
	503	pop ix\r
	504	ret\r
	505	\r
	506	;--------------------------------------------------------------\r
	507	\r
6dd88c25	508	asci1_ista:\r
d6829fd3 L	509	push ix\r
	510	ld ix,s1.inbuf ;\r
	511	call ff_empty\r
	512	pop ix\r
	513	ret\r
	514	\r
	515	;--------------------------------------------------------------\r
	516	; Get an input character\r
	517	\r
6dd88c25	518	asci0_inp:\r
d6829fd3 L	519	push ix\r
d6829fd3 L	520	ld ix,s0.inbuf ;\r
81ba3c84 L	521	call ff_gech\r
	522	ld a,b\r
	523	cp s0.rx_len/4\r
e827bfb9	524	jr nc,a0i_1\r
5d7663e1 L	525	bit CRTS_IFLOW,(ix+oint.fflags)\r
5d7663e1 L	526	jr z,a0i_1\r
b8ad769f L	527	di\r
b8ad769f L	528	in0 a,(cntla0)\r
46c2044d L	529	and ~M_RTS0 ;assert RTS\r
46c2044d L	530	or M_EFR ;don't reset error flags\r
b8ad769f	531	ei\r
46c2044d	532	out0 (cntla0),a\r
b8ad769f	533	a0i_1:\r
81ba3c84	534	ld a,c\r
d6829fd3 L	535	pop ix\r
	536	ret\r
	537	\r
	538	;--------------------------------------------------------------\r
	539	; Get an input character\r
	540	\r
6dd88c25	541	asci1_inp:\r
d6829fd3 L	542	push ix\r
d6829fd3 L	543	ld ix,s1.inbuf ;\r
81ba3c84	544	call ff_gech\r
d6829fd3 L	545	pop ix\r
	546	ret\r
	547	\r
	548	;--------------------------------------------------------------\r
	549	; Output status\r
	550	\r
6dd88c25	551	asci0_osta:\r
d6829fd3 L	552	push ix\r
	553	ld ix,s0.outbuf ;\r
	554	call ff_full\r
	555	pop ix\r
	556	ret\r
	557	\r
	558	;--------------------------------------------------------------\r
	559	; Output status\r
	560	\r
6dd88c25	561	asci1_osta:\r
d6829fd3 L	562	push ix\r
	563	ld ix,s1.outbuf ;\r
	564	call ff_full\r
	565	pop ix\r
	566	ret\r
	567	\r
	568	;--------------------------------------------------------------\r
	569	; put character in c in buffer\r
	570	; destroys hl, bc\r
	571	; returns output char in a\r
	572	\r
6dd88c25	573	asci0_out:\r
d6829fd3 L	574	push ix ;\r
d6829fd3 L	575	ld ix,s0.outbuf ;\r
81ba3c84 L	576	call ff_puth\r
81ba3c84 L	577	pop ix ;\r
d6829fd3 L	578	di ;\r
	579	in0 c,(stat0) ;\r
	580	set TIE,c ;\r
	581	out0 (stat0),c ;\r
	582	ei ;\r
d6829fd3 L	583	ret\r
	584	\r
	585	;--------------------------------------------------------------\r
	586	; put character in c in buffer\r
	587	; destroys hl, bc\r
	588	; returns output char in a\r
	589	\r
6dd88c25	590	asci1_out:\r
d6829fd3 L	591	push ix ;\r
d6829fd3 L	592	ld ix,s1.outbuf ;\r
81ba3c84 L	593	call ff_puth\r
81ba3c84 L	594	pop ix ;\r
d6829fd3 L	595	di ;\r
	596	in0 c,(stat1) ;\r
	597	set TIE,c ;\r
	598	out0 (stat1),c ;\r
	599	ei ;\r
d6829fd3 L	600	ret\r
	601	\r
	602	\r
6dd88c25 L	603	;--------------------------------------------------------------\r
	604	\r
	605	cseg\r
	606	rtxisvjmp0:\r
	607	call isv_sw\r
5d7663e1 L	608	dw asci0_int\r
5d7663e1 L	609	\r
6dd88c25 L	610	rtxisvjmp1:\r
6dd88c25 L	611	call isv_sw\r
5d7663e1	612	dw asci1_int\r
6dd88c25 L	613	\r
6dd88c25 L	614	;--------------------------------------------------------------\r
5d7663e1 L	615	; ASCI 0/1 Transmit/Receive interupt routines\r
	616	\r
	617	.lall\r
	618	asci_int macro dev\r
	619	local rxi_2,rxi_4\r
d6829fd3	620	\r
46c2044d	621	push ix\r
5d7663e1 L	622	rxtxi&dev&_lp0:\r
	623	ld ix,s&dev&.inbuf ;\r
	624	rxtxi&dev&_lp1:\r
	625	in0 a,(stat&dev) ;receive flag set?\r
	626	jp p,txi&dev ;RDRF == Bit 7\r
6dd88c25 L	627	and M_OVRN+M_PERR+M_FE\r
6dd88c25 L	628	ld e,a\r
81ba3c84	629	\r
5d7663e1	630	in0 a,(asext&dev)\r
46c2044d L	631	and M_BREAK\r
	632	or e\r
	633	ld e,a\r
d6829fd3	634	\r
5d7663e1	635	in0 d,(cntla&dev) ;\r
b8ad769f	636	res EFR,d ;\r
5d7663e1	637	out0 (cntla&dev),d\r
d6829fd3	638	\r
81ba3c84	639	ld c,(ix+o.in_idx) ;\r
d6829fd3	640	ld b,0\r
5d7663e1	641	ld hl,s&dev&.inbuf ;\r
d6829fd3	642	add hl,bc\r
6dd88c25	643	\r
5d7663e1	644	in0 a,(rdr&dev) ;\r
b8ad769f	645	ld (hl),a\r
6dd88c25 L	646	;todo: break detection\r
	647	;todo: parity, framing overrun error\r
	648	\r
1c7e3963	649	ld e,(ix+oint.fflags)\r
6dd88c25	650	bit IXON,e\r
5d7663e1	651	jr z,rxi_2\r
6dd88c25 L	652	;todo: test XON/XOFF\r
6dd88c25 L	653	\r
5d7663e1	654	rxi_2:\r
46c2044d L	655	\r
	656	ld a,c ;increment buffer in pointer\r
	657	inc a ;\r
81ba3c84 L	658	ld b,(ix+o.mask) ;\r
81ba3c84 L	659	and b ;\r
b8ad769f	660	ld c,a\r
81ba3c84 L	661	\r
81ba3c84 L	662	sub (ix+o.out_idx) ;\r
5d7663e1	663	jr z,rxtxi&dev&_lp1 ;skip if buffer is full\r
6dd88c25 L	664	\r
	665	ld (ix+o.in_idx),c ;\r
	666	\r
81ba3c84 L	667	jr nc,$+3 ;\r
81ba3c84 L	668	adc b ;\r
6dd88c25	669	\r
5d7663e1 L	670	cp s&dev&.tx_len*3/4\r
5d7663e1 L	671	jr c,rxi&dev&_noflow\r
6dd88c25	672	\r
5d7663e1	673	if dev=0\r
6dd88c25	674	bit CRTS_IFLOW,e\r
5d7663e1	675	jr z,rxi_4\r
6dd88c25 L	676	\r
	677	set EFR,d\r
	678	set RTS0,d ;RTS inactive\r
5d7663e1 L	679	out0 (cntla&dev),d ;\r
5d7663e1 L	680	endif\r
6dd88c25	681	\r
5d7663e1	682	rxi_4:\r
6dd88c25	683	bit IXOFF,e\r
5d7663e1	684	jr z,rxtxi&dev&_lp1\r
6dd88c25 L	685	;todo: send XOFF\r
6dd88c25 L	686	\r
5d7663e1 L	687	rxi&dev&_noflow:\r
5d7663e1 L	688	jr rxtxi&dev&_lp1\r
81ba3c84	689	\r
d6829fd3	690	\r
5d7663e1	691	txi&dev:\r
6dd88c25	692	ld e,a\r
46c2044d	693	bit TDRE,e ;TX int?\r
5d7663e1 L	694	jr z,rxtxi&dev&_exit\r
	695	\r
	696	;todo: xon/xoff\r
	697	\r
	698	ld hl,s&dev&.outbuf+o.in_idx ;[in]\r
	699	ld a,(hl) ;\r
	700	inc hl ;[out]\r
	701	ld c,(hl) ;\r
	702	cp c ;\r
	703	jr z,txi&dev&_empty ;\r
	704	inc hl ;fifo base\r
	705	ld b,0 ;\r
	706	add hl,bc ;\r
	707	ld a,(hl) ;\r
	708	out0 (tdr&dev),a ;\r
	709	inc c ;\r
	710	ld a,(s&dev&.outbuf+o.mask) ;\r
	711	and c ;\r
	712	ld (s&dev&.outbuf+o.out_idx),a ;\r
d6829fd3	713	\r
5d7663e1	714	jr rxtxi&dev&_lp0\r
81ba3c84	715	\r
5d7663e1	716	txi&dev&_empty:\r
d6829fd3	717	res TIE,e ;disable tx-int\r
5d7663e1	718	out0 (stat&dev),e ; 5\r
46c2044d	719	\r
5d7663e1	720	rxtxi&dev&_exit:\r
d6829fd3 L	721	pop ix\r
d6829fd3 L	722	ret\r
5d7663e1	723	endm\r
d6829fd3 L	724	\r
d6829fd3 L	725	dseg\r
5d7663e1 L	726	;--------------------------------------------------------------\r
5d7663e1 L	727	; ASCI 0 Transmit/Receive interupt routines\r
d6829fd3	728	\r
5d7663e1 L	729	asci0_int:\r
5d7663e1 L	730	asci_int 0\r
d6829fd3	731	\r
5d7663e1 L	732	;--------------------------------------------------------------\r
5d7663e1 L	733	; ASCI 1 Transmit/Receive interupt routines\r
d6829fd3	734	\r
5d7663e1 L	735	asci1_int:\r
5d7663e1 L	736	asci_int 1\r
d6829fd3 L	737	\r
d6829fd3 L	738	end\r