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show cpu clock frequency at startup
[z180-stamp-cpm3.git] / cbios / boot.180
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1 title 'Boot loader module for CP/M 3.0'\r
2\r
3\r
4\r
5 public hwinit,?init,?ldccp,?rlccp\r
6\r
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7 public f_cpu\r
8\r
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9 extrn ?boot,?conin\r
10 extrn pr.inln,pr.crlf,pr.dec,pr.decl\r
f80331a6 11 extrn ioini1l,msginit,mmuinit,intinit,cpu_frq\r
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12 extrn @civec,@covec,@aivec,@aovec,@lovec\r
13 extrn @cbnk,?bnksl\r
14\r
15 include config.inc\r
16 include z180reg.inc\r
17\r
18\r
19bdos equ 5\r
20\r
21ccpsize equ 0c80h\r
22\r
23 if banked\r
24tpa$bank equ 1\r
25 else\r
26tpa$bank equ 0\r
27 endif\r
28\r
29\r
30 dseg ; init done from banked memory\r
31\r
32hwinit:\r
33 ld a,(INIDONE)\r
34 cp INIDONEVAL\r
35 jr z,hwini_skip\r
36 ld hl,hwini_tab\r
37 call ioini1l\r
38 ld a,0c3h\r
39 ld hl,?boot\r
40 ld (0),a\r
41 ld (1),hl\r
42hwini_skip:\r
43 call mmuinit ; setup mmu registers\r
44 call msginit\r
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45 call cpu_frq\r
46 ld (f_cpu),de\r
47 ld (f_cpu+2),hl\r
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48 ret\r
49\r
50?init:\r
51 ld hl,0100000000000000b ; assign console to ASCI1:\r
52 ld (@civec),hl\r
53 ld (@covec),hl\r
54 ld hl,0000000000000000b ; assign printer to nothing:\r
55 ld (@lovec),hl\r
56 ld hl,0100000000000000b ; assign AUX to ASCI0:\r
57 ld (@aivec),hl\r
58 ld (@aovec),hl\r
59\r
60\r
d12d8b38 61 call intinit ; setup interrupts and vectors\r
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62\r
63 xor a\r
d12d8b38 64 ld (@cbnk),a ; right now in bank 0\r
ea5293bb 65\r
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66 call pr.inln ; print signon message\r
67 db 13,10,13,10,'CP/M Version 3.0, Z180-Stamp BIOS',13,10,0\r
68\r
69 call pr.inln\r
70 db 'CPU clock [Hz]: ',0\r
71\r
72 ld de,(f_cpu)\r
73 ld hl,(f_cpu+2)\r
74 call pr.decl\r
75 call pr.crlf\r
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76 ret\r
77\r
78\r
d12d8b38 79 cseg ; boot loading must be done from resident memory\r
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80\r
81; This version of the boot loader loads the CCP from a file\r
82; called CCP.COM on the system drive (A:).\r
83\r
84\r
85?ldccp:\r
86 ; First time, load the A:CCP.COM file into TPA\r
d12d8b38 87 call resetdsk\r
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88 xor a\r
89 ld (ccp$fcb+15),a ; zero extent\r
90 ld hl,0\r
91 ld (fcb$nr),hl ; start at beginning of file\r
92 ld de,ccp$fcb\r
93 call open ; open file containing CCP\r
94 inc a\r
95 jp z,no$ccp ; error if no file...\r
96 ld de,0100h\r
97 call setdma ; start of TPA\r
98 ld de,128\r
99 call setmulti ; allow up to 16k bytes\r
100 ld de,ccp$fcb\r
101 call read ; load the thing\r
102 ; now,\r
103 ; copy CCP to bank 0 for reloading\r
104 ld hl,0100h\r
105 ld bc,ccpsize ; clone 3K, just in case\r
106 ld a,(@cbnk)\r
107 push af ; save current bank\r
108ld$1:\r
109 ld a,tpa$bank\r
110 call ?bnksl ; select TPA\r
111 ld a,(hl)\r
112 push af ; get a byte\r
113 ld a,2\r
114 call ?bnksl ; select extra bank\r
115 pop af\r
116 ld (hl),a ; save the byte\r
117 inc hl\r
118 dec bc ; bump pointer, drop count\r
119 ld a,b\r
120 or c ; test for done\r
121 jp nz,ld$1\r
122 pop af\r
123 call ?bnksl ; restore original bank\r
124 ret\r
125\r
126no$ccp: ; here if we couldn't find the file\r
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127 call pr.inln ; report this...\r
128 db 13,10,'BIOS Err on A: No CCP.COM file',0\r
129\r
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130 call ?conin ; get a response\r
131 jp ?ldccp ; and try again\r
132\r
133\r
134?rlccp:\r
135 ld hl,0100h\r
136 ld bc,ccpsize ; clone 3K\r
137rl$1:\r
138 ld a,2\r
139 call ?bnksl ; select extra bank\r
140 ld a,(hl)\r
141 push af ; get a byte\r
142 ld a,tpa$bank\r
143 call ?bnksl ; select TPA\r
144 pop af\r
145 ld (hl),a ; save the byte\r
146 inc hl\r
147 dec bc ; bump pointer, drop count\r
148 ld a,b\r
149 or c ; test for done\r
150 jp nz,rl$1\r
151 ret\r
152\r
153\r
154 ; CP/M BDOS Function Interfaces\r
155\r
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156resetdsk:\r
157 ld c,13\r
158 jp bdos ; reset disk system\r
159\r
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160open:\r
161 ld c,15\r
162 jp bdos ; open file control block\r
163\r
164setdma:\r
165 ld c,26\r
166 jp bdos ; set data transfer address\r
167\r
168setmulti:\r
169 ld c,44\r
170 jp bdos ; set record count\r
171\r
172read:\r
173 ld c,20\r
174 jp bdos ; read records\r
175\r
176\r
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177\r
178ccp$fcb:db 1,'CCP ','COM',0,0,0,0\r
179 ds 16\r
180fcb$nr: db 0,0,0\r
181\r
182\r
f80331a6 183 dseg\r
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184hwini_tab:\r
185 db (hwini0_e-$)/2 ;count\r
186 db rcr,CREFSH ;configure DRAM refresh\r
187 db dcntl,CWAITIO ;wait states\r
188 db ccr,M_NCD ;No Clock Divide\r
189 db cmr,PHI_X2 ;X2 Clock Multiplier\r
190;TODO: db omr, ;Operation Mode Control Register\r
191hwini0_e:\r
192 db 0 ;stop mark\r
193\r
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194 cseg\r
195f_cpu dw 0,0 ;detected CPU clock frequency [Hz]\r
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196\r
197 end\r