]>
Commit | Line | Data |
---|---|---|
1 | title 'Boot loader module for CP/M 3.0'\r | |
2 | \r | |
3 | \r | |
4 | \r | |
5 | public hwinit,?init,?ldccp,?rlccp\r | |
6 | public signon\r | |
7 | public f_cpu\r | |
8 | \r | |
9 | extrn boot,?conin\r | |
10 | extrn pr.inln,pr.crlf,pr.dec,pr.decl\r | |
11 | extrn ioini1l,msginit,mmuinit,intinit,cpu_frq\r | |
12 | extrn prt0ini,gs_rtc\r | |
13 | extrn @civec,@covec,@aivec,@aovec,@lovec\r | |
14 | extrn @cbnk,?move,?xmove\r | |
15 | \r | |
16 | maclib z180reg.inc\r | |
17 | maclib config.inc\r | |
18 | maclib version.inc\r | |
19 | \r | |
20 | \r | |
21 | ccpsize equ 0c80h\r | |
22 | \r | |
23 | ; CP/M BDOS Function Interfaces\r | |
24 | \r | |
25 | resetdsk equ 13\r | |
26 | open equ 15\r | |
27 | read equ 20\r | |
28 | setdma equ 26\r | |
29 | setmulti equ 44\r | |
30 | bdos equ 5\r | |
31 | \r | |
32 | \r | |
33 | if banked\r | |
34 | tpa$bank equ 1\r | |
35 | else\r | |
36 | tpa$bank equ 0\r | |
37 | endif\r | |
38 | \r | |
39 | \r | |
40 | dseg ; init done from banked memory\r | |
41 | \r | |
42 | hwinit:\r | |
43 | ld a,(INIDONE)\r | |
44 | cp INIDONEVAL\r | |
45 | jr z,hwini_skip\r | |
46 | ld hl,hwini_tab\r | |
47 | call ioini1l\r | |
48 | ld a,0c3h\r | |
49 | ld hl,boot\r | |
50 | ld (0),a\r | |
51 | ld (1),hl\r | |
52 | hwini_skip:\r | |
53 | call msginit\r | |
54 | call cpu_frq\r | |
55 | ld (f_cpu),hl\r | |
56 | ld (f_cpu+2),de\r | |
57 | call intinit ; setup interrupts and vectors\r | |
58 | ret\r | |
59 | \r | |
60 | ?init:\r | |
61 | ; ld hl,1000000000000000b ; assign console to AVRCON:\r | |
62 | ld hl,0010000000000000b ; assign console to ASCI1:\r | |
63 | ld (@civec),hl\r | |
64 | ld (@covec),hl\r | |
65 | ld hl,0000000000000000b ; assign printer to nothing:\r | |
66 | ld (@lovec),hl\r | |
67 | ld hl,0100000000000000b ; assign AUX to ASCI0:\r | |
68 | ld (@aivec),hl\r | |
69 | ld (@aovec),hl\r | |
70 | \r | |
71 | \r | |
72 | call prt0ini ; init timer\r | |
73 | ei\r | |
74 | ld c,2\r | |
75 | call gs_rtc ; get time and date\r | |
76 | \r | |
77 | xor a\r | |
78 | ld (@cbnk),a ; right now in bank 0\r | |
79 | \r | |
80 | call pr.inln ; print signon message\r | |
81 | signon:\r | |
82 | db 13,10,13,10,'CP/M Version 3.0, Z180-Stamp BIOS v'\r | |
83 | defvers\r | |
84 | db 13,10\r | |
85 | db 'Estimated CPU clock [Hz]: ',0\r | |
86 | \r | |
87 | ld hl,(f_cpu)\r | |
88 | ld de,(f_cpu+2)\r | |
89 | call pr.decl\r | |
90 | call pr.crlf\r | |
91 | ret\r | |
92 | \r | |
93 | \r | |
94 | cseg ; boot loading must be done from resident memory\r | |
95 | \r | |
96 | ; This version of the boot loader loads the CCP from a file\r | |
97 | ; called CCP.COM on the system drive (A:).\r | |
98 | \r | |
99 | ; First time, load the A:CCP.COM file into TPA\r | |
100 | ?ldccp:\r | |
101 | ld c,resetdsk\r | |
102 | call bdos\r | |
103 | xor a\r | |
104 | ld (ccp$fcb+15),a ; zero extent\r | |
105 | ld hl,0\r | |
106 | ld (fcb$nr),hl ; start at beginning of file\r | |
107 | ld de,ccp$fcb\r | |
108 | ld c,open ; open file containing CCP\r | |
109 | call bdos\r | |
110 | inc a\r | |
111 | jp z,no$ccp ; error if no file...\r | |
112 | ld de,0100h\r | |
113 | ld c,setdma ; start of TPA\r | |
114 | call bdos\r | |
115 | ld de,128\r | |
116 | ld c,setmulti ; allow up to 16k bytes\r | |
117 | call bdos\r | |
118 | ld de,ccp$fcb\r | |
119 | ld c,read ; load the thing\r | |
120 | call bdos ; read records\r | |
121 | \r | |
122 | ; now, copy CCP to bank 0 for reloading\r | |
123 | \r | |
124 | ld bc,2*256 + tpa$bank ; c: src$bnk, b: dst$bnk\r | |
125 | jr mov_ccp\r | |
126 | \r | |
127 | ; just copy in the other direction\r | |
128 | ?rlccp:\r | |
129 | ld bc,tpa$bank*256 + 2 ; c: src$bnk, b: dst$bnk\r | |
130 | mov_ccp:\r | |
131 | call ?xmove\r | |
132 | ld hl,0100h\r | |
133 | ld d,h\r | |
134 | ld e,l\r | |
135 | ld bc,ccpsize ; clone 3K, just in case\r | |
136 | call ?move\r | |
137 | ret\r | |
138 | \r | |
139 | no$ccp: ; here if we couldn't find the file\r | |
140 | call pr.inln ; report this...\r | |
141 | db 13,10,'BIOS Err on A: No CCP.COM file',0\r | |
142 | \r | |
143 | call ?conin ; get a response\r | |
144 | jr ?ldccp ; and try again\r | |
145 | \r | |
146 | \r | |
147 | ccp$fcb:db 1,'CCP ','COM',0,0,0,0\r | |
148 | ds 16\r | |
149 | fcb$nr: db 0,0,0\r | |
150 | \r | |
151 | \r | |
152 | dseg\r | |
153 | hwini_tab:\r | |
154 | db (hwini0_e-$)/2 ;count\r | |
155 | db rcr,CREFSH ;configure DRAM refresh\r | |
156 | db dcntl,CWAITIO ;wait states\r | |
157 | db ccr,M_NCD ;No Clock Divide\r | |
158 | db cmr,PHI_X2 ;X2 Clock Multiplier\r | |
159 | db omcr,~M_IOC ;Operation Mode Control Register\r | |
160 | hwini0_e:\r | |
161 | db 0 ;stop mark\r | |
162 | \r | |
163 | cseg\r | |
164 | f_cpu dw 0,0 ;detected CPU clock frequency [Hz]\r | |
165 | \r | |
166 | end\r |