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Commit | Line | Data |
---|---|---|
1 | \r | |
2 | public as_init\r | |
3 | \r | |
4 | extrn ioiniml\r | |
5 | extrn f_cpu,add_hla,div32_r\r | |
6 | extrn @ctbl\r | |
7 | \r | |
8 | maclib z180reg.inc\r | |
9 | maclib config.inc\r | |
10 | \r | |
11 | \r | |
12 | ;--------------------------------------------------------------\r | |
13 | ; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r | |
14 | ;\r | |
15 | ; Clock_mode == 16\r | |
16 | ; TC = (f PHI / (32 * baudrate)) - 2\r | |
17 | ;\r | |
18 | ; br150 = baudrate/150\r | |
19 | ; TC = (f PHI / (32 * 150 * br150)) - 2\r | |
20 | ; TC = (f PHI / (32 * 150 * br150)) - 2\r | |
21 | \r | |
22 | \r | |
23 | ;--------------------------------------------------------------\r | |
24 | ; Init Serial I/O for console input and output (ASCI1)\r | |
25 | ;\r | |
26 | ; b: device number (0..15)\r | |
27 | ; c: asci channel number (0/1)\r | |
28 | \r | |
29 | dseg\r | |
30 | as_init:\r | |
31 | ld de,initab0\r | |
32 | dec c\r | |
33 | jr nz,$+5\r | |
34 | ld de,initab1\r | |
35 | \r | |
36 | ld c,8 ;\r | |
37 | mlt bc ;\r | |
38 | ld hl,@ctbl+7 ;get baudrate index\r | |
39 | add hl,bc ;\r | |
40 | ld a,(hl)\r | |
41 | call as_br_div\r | |
42 | ld b,h\r | |
43 | ld c,l\r | |
44 | ld hl,init_br_off\r | |
45 | add hl,de\r | |
46 | ld (hl),c\r | |
47 | inc hl\r | |
48 | ld (hl),b\r | |
49 | ex de,hl\r | |
50 | jp ioiniml\r | |
51 | \r | |
52 | \r | |
53 | as_br_div:\r | |
54 | push de\r | |
55 | push bc\r | |
56 | and 0fh\r | |
57 | add a,a ;get factor\r | |
58 | ld hl,bd150_tab\r | |
59 | call add_hla\r | |
60 | ld c,(hl)\r | |
61 | inc hl\r | |
62 | ld b,(hl)\r | |
63 | ld hl,(f_cpu)\r | |
64 | ld de,(f_cpu+2)\r | |
65 | call div32_r\r | |
66 | ld bc,32*150\r | |
67 | call div32_r\r | |
68 | ld de,2\r | |
69 | or a\r | |
70 | sbc hl,de\r | |
71 | pop bc\r | |
72 | pop de\r | |
73 | ret nc\r | |
74 | ld hl,0\r | |
75 | ret\r | |
76 | \r | |
77 | bd150_tab:\r | |
78 | ; factor index baudrate orig. cp/m\r | |
79 | dw 19200/150 ; 0 19200 -\r | |
80 | dw 28800/150 ; 1 28800 50\r | |
81 | dw 38400/150 ; 2 38400 75\r | |
82 | dw 57600/150 ; 3 57600 110\r | |
83 | dw 11520/15 ; 4 115200 134.5\r | |
84 | dw 150/150 ; 5 150\r | |
85 | dw 300/150 ; 6 300\r | |
86 | dw 600/150 ; 7 600\r | |
87 | dw 1200/150 ; 8 1200\r | |
88 | dw 1800/150 ; 9 1800\r | |
89 | dw 2400/150 ;10 2400\r | |
90 | dw 3600/150 ;11 3600\r | |
91 | dw 4800/150 ;12 4800\r | |
92 | dw 7200/150 ;13 7200\r | |
93 | dw 9600/150 ;14 9600\r | |
94 | dw 19200/150 ;15 19200\r | |
95 | \r | |
96 | \r | |
97 | \r | |
98 | \r | |
99 | initab0:\r | |
100 | db 1,stat0,0 ;Disable rx/tx interrupts\r | |
101 | ;Enable baud rate generator\r | |
102 | db 1,asext0,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS\r | |
103 | db 2,astc0l\r | |
104 | init_br_off equ $ - initab0\r | |
105 | dw 28\r | |
106 | db 1,cntlb0,M_MPBT ;No MP Mode, X16\r | |
107 | db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r | |
108 | db 0\r | |
109 | \r | |
110 | initab1:\r | |
111 | db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r | |
112 | db 1,asext1,M_BRGMOD ;Enable baud rate generator\r | |
113 | db 2,astc1l,low 3, high 3\r | |
114 | db 1,cntlb1,M_MPBT ;No MP Mode, X16\r | |
115 | db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r | |
116 | db 0\r | |
117 | \r | |
118 | end\r |