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1 page 255

2 .z80

5 public mmuinit

6 public bnk2log,bnk2phy,hwl2phy,phy2log

7 public isv_sw

8 public b_ld_a,b_ld_hl,b_st_a,b_st_hl

11 extrn @cbnk

12 extrn ijphl

15 maclib z180reg.inc

16 maclib config.inc

19 ;----------------------------------------------------------------------

20 ; Memory Map 1:

21 ;

22 ; Common CAStart .. 0FFFF

23 ; Bank 0 00000 .. CAStart-1

24 ; Bank 1 10000 ..

25 ; Bank 2

26 ;

27 ; Memory Map 2:

28 ;

29 ; Common 18000 .. 1BFFF BANK1

30 ;

31 ; Bank 0 00000 .. 0BFFF 0

32 ; Bank 1 0C000 .. 17FFF 1*BNK_SIZE

33 ; Bank 2 1C000 .. 27FFF 2*BNK_SIZE + CMN_SIZE

34 ; Bank 3 28000 .. 33FFF 3*BNK_SIZE + CMN_SIZE

35 ; Bank n n*BNK_SIZE + (n < 2) ? 0 : CMN_SIZE

36 ;

37 ;----------------------------------------------------------------------

39 cseg

41 mmuinit:

42 ld a,USR$CBAR

43 out0 (cbar),a

44 ret

46 ;--------------------------------------------------------------------

47 ; Return the BBR value for the given bank number

48 ;

49 ; in a: Bank number

50 ; out a: bbr value

52 if 0 ; Memory Map 1

54 bnk2log:

55 or a ;

56 ret z ; Bank 0 is at physical address 0

58 dec a ;

59 push bc ;

60 ld c,a ;

61 ld b,BNK_SIZE ;

62 mlt bc ; bank size * bank number

63 ld a,c ;

64 add a,10h ; add bank0 + common

65 pop bc ;

66 ret ;

68 else ; Memory Map 2

70 bnk2log:

71 or a

72 ret z ; Bank 0 is at physical address 0

74 push bc

75 ld c,a ;

76 ld b,BNK_SIZE ;

77 mlt bc ; bank size * bank number

78 cp 2 ;

79 ld a,c ;

80 pop bc

81 ret c

82 add a,CMN_SIZE

83 ret

85 endif

87 if 0 ; table version

89 push hl

90 ld hl,bnk_table ;

91 add a,l ;

92 ld l,a ;

93 jr nc,$+3 ;

94 inc h ;

95 ld a,(hl) ;

96 pop hl

97 ret

99 endif

100

101 ;--------------------------------------------------------------

102

103 ;in hl: Log. Address

104 ; a: Bank number

105 ;

106 ;out ahl: Phys. (linear) Address

107

108

109 bnk2phy:

110 push bc

111 ld c,a

112 ld a,h

113 and a,0f0h

114 cp CA*16

115 ld a,c

116 pop bc

117 jr c,b2p_banked

118 ; address is in common

119 if 0 ; Memory Map 1

120 ld a,0 ; base is 0

121 else ; Memory Map 2

122 ld a,1 ; same as bank1

123 endif

124

125 b2p_banked:

126 call bnk2log ; get address base

127

128 ; fall thru

129

130 ;--------------------------------------------------------------

131 ;

132 ; hl: Log. Address

133 ; a: Bank base (bbr)

134 ;

135 ; 2 0 0

136 ; 0 6 8 0

137 ; hl hhhhhhhhllllllll

138 ; a + bbbbbbbb

139 ;

140 ; OP: ahl = (a<<12) + (h<<8) + l

141 ;

142 ;out ahl: Phys. (linear) Address

143

144 log2phy:

145 push bc ;

146 l2p_i:

147 ld c,a ;

148 ld b,16 ;

149 mlt bc ; bc = a<<4

150 ld a,c ;

151 add a,h ;

152 ld h,a ;

153 ld a,b ;

154 adc a,0 ;

155 pop bc ;

156 ret ;

157

158 ;--------------------------------------------------------------

159 ;

160 ; hl: Log. Address

161 ;

162 ;

163 ; OP: ahl = (bankbase<<12) + (h<<8) + l

164 ;

165 ;out ahl: Phys. (linear) Address

166

167

168 hwl2phy:

169 push bc ;

170 in0 c,(cbar) ;

171 ld a,h ;

172 or 00fh ; log. addr in common1?

173 cp c

174 jr c,hlp_1

175

176 in0 a,(cbr) ; yes, cbr is address base

177 jr hl2p_x

178 hlp_1:

179 ld b,16 ; log. address in baked area?

180 mlt bc

181 ld a,h

182 cp c

183 jr c,hlp_2

184 in0 a,(bbr) ; yes, bbr is address base

185 jr hl2p_x

186 hlp_2:

187 xor a ; common1

188 hl2p_x:

189 jr nz,l2p_i

190

191 pop bc ; bank part is 0, no translation

192 ret ;

193

194

195 ;--------------------------------------------------------------

196 ; return logical bank 0 address for given physical address.

197 ;

198 ; in: ahl: pyhsical addres (20 bit)

199 ; out hl: logical address.

200 ; logical address is in bank 0 or common, no bank number returned

201 ;

202

203 phy2log:

204 or a

205 ret z

206

207 push bc

208 push hl

209 ld l,h

210 ld h,0

211 ld bc,-16*SYS$CBR

212 add hl,bc

213 ld h,l

214 pop bc

215 ld l,c

216 pop bc

217 ret

218

219 ;--------------------------------------------------------------

220 ; Trampoline for routines in banked ram.

221 ; Switch stack pointer to "system" stack in top ram

222 ; Save cbar

223 ;

224 ; HL: function pointer

225 ;

226 cseg ; common!

227

228 public _b0hlcall

229 _b0hlcall:

230 ld (b0_save_r),hl

231

232 ld hl,bs$stack-bs$stack$size

233 ld a,h

234 dec a

235 ld hl,0

236 add hl,sp ;

237 cp h

238 jr c,$ + 5 ;skip if stack allready in common bios ram

239 ld sp,bs$stack ;

240

241 push hl ;save user stack pointer

242

243 in0 h,(bbr) ;

244 push hl ;

245 ld hl,b0hlc_ret

246 push hl

247 xor a

248 out0 (bbr),a ;

249 ld hl,(b0_save_r)

250 jp (hl)

251 b0hlc_ret:

252 ld (b0_save_r),hl

253

254 pop hl ;

255 out0 (bbr),h ;

256 pop hl ;

257 ld sp,hl ;

258 ld hl,(b0_save_r)

259 ret ;

260

261

262 b0_save_r: dw 0

263

264 ;--------------------------------------------------------------------

265 ; Trampoline for interrupt routines in banked ram.

266 ; Switch stack pointer to "system" stack in top ram

267 ; Save bbr

268

269 cseg

270

271 if 0

272

273 isv_sw: ;

274 ex (sp),hl ;save hl, 'return adr' in hl

275 push de ;

276 push af ;

277 ex de,hl ;'return address' in de

278

279 if 0

280 if 0 ; link80

281

282 ld hl,0

283 add hl,sp ;

284 ld a,h

285 cp high (bs$stack-bs$stack$size) ;link80 can't process this

286 jr nc,$ + 5 ;skip if stack allready in common bios ram

287

288 else

289

290 ld hl,bs$stack-bs$stack$size

291 ld a,h

292 dec a

293 ld hl,0

294 add hl,sp ;

295 cp h

296 jr c,$ + 5 ;skip if stack allready in common bios ram

297 endif

298 ld sp,bs$stack ;

299 else

300 ld hl,0

301 add hl,sp

302 ld sp,istack

303 endif

304 push hl ;save user stack pointer

305 in0 h,(bbr) ;

306 push hl ;

307 xor a ;

308 out0 (bbr),a ;

309 ex de,hl ;

310 ld e,(hl) ;

311 inc hl ;

312 ld d,(hl) ;

313 ex de,hl ;

314 push bc ;

315 call ijphl ;

316

317 pop bc ;

318 pop hl ;

319 out0 (bbr),h ;

320 pop hl ;

321 ld sp,hl ;

322 pop af ;

323 pop de ;

324 pop hl ;

325 ei ;

326 ret ;

327

328 else

329

330 isv_sw: ;

331 ex (sp),hl ;save hl, 'return adr' in hl

332

333 ld (i$stack),sp ;save user stack pointer

334 ld sp,i$stack

335 push de ;

336 push bc ;

337 push af ;

338 in0 a,(bbr) ;

339 push af ;

340 xor a ;

341 out0 (bbr),a ;

342 ld e,(hl) ;

343 inc hl ;

344 ld d,(hl) ;

345 ex de,hl ;

346 call ijphl ;

347

348 pop af ;

349 out0 (bbr),a ;

350 pop af ;

351 pop bc ;

352 pop de ;

353 ld sp,(i$stack) ;

354 pop hl ;

355 ei ;

356 ret ;

357

358 endif

359

360 public i$stack

361 rept 24

362 db '|'

363 endm

364 i$stack:

365 dw 0

366

367 dseg

368

369 ;--------------------------------------------------------------------

370 ; Load byte/word from user ram

371 ;

372 ; de: src address in users bank

373 ; return

374 ; a: value (byte)

375 ; hl: value (word)

376

377 b_ld_a:

378 push hl

379 or a ; clear carry == byte store

380 jr $+3

381 b_ld_hl:

382 scf ; set carry == word store

383 push af ; save flag

384 push hl ; make space on stack

385

386 ld a,(@cbnk)

387 ld b,a ; b = src bank

388

389 ld hl,0

390 ld a,l

391 ld c,l ; c = dst bank (0)

392 add hl,sp ; hl = dst

393 adc a,1 ; a = count

394 ex de,hl

395 call dma_move

396 ex de,hl

397 pop hl

398 pop af

399 ret c

400 ld a,l

401 pop hl

402 ret

403

404 ;--------------------------------------------------------------------

405 ; Store byte/word to user ram

406 ;

407 ; de: dst address in users bank

408 ; a: value (byte)

409 ; hl: value (word)

410

411 b_st_a:

412 push hl

413 ld l,a

414 or a ; clear carry == byte store

415 jr $+3

416 b_st_hl:

417 scf ; set carry == word store

418 push af ; save flag

419 push hl ; put value on stack

420

421 ld a,(@cbnk) ;

422 ld c,a ; c = dst bank

423 ld a,0

424 ld l,a

425 ld h,a

426 ld b,a ; b = src bank (0)

427 add hl,sp ; hl = src

428 adc a,1 ; a = count

429

430 call dma_move

431

432 pop hl ; restore value

433 pop af ; carry

434 ret c

435 pop hl

436 ret

437

438 ;--------------------------------------------------------------------

439 ;

440 ; hl: src

441 ; de: dst

442 ; b: src bank

443 ; c: dst bank

444 ; a: count

445

446 dma_move:

447 out0 (bcr0l),a ; setup DMA count

448 xor a

449 out0 (bcr0h),a

450

451 push hl

452 ld a,b

453 call bnk2phy

454 out0 (sar0l),l ; setup DMA src address

455 out0 (sar0h),h

456 out0 (sar0b),a

457

458 ld l,e

459 ld h,d

460 ld a,c

461 call bnk2phy

462 out0 (dar0l),l ; setup DMA dst address

463 out0 (dar0h),h

464 out0 (dar0b),a

465

466 ld a,M_MMOD ; DMA burst mode

467 out0 (dmode),a

468 ld a,M_DE0+M_NDWE1 ; enable DMA0

469 out0 (dstat),a ; move ...

470 pop hl

471 ret

472

473

474 ;====================================================================

475

476 cseg

477

478 if 0

479

480 ;--------------------------------------------------------------------

481 ; Return the BBR value for the given bank number

482

483 bnk2bbr:

484 or a ; 4

485 ret z ; 5/10 | 11 14

486

487 push bc ;11 | 11

488 ld b,a ; 4

489 ld c,CA ; 6

490 mlt bc ;17 >45

491 ld a,c ; 4

492 add a,10h ; 6

493 pop bc ; 9 | 10

494 ret ; 9 | 10 76

495

496 push ix ;2 / 14 | 15

497 ld ix,bnktbl ;4 / 12 | 14

498 ld ($+3+2),a ;3 / 15 | 19

499 ld a,(ix+0) ;3 / 14 | 19

500 pop ix ;2 / 12 | 14

501 ret ;1 / 9 | 10 15 / 76|91

502

503 push hl ;1 / 11 | 11

504 ld hl,bnktbl ;3 / 9 | 10

505 add a,l ;1 / 4 | 4

506 ld l,a ;1 / 4 | 4

507 ld a,0 ;1 / 6 | 7

508 adc a,h ;1 / 4 | 4

509 ld h,a ;1 / 4 | 4

510 ld a,(hl) ;1 / 6 | 7

511 pop hl ;1 / 9 | 10

512 ret ;1 / 9 | 10 12 / 66|71

513

514 push hl ;1 / 11 | 11

515 add a,low bnktbl ;2 / 6 | 7

516 ld l,a ;1 / 4 | 4

517 ld a,0 ;1 / 6 | 7

518 adc a,high bnktbl ;2 / 6 | 7

519 ld h,a ;1 / 4 | 4

520 ld a,(hl) ;1 / 6 | 7

521 pop hl ;1 / 9 | 10

522 ret ;1 / 9 | 10 11 / 61|67

523

524 endif

525

526

527 cseg

528 public bs$stack

529

530 rept bs$stack$size

531 db '|'

532 endm

533 bs$stack:

534 dw 0

535

536 end