\r
; Simple polling drivers for ASCI0 and ASCI1\r
\r
- extrn ioiniml\r
\r
global as0init\r
global as0ista,as0inp\r
global as1ista,as1inp\r
global as1osta,as1out\r
\r
+ extrn as_init\r
\r
- extrn f_cpu,add_hla,div32_r\r
- extrn @ctbl\r
\r
include config.inc\r
include z180reg.inc\r
\r
+ dseg\r
\r
;--------------------------------------------------------------\r
-; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r
+; Init Serial I/O for input and output (ASCI 0/1)\r
;\r
-; Clock_mode == 16\r
-; TC = (f PHI / (32 * baudrate)) - 2\r
+; b: device number\r
;\r
-; br150 = baudrate/150\r
-; TC = (f PHI / (32 * 150 * br150)) - 2\r
-; TC = (f PHI / (32 * 150 * br150)) - 2\r
\r
\r
-;\r
-; Init Serial I/O for console input and output (ASCI1)\r
-;\r
-\r
- dseg\r
-\r
as0init:\r
- ld hl,initab0\r
- jr as_init\r
+ ld c,0 ;asci channel number\r
+ jp as_init\r
+\r
as1init:\r
- ld hl,initab1\r
-as_init:\r
- push hl\r
-\r
- ld c,8 ;\r
- mlt bc ;\r
- ld hl,@ctbl+7 ;get baudrate index\r
- add hl,bc ;\r
- ld a,(hl)\r
- and 0fh\r
- add a,a ;get factor\r
- ld hl,bd150_tab\r
- call add_hla\r
- ld c,(hl)\r
- inc hl\r
- ld b,(hl)\r
- ld hl,(f_cpu)\r
- ld de,(f_cpu+2)\r
- call div32_r\r
- ld bc,32*150\r
- call div32_r\r
- ld de,2\r
- or a\r
- sbc hl,de\r
- jr nc,as_ini_1\r
- ld hl,0\r
-as_ini_1:\r
- ld b,h\r
- ld c,l\r
- pop de\r
- ld hl,init_br_off\r
- add hl,de\r
- ld (hl),c\r
- inc hl\r
- ld (hl),b\r
- ex de,hl\r
- jp ioiniml\r
-\r
-\r
-bd150_tab:\r
-; factor index baudrate orig. cp/m\r
- dw 19200/150 ; 0 19200 -\r
- dw 28800/150 ; 1 28800 50\r
- dw 38400/150 ; 2 38400 75\r
- dw 57600/150 ; 3 57600 110\r
- dw 11520/15 ; 4 115200 134.5\r
- dw 150/150 ; 5 150\r
- dw 300/150 ; 6 300\r
- dw 600/150 ; 7 600\r
- dw 1200/150 ; 8 1200\r
- dw 1800/150 ; 9 1800\r
- dw 2400/150 ;10 2400\r
- dw 3600/150 ;11 3600\r
- dw 4800/150 ;12 4800\r
- dw 7200/150 ;13 7200\r
- dw 9600/150 ;14 9600\r
- dw 19200/150 ;15 19200\r
-\r
-\r
-\r
-\r
-initab0:\r
- db 1,stat0,0 ;Disable rx/tx interrupts\r
- ;Enable baud rate generator\r
- db 1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS\r
- db 2,astc0l\r
-init_br_off equ $ - initab0\r
- dw 28\r
- db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
- db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
- db 0\r
-\r
-initab1:\r
- db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
- db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
- db 2,astc1l,low 3, high 3\r
- db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
- db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
- db 0\r
+ ld c,1 ;asci channel number\r
+ jp as_init\r
\r
\r
;--------------------------------------------------------------\r
\r
- dseg\r
-\r
as0ista:\r
in0 a,(stat0)\r
and M_RDRF\r