+;--------------------------------------------------------------
+; return logical bank 0 address for given physical address.
+;
+; in: ahl: pyhsical addres (20 bit)
+; out hl: logical address.
+; logical address is in bank 0 or common, no bank number returned
+;
+
+phy2log:
+ or a
+ ret z
+
+ push bc
+ push hl
+ ld l,h
+ ld h,0
+ ld bc,-16*SYS$CBR
+ add hl,bc
+ ld h,l
+ pop bc
+ ld l,c
+ pop bc
+ ret
+
+;--------------------------------------------------------------
+; Trampoline for routines in banked ram.
+; Switch stack pointer to "system" stack in top ram
+; Save cbar
+;
+ extrn bs$stack
+
+ cseg ; common!
+
+ public _b0call
+_b0call:
+ push af
+ in0 a,(bbr)
+ jr nz,b0c_doit
+ pop af
+
+ ex (sp),hl ;16
+ push de
+ ld e,(hl)
+ inc hl
+ ld d,(hl)
+ inc hl
+ ld (b0c_fast_go),de
+ pop de
+ ex (sp),hl ;16
+b0c_fast_go equ $+1
+ jp 0
+
+b0c_doit:
+ ld (b0_save_hl),hl
+ ld (b0_save_de),de
+ pop hl
+ ld (b0_save_af),hl
+
+ pop de ;get ptr to 'function address' in de
+ ld hl,2
+ add hl,de
+ push hl ;put return address on stack
+
+ if 0 ; link80
+
+ ld hl,0
+ add hl,sp ;
+ ld a,h
+ cp high (bs$stack-bs$stack$size) ;link80 can't process this
+ jr nc,$ + 5 ;skip if stack allready in common bios ram
+
+ else
+
+ ld hl,bs$stack-bs$stack$size
+ ld a,h
+ dec a
+ ld hl,0
+ add hl,sp ;
+ cp h
+ jr c,$ + 5 ;skip if stack allready in common bios ram
+ endif
+ ld sp,bs$stack ;
+
+ push hl ;save user stack pointer
+
+ in0 h,(bbr) ;
+ push hl ;
+ ld hl,b0c_ret
+ push hl
+ xor a
+ out0 (bbr),a ;
+ ex de,hl ;ptr
+ ld e,(hl) ;get 'function address'
+ inc hl ;
+ ld d,(hl) ;
+ push de ;put on (switched) stack
+
+ ld hl,(b0_save_af) ;get back users registers
+ push hl
+ pop af
+ ld de,(b0_save_de)
+ ld hl,(b0_save_hl)
+ ret ;go to function
+b0c_ret:
+ ld (b0_save_hl),hl
+
+ pop hl ;
+ out0 (bbr),h ;
+ pop hl ;
+ ld sp,hl ;
+ ld hl,(b0_save_hl)
+ ret ;
+
+
+b0_save_hl: dw 0
+b0_save_de: dw 0
+b0_save_af: dw 0
+
+
+