\r
\r
public hwinit,?init,?ldccp,?rlccp\r
-\r
public f_cpu\r
\r
extrn boot,?conin\r
extrn @civec,@covec,@aivec,@aovec,@lovec\r
extrn @cbnk,?move,?xmove\r
\r
- include config.inc\r
- include z180reg.inc\r
+ maclib z180reg.inc\r
+ maclib config.inc\r
+ maclib version.inc\r
\r
\r
ccpsize equ 0c80h\r
dseg ; init done from banked memory\r
\r
hwinit:\r
- ld a,(INIDONE)\r
- cp INIDONEVAL\r
- jr z,hwini_skip\r
ld hl,hwini_tab\r
call ioini1l\r
ld a,0c3h\r
ld hl,boot\r
ld (0),a\r
ld (1),hl\r
-hwini_skip:\r
call msginit\r
call cpu_frq\r
ld (f_cpu),hl\r
ld (f_cpu+2),de\r
+ call intinit ; setup interrupts and vectors\r
ret\r
\r
?init:\r
; ld hl,1000000000000000b ; assign console to AVRCON:\r
- ld hl,0100000000000000b ; assign console to ASCI0:\r
+ ld hl,0010000000000000b ; assign console to ASCI1:\r
ld (@civec),hl\r
ld (@covec),hl\r
ld hl,0000000000000000b ; assign printer to nothing:\r
ld (@lovec),hl\r
- ld hl,0100000000000000b ; assign AUX to ASCI0:\r
+ ld hl,0000000000000000b ; assign AUX to ASCI0:\r
ld (@aivec),hl\r
ld (@aovec),hl\r
\r
\r
- call intinit ; setup interrupts and vectors\r
call prt0ini ; init timer\r
ei\r
ld c,2\r
ld (@cbnk),a ; right now in bank 0\r
\r
call pr.inln ; print signon message\r
- db 13,10,13,10,'CP/M Version 3.0, Z180-Stamp BIOS',13,10,0\r
-\r
- call pr.inln\r
- db 'Estimated CPU clock [Hz]: ',0\r
+ db 13,10,13,10,'CP/M Version 3.1, Z180-Stamp BIOS v'\r
+ defvers\r
+ db 13,10\r
+ dc 'Estimated CPU clock [Hz]: '\r
\r
ld hl,(f_cpu)\r
ld de,(f_cpu+2)\r
\r
; now, copy CCP to bank 0 for reloading\r
\r
- ld bc,2*256 + tpa$bank ; c: src$bnk, b: dst$bnk\r
+ ld bc,2*256 + tpa$bank ; b: dst$bnk, c: src$bnk\r
jr mov_ccp\r
\r
; just copy in the other direction\r
?rlccp:\r
- ld bc,tpa$bank*256 + 2 ; c: src$bnk, b: dst$bnk\r
+ ld bc,tpa$bank*256 + 2 ; b: dst$bnk, c: src$bnk\r
mov_ccp:\r
call ?xmove\r
ld hl,0100h\r
\r
no$ccp: ; here if we couldn't find the file\r
call pr.inln ; report this...\r
- db 13,10,'BIOS Err on A: No CCP.COM file',0\r
+ dc 13,10,'BIOS Err on A: No CCP.COM file'\r
\r
call ?conin ; get a response\r
jr ?ldccp ; and try again\r
db dcntl,CWAITIO ;wait states\r
db ccr,M_NCD ;No Clock Divide\r
db cmr,PHI_X2 ;X2 Clock Multiplier\r
-;TODO: db omr, ;Operation Mode Control Register\r
+ db omcr,~M_IOC ;Operation Mode Control Register\r
hwini0_e:\r
db 0 ;stop mark\r
\r