di\r
set TDC1,(ix+oint.stat) ;\r
in0 a,(stat1) ;\r
- or M_TIE, ;\r
+ or M_TIE ;\r
out0 (stat1),a ;\r
ei\r
a1i_2:\r
local rxi_2,rxi_3\r
\r
push ix\r
-rxtxi&dev&_lp0:\r
ld ix,s&dev&.inbuf ;\r
+ ld d,(ix+oint.fflags)\r
rxtxi&dev&_lp1:\r
- in0 a,(stat&dev) ;receive flag set?\r
+ in0 e,(stat&dev) ;get asci status\r
jp p,txi&dev ;RDRF == Bit 7\r
- and M_OVRN+M_PERR+M_FE\r
- ld e,a\r
\r
- in0 a,(asext&dev)\r
+ ; RX Interrupt\r
+\r
+ res BREAK,e\r
+ in0 a,(asext&dev) ;get break status\r
and M_BREAK\r
- or e\r
+ or e ;merge to other error flags\r
ld e,a\r
\r
- in0 d,(cntla&dev) ;\r
- res EFR,d ;\r
- out0 (cntla&dev),d\r
+ in0 a,(cntla&dev) ;reset all error flags\r
+ and ~M_EFR ;\r
+ out0 (cntla&dev),a ;\r
\r
ld c,(ix+o.in_idx) ;input buffer pointer\r
ld b,0\r
ld hl,s&dev&.inbuf ;\r
add hl,bc\r
\r
- in0 a,(rdr&dev) ;get char\r
- ld (hl),a\r
+ in0 b,(rdr&dev) ;get char\r
;todo: break detection\r
- ;todo: parity, framing overrun error\r
+ ;todo: parity, framing, overrun error\r
+ ld (hl),b\r
\r
- ld e,(ix+oint.fflags)\r
-; bit IXON,e\r
+; bit IXON,d\r
; jr z,rxi_2\r
;todo: test XON/XOFF\r
rxi_2:\r
jr nz,rxtxi&dev&_lp1\r
\r
if dev=0 ; only channel 0 has rts line\r
- bit CRTS_IFLOW,e\r
+ bit CRTS_IFLOW,d\r
jr z,rxi0_nocrts\r
\r
- set EFR,d\r
- set RTS0,d ;RTS inactive\r
- out0 (cntla0),d ;\r
+ in0 a,(cntla&dev) ;reset all error flags\r
+ or M_RTS0+M_EFR ;RTS inactive\r
+ out0 (cntla0),a ;\r
rxi0_nocrts:\r
endif\r
\r
- bit IXOFF,e\r
+ bit IXOFF,d\r
jr z,rxtxi&dev&_lp1\r
;send XOFF\r
set TDC3,(ix+oint.stat)\r
- in0 a,(stat&dev) ;\r
- set TIE,a ;\r
- out0 (stat&dev),a ;\r
+ set TIE,e ;\r
+ out0 (stat&dev),e ;\r
jr rxtxi&dev&_lp1\r
\r
txi&dev:\r
- ld e,a\r
bit TDRE,e ;TX int?\r
jr z,rxtxi&dev&_exit\r
- ;todo: xon/xoff\r
- bit IXOFF,(ix+oint.fflags)\r
- jr z,txi&dev&_char\r
-txi&dev&_dc1:\r
- bit TDC1,(ix+oint.stat)\r
- jr z,txi&dev&_dc3\r
- res TDC1,(ix+oint.stat)\r
- ld a,DC1\r
- jr txi&dev&_dc1dc3\r
-\r
-txi&dev&_dc3:\r
- bit TDC3,(ix+oint.stat)\r
- jr z,txi&dev&_char\r
- res TDC3,(ix+oint.stat)\r
- ld a,DC3\r
-txi&dev&_dc1dc3:\r
- out0 (tdr&dev),a ;\r
- jp rxtxi&dev&_lp0\r
+\r
+ ; TX Interrupt\r
+\r
+ ld a,(ix+oint.stat) ;check if xon/xoff should be sent\r
+ tst M_TDC1+M_TDC3 ;\r
+ jr z,txi&dev&_char ; no\r
+\r
+ ld l,DC3 ;prepare for xoff\r
+ bit TDC1,a ;request for xon (also) set?\r
+ jr z,txi&dev&_cch ;\r
+ ld l,DC1 ;\r
+txi&dev&_cch:\r
+ out0 (tdr&dev),l ;\r
+ and ~(M_TDC1+M_TDC3) ;reset request flags\r
+ ld (ix+oint.stat),a ;\r
+ jp rxtxi&dev&_lp1 ;\r
\r
txi&dev&_char:\r
ld hl,s&dev&.outbuf+o.in_idx ;[in]\r
and c ;\r
ld (s&dev&.outbuf+o.out_idx),a ;\r
\r
- jp rxtxi&dev&_lp0\r
+ jp rxtxi&dev&_lp1\r
\r
txi&dev&_empty:\r
res TIE,e ;disable tx-int\r