+ dseg
+
+;--------------------------------------------------------------------
+; Load byte/word from user ram
+;
+; de: src address in users bank
+; return
+; a: value (byte)
+; hl: value (word)
+
+b_ld_a:
+ push hl
+ or a ; clear carry == byte store
+ jr $+3
+b_ld_hl:
+ scf ; set carry == word store
+ push af ; save flag
+ push hl ; make space on stack
+
+ ld a,(@cbnk)
+ ld b,a ; b = src bank
+
+ ld hl,0
+ ld a,l
+ ld c,l ; c = dst bank (0)
+ add hl,sp ; hl = dst
+ adc a,1 ; a = count
+ ex de,hl
+ call dma_move
+ ex de,hl
+ pop hl
+ pop af
+ ret c
+ ld a,l
+ pop hl
+ ret
+
+;--------------------------------------------------------------------
+; Store byte/word to user ram
+;
+; de: dst address in users bank
+; a: value (byte)
+; hl: value (word)
+
+b_st_a:
+ push hl
+ ld l,a
+ or a ; clear carry == byte store
+ jr $+3
+b_st_hl:
+ scf ; set carry == word store
+ push af ; save flag
+ push hl ; put value on stack
+
+ ld a,(@cbnk) ;
+ ld c,a ; c = dst bank
+ ld a,0
+ ld l,a
+ ld h,a
+ ld b,a ; b = src bank (0)
+ add hl,sp ; hl = src
+ adc a,1 ; a = count
+
+ call dma_move
+
+ pop hl ; restore value
+ pop af ; carry
+ ret c
+ pop hl
+ ret
+
+;--------------------------------------------------------------------
+;
+; hl: src
+; de: dst
+; b: src bank
+; c: dst bank
+; a: count
+
+dma_move:
+ out0 (bcr0l),a ; setup DMA count
+ xor a
+ out0 (bcr0h),a
+
+ push hl
+ ld a,b
+ call bnk2phy
+ out0 (sar0l),l ; setup DMA src address
+ out0 (sar0h),h
+ out0 (sar0b),a
+
+ ld l,e
+ ld h,d
+ ld a,c
+ call bnk2phy
+ out0 (dar0l),l ; setup DMA dst address
+ out0 (dar0h),h
+ out0 (dar0b),a
+
+ ld a,M_MMOD ; DMA burst mode
+ out0 (dmode),a
+ ld a,M_DE0+M_NDWE1 ; enable DMA0
+ out0 (dstat),a ; move ...
+ pop hl
+ ret
+
+