\r
public hwinit,?init,?ldccp,?rlccp\r
\r
+ public f_cpu\r
+\r
extrn ?boot,?pmsg,?conin\r
- extrn ioini1l,msginit,mmuinit,intinit\r
+ extrn ioini1l,msginit,mmuinit,intinit,cpu_frq\r
extrn @civec,@covec,@aivec,@aovec,@lovec\r
extrn @cbnk,?bnksl\r
\r
hwini_skip:\r
call mmuinit ; setup mmu registers\r
call msginit\r
+ call cpu_frq\r
+ ld (f_cpu),de\r
+ ld (f_cpu+2),hl\r
ret\r
\r
?init:\r
fcb$nr: db 0,0,0\r
\r
\r
+ dseg\r
hwini_tab:\r
db (hwini0_e-$)/2 ;count\r
db rcr,CREFSH ;configure DRAM refresh\r
hwini0_e:\r
db 0 ;stop mark\r
\r
+ cseg\r
+f_cpu dw 0,0 ;detected CPU clock frequency [Hz]\r
\r
end\r