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46c2044)
rx status fifo. loop asci0 int till asci0 rx fifo empty
global as1osta,as1out\r
\r
extrn as_init\r
global as1osta,as1out\r
\r
extrn as_init\r
- extrn ff_empty,ff_get,ff_full,ff_put,ff_cnt\r
+ extrn ff_empty,ff_get,ff_full,ff_put\r
+ extrn ff_puth,ff_cnt,ff_gech\r
extrn bufinit\r
extrn isv_sw\r
\r
extrn bufinit\r
extrn isv_sw\r
\r
dseg\r
\r
mkbuf s0.rx_id, s0.inbuf, s0.rx_len\r
dseg\r
\r
mkbuf s0.rx_id, s0.inbuf, s0.rx_len\r
+ mkbuf 0, s0.instatbuf, s0.rx_len\r
mkbuf s0.tx_id, s0.outbuf,s0.tx_len\r
mkbuf s1.rx_id, s1.inbuf, s1.rx_len\r
mkbuf s0.tx_id, s0.outbuf,s0.tx_len\r
mkbuf s1.rx_id, s1.inbuf, s1.rx_len\r
- mkbuf s1.tx_id, s1.outbuf, s1.tx_len\r
+ mkbuf 0, s1.instatbuf, s1.rx_len\r
+ mkbuf s1.tx_id, s1.outbuf,s1.tx_len\r
as0inp:\r
push ix\r
ld ix,s0.inbuf ;\r
as0inp:\r
push ix\r
ld ix,s0.inbuf ;\r
- call ff_cnt\r
- cp 32\r
+ call ff_gech\r
+ ld a,b\r
+ cp s0.rx_len/4\r
jr nc,a0i_1\r
di\r
in0 a,(cntla0)\r
jr nc,a0i_1\r
di\r
in0 a,(cntla0)\r
ei\r
out0 (cntla0),a\r
a0i_1:\r
ei\r
out0 (cntla0),a\r
a0i_1:\r
as1inp:\r
push ix\r
ld ix,s1.inbuf ;\r
as1inp:\r
push ix\r
ld ix,s1.inbuf ;\r
as0out:\r
push ix ;\r
ld ix,s0.outbuf ;\r
as0out:\r
push ix ;\r
ld ix,s0.outbuf ;\r
+ call ff_puth\r
+ pop ix ;\r
di ;\r
in0 c,(stat0) ;\r
set TIE,c ;\r
out0 (stat0),c ;\r
ei ;\r
di ;\r
in0 c,(stat0) ;\r
set TIE,c ;\r
out0 (stat0),c ;\r
ei ;\r
ret\r
\r
;--------------------------------------------------------------\r
ret\r
\r
;--------------------------------------------------------------\r
as1out:\r
push ix ;\r
ld ix,s1.outbuf ;\r
as1out:\r
push ix ;\r
ld ix,s1.outbuf ;\r
+ call ff_puth\r
+ pop ix ;\r
di ;\r
in0 c,(stat1) ;\r
set TIE,c ;\r
out0 (stat1),c ;\r
ei ;\r
di ;\r
in0 c,(stat1) ;\r
set TIE,c ;\r
out0 (stat1),c ;\r
ei ;\r
dseg\r
rxtxi0:\r
push ix\r
dseg\r
rxtxi0:\r
push ix\r
in0 e,(stat0) ;receive flag set?\r
in0 e,(stat0) ;receive flag set?\r
+ jp p,rxtxi0_1 ;RDRF == Bit 7\r
+\r
\r
rxi_0\r
in0 a,(asext0) ;todo: break detection\r
\r
rxi_0\r
in0 a,(asext0) ;todo: break detection\r
res EFR,d ;\r
\r
ld ix,s0.inbuf ;\r
res EFR,d ;\r
\r
ld ix,s0.inbuf ;\r
- ld hl,s0.inbuf ;\r
- ld c,(ix+o.in_idx) ;-2\r
add hl,bc\r
in0 a,(rdr0) ;\r
ld (hl),a\r
\r
add hl,bc\r
in0 a,(rdr0) ;\r
ld (hl),a\r
\r
- bit FE,e ;framing error?\r
- jr nz,?0ri_1\r
+ ld hl,s0.instatbuf ;save error status\r
+ add hl,bc\r
+ ld (hl),e\r
+ ;todo: error handling and break detection\r
\r
ld a,c ;increment buffer in pointer\r
inc a ;\r
\r
ld a,c ;increment buffer in pointer\r
inc a ;\r
+ ld b,(ix+o.mask) ;\r
+ and b ;\r
- inc hl\r
- jr z,$+5\r
- ld hl,s0.inbuf ;\r
- sub (ix+o.out_idx) ;-1\r
+\r
+ sub (ix+o.out_idx) ;\r
jr z,$+5 ;skip if buffer is full\r
jr z,$+5 ;skip if buffer is full\r
- ld (ix+o.in_idx),c ;-2\r
- jr nc,$+6\r
- add (ix+o.mask) ;-3\r
- inc a\r
- cp 96\r
+ ld (ix+o.in_idx),c ;\r
+ jr nc,$+3 ;\r
+ adc b ;\r
+ cp s0.tx_len*3/4\r
jr c,$+4\r
set RTS0,d ;RTS inactive\r
?0ri_1:\r
out0 (cntla0),d ;\r
jr c,$+4\r
set RTS0,d ;RTS inactive\r
?0ri_1:\r
out0 (cntla0),d ;\r
\r
rxtxi0_1:\r
bit TDRE,e ;TX int?\r
\r
rxtxi0_1:\r
bit TDRE,e ;TX int?\r
\r
ld ix,s0.outbuf ;\r
\r
\r
ld ix,s0.outbuf ;\r
\r
ld c,a\r
ld b,0\r
add hl,bc\r
ld c,a\r
ld b,0\r
add hl,bc\r
- ld l,(hl)\r
- out0 (tdr0),l ; 7\r
+ ld b,(hl)\r
+ out0 (tdr0),b ; 7\r
\r
inc a\r
and (ix+o.mask)\r
ld (ix+o.out_idx),a\r
\r
inc a\r
and (ix+o.mask)\r
ld (ix+o.out_idx),a\r
?0ti_2:\r
res TIE,e ;disable tx-int\r
out0 (stat0),e ; 5\r
?0ti_2:\r
res TIE,e ;disable tx-int\r
out0 (stat0),e ; 5\r
-?0ti_3:\r
- jr rxtxi0_0\r
\r
rxtxi0_e:\r
pop ix\r
ret\r
\r
\r
rxtxi0_e:\r
pop ix\r
ret\r
\r
;------------------------------------------\r
; ASCI 1 Transmit/Receive interupt routines\r
\r
dseg\r
rxtxi1:\r
in0 e,(stat1) ;receive flag set? 5\r
;------------------------------------------\r
; ASCI 1 Transmit/Receive interupt routines\r
\r
dseg\r
rxtxi1:\r
in0 e,(stat1) ;receive flag set? 5\r
\r
in0 d,(rdr1) ;todo: break detection 9\r
bit FE,e ;framing error?\r
\r
in0 d,(rdr1) ;todo: break detection 9\r
bit FE,e ;framing error?\r
out0 (cntla1),a ; 1\r
ret\r
\r
out0 (cntla1),a ; 1\r
ret\r
\r
push ix\r
ld ix,s1.outbuf ;\r
\r
push ix\r
ld ix,s1.outbuf ;\r
\r
conin:\r
ld hl,(@civec)\r
\r
conin:\r
ld hl,(@civec)\r
\r
+ ;check if only one device assigned\r
+\r
+ push hl ; save bit vector\r
+ ld b,0\r
+insc_0:\r
+ or a ; clear carry\r
+ adc hl,hl ; shift out next bit\r
+ jr nc,insc_1 ;\r
+ jr z,ci$rdy ; single device\r
+ jr ci$check ;\r
+\r
+insc_1:\r
+ inc b ; else, next device\r
+ ld a,h\r
+ or l ; see if any more devices\r
+ jr nz,insc_0 ; no,\r
+ pop hl\r
+\r
in$scan:\r
push hl ; save bit vector\r
ld b,0\r
ci$next:\r
xor a ; assume next device not ready\r
add hl,hl ; shift out next bit\r
in$scan:\r
push hl ; save bit vector\r
ld b,0\r
ci$next:\r
xor a ; assume next device not ready\r
add hl,hl ; shift out next bit\r
call c,cist1 ; see if the device has a character\r
jr nz,ci$rdy ; this device has a character\r
inc b ; else, next device\r
call c,cist1 ; see if the device has a character\r
jr nz,ci$rdy ; this device has a character\r
inc b ; else, next device\r
- public ff_empty,ff_get,ff_full,ff_put, ff_cnt\r
+ public ff_empty,ff_get,ff_full,ff_put\r
+ public ff_puth,ff_cnt,ff_gech\r
ret\r
\r
;--------------------------------------------------------------\r
ret\r
\r
;--------------------------------------------------------------\r
+; get character from fifo\r
+; destroys hl,b\r
+;\r
+; return:\r
+; c,a: next character\r
bg.wait:\r
cp (ix+o.in_idx) ;\r
jr z,bg.wait\r
bg.wait:\r
cp (ix+o.in_idx) ;\r
jr z,bg.wait\r
- ld b,(hl)\r
- ld a,c ;\r
inc a\r
and (ix+o.mask)\r
inc a\r
and (ix+o.mask)\r
+ ld a,c\r
+ ret\r
+\r
+;--------------------------------------------------------------\r
+; get character and ramaining count from fifo\r
+; halt cpu, while buffer is empty\r
+; destroys hl\r
+;\r
+; return:\r
+; c,a: next character\r
+; b: number of charachters in fifo\r
+\r
+ff_gech:\r
+ push ix\r
+ pop hl\r
+ ld c,(ix+o.out_idx) ;\r
+ ld b,0\r
+ add hl,bc\r
+ jr $+3\r
+gech.wait:\r
+ halt\r
+ ld a,(ix+o.in_idx) ;\r
+ sub c\r
+ jr z,gech.wait\r
+ jr nc,$+5\r
+ adc (ix+o.mask) ; mask+carry == buffer size\r
+ dec a\r
+ ld b,a\r
+ ld a,c\r
+ inc a\r
+ and (ix+o.mask)\r
+ ld c,(hl)\r
+ ld (ix+o.out_idx),a\r
+ ld a,c\r
ret\r
\r
;--------------------------------------------------------------\r
; Check if room in fifo\r
; buffer is full, if output index is one behind input index\r
ret\r
\r
;--------------------------------------------------------------\r
; Check if room in fifo\r
; buffer is full, if output index is one behind input index\r
+;\r
+; return\r
+; a = 0 and z if buffer full\r
+; a = ff and nz if buffer not full\r
\r
ff_full:\r
ld a,(ix+o.in_idx) ;\r
\r
ff_full:\r
ld a,(ix+o.in_idx) ;\r
- inc a\r
- and (ix+o.mask)\r
+ inc a ;\r
+ and (ix+o.mask) ;\r
sub (ix+o.out_idx) ;\r
ret z\r
or 0ffh\r
sub (ix+o.out_idx) ;\r
ret z\r
or 0ffh\r
+;--------------------------------------------------------------\r
+; put character in c in buffer\r
+; halt cpu, while buffer is is full\r
+; destroys hl, bc\r
+; returns output char in a\r
+\r
+ff_puth:\r
+ push ix ;\r
+ pop hl ; get buffer start address\r
+\r
+ ld a,c ;\r
+ ld c,(ix+o.in_idx) ; add input index\r
+ ld b,0 ;\r
+ add hl,bc ;\r
+ ld (hl),a ; one place is allways free\r
+ ld b,a ;\r
+\r
+ ld a,c ; bump input index\r
+ inc a ;\r
+ and (ix+o.mask) ;\r
+ jr $+3\r
+bph.wait: ; do\r
+ halt ; halt cpu\r
+ cp (ix+o.out_idx) ;\r
+ jr z,bph.wait ; while new input idx == ouput idx\r
+ ld (ix+o.in_idx),a ;\r
+ ld a,b ;\r
+ ret ;\r
+\r
;--------------------------------------------------------------\r
; Return number of characters in fifo\r
;\r
;--------------------------------------------------------------\r
; Return number of characters in fifo\r
;\r
ld a,(ix+o.in_idx) ;\r
sub (ix+o.out_idx) ;\r
ret nc\r
ld a,(ix+o.in_idx) ;\r
sub (ix+o.out_idx) ;\r
ret nc\r
- add (ix+o.mask)\r
- inc a\r
+ adc (ix+o.mask) ; mask+carry == buffer size\r
+;--------------------------------------------------------------\r