From 1e1c17d3fc07e3783873a621d8f165a3f56ff01f Mon Sep 17 00:00:00 2001 From: Leo C Date: Tue, 9 Jun 2015 09:27:20 +0200 Subject: [PATCH] New memory map: bank 1 and common are now contiguous --- cbios/bioskrnl.180 | 6 ++- cbios/boot.180 | 5 +-- cbios/misc.180 | 2 +- cbios/mm.180 | 100 ++++++++++++++++++++++++++++++++++++++------- cbios/msgbuf.180 | 15 +++---- 5 files changed, 102 insertions(+), 26 deletions(-) diff --git a/cbios/bioskrnl.180 b/cbios/bioskrnl.180 index 79dac2c..39927be 100644 --- a/cbios/bioskrnl.180 +++ b/cbios/bioskrnl.180 @@ -67,7 +67,7 @@ ccp equ 0100h ; Console Command Processor gets loaded ; External names for BIOS entry points - public ?boot,?wboot,?const,?conin,?cono,?list,?auxo,?auxi + public ?boot,?wboot,boot,?const,?conin,?cono,?list,?auxo,?auxi public ?home,?sldsk,?sttrk,?stsec,?stdma,?read,?write public ?lists,?sctrn public ?conos,?auxis,?auxos,?dvtbl,?devin,?drtbl @@ -129,6 +129,10 @@ ccp equ 0100h ; Console Command Processor gets loaded dseg ; this part can be banked boot: + ld a,SYS$CBR + out0 (cbr),a + ld a,USR$CBAR + out0 (cbar),a ld sp,bs$stack call hwinit ; first time hardware initialisation diff --git a/cbios/boot.180 b/cbios/boot.180 index 8d58d1a..2a43b75 100644 --- a/cbios/boot.180 +++ b/cbios/boot.180 @@ -6,7 +6,7 @@ public f_cpu - extrn ?boot,?conin + extrn boot,?conin extrn pr.inln,pr.crlf,pr.dec,pr.decl extrn ioini1l,msginit,mmuinit,intinit,cpu_frq extrn prt0ini,gs_rtc @@ -45,11 +45,10 @@ hwinit: ld hl,hwini_tab call ioini1l ld a,0c3h - ld hl,?boot + ld hl,boot ld (0),a ld (1),hl hwini_skip: - call mmuinit ; setup mmu registers call msginit call cpu_frq ld (f_cpu),hl diff --git a/cbios/misc.180 b/cbios/misc.180 index 439fb75..d39f632 100644 --- a/cbios/misc.180 +++ b/cbios/misc.180 @@ -158,7 +158,7 @@ get_tmr: ;-------------------------------------------------------------------- - cseg + dseg fifolst: rept 4 diff --git a/cbios/mm.180 b/cbios/mm.180 index 9d1e256..d9efd16 100644 --- a/cbios/mm.180 +++ b/cbios/mm.180 @@ -3,20 +3,30 @@ global mmuinit - global bnk2log,bnk2phy,hwl2phy + global bnk2log,bnk2phy,hwl2phy,phy2log include config.inc include z180reg.inc ;---------------------------------------------------------------------- -; Memory Map: +; Memory Map 1: ; -; Common CAStart ... 0FFFF -; Bank 0 00000 ... CAStart-1 -; Bank 1 10000 ... +; Common CAStart .. 0FFFF +; Bank 0 00000 .. CAStart-1 +; Bank 1 10000 .. ; Bank 2 ; +; Memory Map 2: +; +; Common 18000 .. 1BFFF BANK1 +; +; Bank 0 00000 .. 0BFFF 0 +; Bank 1 0C000 .. 17FFF 1*BNK_SIZE +; Bank 2 1C000 .. 27FFF 2*BNK_SIZE + CMN_SIZE +; Bank 3 28000 .. 33FFF 3*BNK_SIZE + CMN_SIZE +; Bank n n*BNK_SIZE + (n < 2) ? 0 : CMN_SIZE +; ;---------------------------------------------------------------------- cseg @@ -32,20 +42,55 @@ mmuinit: ; in a: Bank number ; out a: bbr value + if 0 ; Memory Map 1 + bnk2log: or a ; ret z ; Bank 0 is at physical address 0 - dec a + dec a ; push bc ; - ld b,a ; - ld c,CA ; + ld c,a ; + ld b,BNK_SIZE ; mlt bc ; bank size * bank number ld a,c ; add a,10h ; add bank0 + common pop bc ; ret ; + else ; Memory Map 2 + +bnk2log: + or a + ret z ; Bank 0 is at physical address 0 + + push bc + ld c,a ; + ld b,BNK_SIZE ; + mlt bc ; bank size * bank number + cp 2 ; + ld a,c ; + pop bc + ret c + add a,CMN_SIZE + ret + + endif + + if 0 ; table version + + push hl + ld hl,bnk_table ; + add a,l ; + ld l,a ; + jr nc,$+3 ; + inc h ; + ld a,(hl) ; + pop hl + ret + + endif + ;-------------------------------------------------------------- ;in hl: Log. Address @@ -62,13 +107,16 @@ bnk2phy: cp CA*16 ld a,c pop bc - jr c,b2p_banked - xor a ; address is in common - jr b2b_cont ; base is 0 + ; address is in common + if 0 ; Memory Map 1 + ld a,0 ; base is 0 + else ; Memory Map 2 + ld a,1 ; same as bank1 + endif + b2p_banked: call bnk2log ; get address base -b2b_cont: ; fall thru @@ -102,10 +150,10 @@ l2p_i: ;-------------------------------------------------------------- ; -; de: Log. Address +; hl: Log. Address ; ; -; OP: ahl = (bankbase<<12) + (d<<8) + e +; OP: ahl = (bankbase<<12) + (h<<8) + l ; ;out ahl: Phys. (linear) Address @@ -137,6 +185,30 @@ hl2p_x: ret ; +;-------------------------------------------------------------- +; return logical bank 0 address for given physical address. +; +; in: ahl: pyhsical addres (20 bit) +; out hl: logical address. +; logical address is in bank 0 or common, no bank number returned +; + +phy2log: + or a + ret z + + push bc + push hl + ld l,h + ld h,0 + ld bc,-16*SYS$CBR + add hl,bc + ld h,l + pop bc + ld l,c + pop bc + ret + ;-------------------------------------------------------------- ; Trampoline for routines in banked ram. ; Switch stack pointer to "system" stack in top ram diff --git a/cbios/msgbuf.180 b/cbios/msgbuf.180 index 27c82d4..7b70d54 100644 --- a/cbios/msgbuf.180 +++ b/cbios/msgbuf.180 @@ -7,7 +7,7 @@ ; global msg.sout global msg.sm,msg.recv - extrn bufinit,hwl2phy + extrn bufinit,hwl2phy,phy2log extrn fifolst include config.inc @@ -18,9 +18,6 @@ mkbuf 0,mtx.fifo,mtx.fifo_len mkbuf 1,mrx.fifo,mrx.fifo_len -;txfifo_addr equ fifolst + (0*2) -;rxfifo_addr equ fifolst + (1*2) - itx equ 0*2 irx equ 1*2 @@ -35,7 +32,9 @@ msginit: jr nz,msgi_1 ld hl,(040h) -;TODO: physical to logical address translation + ld a,(040h+2) + call phy2log + ld a,l or h jr z,msgi_1 @@ -47,11 +46,13 @@ msginit: msgi_1: ld a,(043h) + ;TODO: value should be 0 + ld ix,mtx.fifo call bufinit - - ld hl,fifolst + push ix + pop hl call hwl2phy ld (040h),hl ld (040h+2),a -- 2.39.2