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Commit | Line | Data |
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0c5890bb | 1 | |
f338df2a L |
2 | #define ZST_ACQUIRED 0x01 |
3 | #define ZST_RUNNING 0x02 | |
4 | ||
6035a17b | 5 | typedef enum { |
f338df2a L |
6 | RESET = 0x00, |
7 | RESET_AQRD = ZST_ACQUIRED, | |
62f624d3 L |
8 | RUNNING = ZST_RUNNING, |
9 | RUNNING_AQRD = ZST_RUNNING | ZST_ACQUIRED, | |
f338df2a L |
10 | } zstate_t; |
11 | ||
6035a17b | 12 | typedef enum { |
62f624d3 L |
13 | Reset, |
14 | Request, | |
15 | Release, | |
16 | Run, | |
17 | Restart, | |
18 | M_Cycle | |
19 | } bus_cmd_t; | |
20 | ||
0c5890bb L |
21 | typedef enum {LOW, HIGH} level_t; |
22 | ||
62f624d3 L |
23 | zstate_t z80_bus_state(void); |
24 | zstate_t z80_bus_cmd(bus_cmd_t cmd); | |
0c5890bb | 25 | void z80_setup_bus(void); |
534e1dfc | 26 | int z80_stat_reset(void); |
72f58822 | 27 | //void z80_busreq(level_t level); |
0c5890bb | 28 | int z80_stat_halt(void); |
6035a17b | 29 | |
0c5890bb | 30 | |
f338df2a L |
31 | void z80_write(uint32_t addr, uint8_t data); |
32 | uint8_t z80_read(uint32_t addr); | |
33 | void z80_memset(uint32_t addr, uint8_t data, uint32_t length); | |
ea6971b8 L |
34 | void z80_write_block_P(const FLASH uint8_t *src, uint32_t dest, uint32_t length); |
35 | void z80_write_block(const uint8_t *src, uint32_t dest, uint32_t length); | |
36 | void z80_read_block (uint8_t *dest, uint32_t src, size_t length); | |
f338df2a | 37 | |
0c5890bb | 38 | |
89adce76 | 39 | typedef enum fifo_t { |
ea6971b8 | 40 | fifo_msgin, fifo_msgout, |
89adce76 L |
41 | fifo_conout, fifo_conin, |
42 | NUM_FIFOS | |
43 | } fifo_t; | |
0c5890bb L |
44 | |
45 | void z80_memfifo_init(const fifo_t f, uint32_t adr); | |
46 | int z80_memfifo_is_empty(const fifo_t f); | |
47 | int z80_memfifo_is_full(const fifo_t f); | |
89adce76 L |
48 | int z80_memfifo_getc(const fifo_t f); |
49 | uint8_t z80_memfifo_getc_wait(const fifo_t f); | |
0c5890bb | 50 | void z80_memfifo_putc(fifo_t f, uint8_t val); |