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Commit | Line | Data |
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0c5890bb | 1 | |
f338df2a L |
2 | #define ZST_ACQUIRED 0x01 |
3 | #define ZST_RUNNING 0x02 | |
4 | ||
5 | typedef enum { | |
6 | RESET = 0x00, | |
7 | RESET_AQRD = ZST_ACQUIRED, | |
62f624d3 L |
8 | RUNNING = ZST_RUNNING, |
9 | RUNNING_AQRD = ZST_RUNNING | ZST_ACQUIRED, | |
f338df2a L |
10 | } zstate_t; |
11 | ||
62f624d3 L |
12 | typedef enum { |
13 | Reset, | |
14 | Request, | |
15 | Release, | |
16 | Run, | |
17 | Restart, | |
18 | M_Cycle | |
19 | } bus_cmd_t; | |
20 | ||
0c5890bb L |
21 | typedef enum {LOW, HIGH} level_t; |
22 | ||
62f624d3 L |
23 | zstate_t z80_bus_state(void); |
24 | zstate_t z80_bus_cmd(bus_cmd_t cmd); | |
0c5890bb | 25 | void z80_setup_bus(void); |
534e1dfc | 26 | int z80_stat_reset(void); |
72f58822 | 27 | //void z80_busreq(level_t level); |
0c5890bb L |
28 | int z80_stat_halt(void); |
29 | ||
f338df2a L |
30 | void z80_write(uint32_t addr, uint8_t data); |
31 | uint8_t z80_read(uint32_t addr); | |
32 | void z80_memset(uint32_t addr, uint8_t data, uint32_t length); | |
33 | void z80_write_block(const FLASH uint8_t *src, uint32_t dest, uint32_t length); | |
34 | ||
0c5890bb L |
35 | |
36 | typedef enum fifo_t {fifo_in, fifo_out, NUM_FIFOS} fifo_t; | |
37 | ||
38 | void z80_memfifo_init(const fifo_t f, uint32_t adr); | |
39 | int z80_memfifo_is_empty(const fifo_t f); | |
40 | int z80_memfifo_is_full(const fifo_t f); | |
41 | uint8_t z80_memfifo_getc(const fifo_t f); | |
42 | void z80_memfifo_putc(fifo_t f, uint8_t val); | |
43 | ||
44 | void z80_setup_msg_fifo(void); | |
45 | void z80_init_msg_fifo(uint32_t addr); | |
46 | int z80_msg_fifo_getc(void); |