]> cloudbase.mooo.com Git - z180-stamp.git/blame - include/spi.h
Remove STM32 variant (and submodule libopencm3)
[z180-stamp.git] / include / spi.h
CommitLineData
7f552300 1/*
35edb766 2 * (C) Copyright 2009,2014 Leo C. <erbl259-lmu@yahoo.de>
7f552300 3 *
35edb766 4 * SPDX-License-Identifier: GPL-2.0+
7f552300
L
5 */
6
7#ifndef SPI_H_
8#define SPI_H_
9
10#define SPI_PORT PORTB /* SPI Connection port */
11#define SPI_DDR DDRB /* SPI Direction port */
12#define SPI_SS 0
13#define SPI_SCK 1
14#define SPI_MOSI 2
15#define SPI_MISO 3
16
17
18/* SPI macros */
19
20#define SPI_SET_SPEED_F_2 do {SPCR = (1<<SPE) | (1<<MSTR) | (0<<SPR1) | (0<<SPR0); SPSR = (1<<SPI2X); } while(0)
21#define SPI_SET_SPEED_F_4 do {SPCR = (1<<SPE) | (1<<MSTR) | (0<<SPR1) | (0<<SPR0); SPSR = (0<<SPI2X); } while(0)
22#define SPI_SET_SPEED_F_8 do {SPCR = (1<<SPE) | (1<<MSTR) | (0<<SPR1) | (1<<SPR0); SPSR = (1<<SPI2X); } while(0)
23#define SPI_SET_SPEED_F_16 do {SPCR = (1<<SPE) | (1<<MSTR) | (0<<SPR1) | (1<<SPR0); SPSR = (0<<SPI2X); } while(0)
24#define SPI_SET_SPEED_F_32 do {SPCR = (1<<SPE) | (1<<MSTR) | (1<<SPR1) | (0<<SPR0); SPSR = (1<<SPI2X); } while(0)
25#define SPI_SET_SPEED_F_64 do {SPCR = (1<<SPE) | (1<<MSTR) | (1<<SPR1) | (0<<SPR0); SPSR = (0<<SPI2X); } while(0)
26#define SPI_SET_SPEED_F_128 do {SPCR = (1<<SPE) | (1<<MSTR) | (1<<SPR1) | (1<<SPR0); SPSR = (0<<SPI2X); } while(0)
27
28/** switch to fast SPI Clock */
a870134a
L
29#define SPISetFastClock() SPI_SET_SPEED_F_2
30#define SPISetSlowClock() SPI_SET_SPEED_F_8
31#define SPISetMMCInitClock() SPI_SET_SPEED_F_64
7f552300 32
a870134a 33#define SPI_OFF() do { SPCR = 0; } while(0)
7f552300 34
b4e3fab8 35static inline __attribute__((always_inline)) void spi_wait() {
7f552300
L
36 loop_until_bit_is_set(SPSR,SPIF);
37}
38
b4e3fab8 39static inline __attribute__((always_inline)) void spi_write(uint8_t a) {
7f552300
L
40 SPDR = a;
41}
42
43static inline void spi_xmit(uint8_t a){
44 spi_write(a);
45 spi_wait();
46}
47
48static inline uint8_t spi_rcvr(void) {
49 SPDR = 0xFF;
50 spi_wait();
51 return SPDR;
52}
53
54#endif /* SPI_H_ */