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Commit | Line | Data |
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a16ba2b0 L |
1 | page 255\r |
2 | .z80\r | |
3 | \r | |
4 | extrn ddtz,bpent\r | |
5 | extrn $stack\r | |
6 | extrn $coninit,$cists,$ci\r | |
7 | \r | |
8 | extrn romend\r | |
9 | \r | |
10 | \r | |
11 | global isv_sw\r | |
12 | \r | |
13 | include config.inc\r | |
14 | include z180reg.inc\r | |
15 | include z180.lib\r | |
16 | \r | |
f4d5b4fe | 17 | ;CR equ 0dh\r |
a16ba2b0 L |
18 | \r |
19 | \r | |
20 | \r | |
21 | ;----------------------------------------------------------------------\r | |
22 | \r | |
23 | cseg\r | |
24 | \r | |
25 | jp start \r | |
26 | \r | |
27 | ; restart vectors\r | |
28 | \r | |
29 | rsti defl 1\r | |
30 | rept 7\r | |
31 | db 0, 0, 0, 0, 0\r | |
32 | jp bpent\r | |
33 | rsti defl rsti+1\r | |
34 | endm\r | |
35 | \r | |
36 | ;----------------------------------------------------------------------\r | |
37 | \r | |
38 | if ROMSYS\r | |
39 | $crom: defb c$rom ;\r | |
40 | else\r | |
41 | db 0 ;\r | |
42 | endif\r | |
43 | \r | |
44 | dmclrt: ;clear ram per dma\r | |
45 | db dmct_e-dmclrt-2 ;\r | |
46 | db sar0l ;first port\r | |
47 | dw nullbyte ;src (fixed) \r | |
48 | nullbyte:\r | |
49 | db 000h ;src\r | |
50 | dw romend ;dst (inc), start after "rom" code\r | |
51 | db 00h ;dst\r | |
52 | dw 0-romend ;count (64k)\r | |
53 | dmct_e:\r | |
54 | \r | |
a16ba2b0 L |
55 | INIWAITS defl CWAITIO\r |
56 | if ROMSYS\r | |
57 | INIWAITS defl INIWAITS+CWAITROM\r | |
58 | endif\r | |
59 | \r | |
60 | hwini0:\r | |
61 | db 3 ;count\r | |
62 | db rcr,CREFSH ;configure DRAM refresh\r | |
63 | db dcntl,INIWAITS ;wait states\r | |
64 | db cbar,SYS$CBAR\r | |
65 | \r | |
66 | ;----------------------------------------------------------------------\r | |
67 | \r | |
68 | start:\r | |
69 | push af ;003c\r | |
70 | in0 a,(itc) ;003d Illegal opcode trap?\r | |
71 | jp p,??st01 ;0040\r | |
72 | pop af ;0043\r | |
73 | jp bpent ;0044 yes, handle\r | |
74 | \r | |
75 | ??st01:\r | |
76 | ld a,i ;0047 I register == 0 ? \r | |
77 | jr z,??st02 ;004b yes, harware reset\r | |
78 | pop af ;004d \r | |
79 | jp bpent ;004e no, allready set up\r | |
80 | \r | |
81 | ??st02:\r | |
82 | di ;0058\r | |
83 | ld a,CREFSH\r | |
84 | out0 (rcr),a ; configure DRAM refresh\r | |
85 | ld a,CWAITIO\r | |
86 | out0 (dcntl),a ; wait states\r | |
87 | \r | |
88 | ; search warm start mark\r | |
89 | \r | |
90 | ld ix,mark_55AA ;00b8 ; top of common area\r | |
91 | ld a,SYS$CBAR ;\r | |
92 | out0 (cbar),a ;\r | |
93 | ld a,071h ;00bc\r | |
94 | ex af,af' ;00be ;for cbr = 0x70 downto 0x40\r | |
95 | swsm_l:\r | |
96 | ex af,af' ;00bf \r | |
97 | dec a ;00c0\r | |
98 | cp 03fh ;00c1\r | |
99 | jr z,kstart ;00c3 ; break (mark not found)\r | |
100 | out0 (cbr),a ;00c5\r | |
101 | ex af,af' ;00c8\r | |
102 | ld a,0aah ;00c9\r | |
103 | cp (ix+000h) ;00cb\r | |
104 | jr nz,swsm_l ;00ce\r | |
105 | cp (ix+002h) ;00d0\r | |
106 | jr nz,swsm_l ;00d3\r | |
107 | cpl ;00d5\r | |
108 | cp (ix+001h) ;00d6\r | |
109 | jr nz,swsm_l ;00d9\r | |
110 | cp (ix+003h) ;00db\r | |
111 | jr nz,swsm_l ;00de\r | |
112 | ld sp,$stack ;00e0 mark found, check\r | |
113 | call checkcrc_alv ;00e3\r | |
114 | jp z,wstart ;00e6 check ok,\r | |
115 | \r | |
116 | ;\r | |
117 | ; ram not ok, initialize -- kstart --\r | |
118 | \r | |
119 | kstart:\r | |
120 | \r | |
121 | ld a,088h ;00e9 0000-7fff: common 0\r | |
122 | out0 (cbar),a ;00eb 8000-ffff: common 1\r | |
123 | ld ix,08000h ;00f3\r | |
124 | ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r | |
125 | ??f_0:\r | |
126 | out0 (cbr),a ;00f9\r | |
127 | \r | |
128 | ld (ix+0),a ;0103 \r | |
129 | cpl\r | |
130 | ld (ix+1),a ;0103 \r | |
131 | cpl\r | |
132 | add a,8 ;010a next 'bank'\r | |
133 | cp 078h ;010c stop at 078000\r | |
134 | jr nz,??f_0 ;010e\r | |
135 | \r | |
136 | ld de,8000h ;0114 first block not tested, but mark as ok\r | |
137 | ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r | |
138 | ??cp_0:\r | |
139 | out0 (cbr),a ;011c\r | |
140 | ld c,a\r | |
141 | xor (ix+0)\r | |
142 | ld b,a\r | |
143 | ld a,c\r | |
144 | cpl\r | |
145 | xor (ix+1)\r | |
146 | or b\r | |
147 | jr nz,??cp_1\r | |
148 | scf\r | |
149 | ??cp_1:\r | |
150 | rr d\r | |
151 | rr e\r | |
152 | ld a,c\r | |
153 | add a,8\r | |
154 | cp 078h ; stop at 078000\r | |
155 | jr nz,??cp_0\r | |
156 | \r | |
157 | ;\r | |
158 | ; ram test found 1 or more error free blocks (32k)\r | |
159 | ;\r | |
160 | \r | |
161 | ramok:\r | |
162 | ld a,SYS$CBAR ;01c8\r | |
163 | out0 (cbar),a ;01ca\r | |
164 | ld h,d\r | |
165 | ld l,e\r | |
166 | ld c,070h ;01ce highest block\r | |
167 | ld b,15 ;01d0\r | |
168 | ??sr_1:\r | |
169 | add hl,hl\r | |
170 | jr c,alloc ;01d4 highest "error free" block\r | |
171 | ld a,c ;01d6\r | |
172 | sub 008h ;01d7\r | |
173 | ld c,a ;01d9\r | |
174 | djnz ??sr_1 ;01da\r | |
175 | \r | |
176 | slp ;01dc should never be reached\r | |
177 | \r | |
178 | alloc:\r | |
179 | out0 (cbr),c ;01de\r | |
180 | ld sp,$stack ;01e1\r | |
181 | \r | |
182 | ; Clear RAM using DMA0\r | |
183 | \r | |
184 | ld hl,dmclrt ;load DMA registers\r | |
185 | call io.ini.m\r | |
186 | ld a,0cbh ;01ef dst +1, src fixed, burst\r | |
187 | out0 (dmode),a ;01f1\r | |
188 | \r | |
189 | ld b,512/64\r | |
190 | ld a,062h ;01f4 enable dma0, \r | |
191 | ??cl_1:\r | |
192 | out0 (dstat),a ;01f9 clear (up to) 64k\r | |
193 | djnz ??cl_1 ; end of RAM?\r | |
194 | \r | |
195 | ; Init bank manager\r | |
196 | \r | |
197 | ld hl,banktabsys ;020f\r | |
198 | ld (hl),c ; Common area\r | |
199 | inc hl ;0213\r | |
200 | ld (hl),c ; System work area\r | |
201 | inc hl ;0215 Point to bank 0 entry\r | |
202 | ld b,BANKS ;0216\r | |
203 | l0218h:\r | |
204 | ld (hl),0ffh ;0218 Mark all banks as unassigned\r | |
205 | inc hl ;021a\r | |
206 | djnz l0218h ;021b\r | |
207 | \r | |
208 | ld hl,memalv ;\r | |
209 | ld b,8 ; 8*4k ie. first 32k\r | |
210 | ??a_0:\r | |
211 | ld (hl),0e0h ; mark as sys ("rom"/monitor)\r | |
212 | inc hl\r | |
213 | djnz ??a_0\r | |
214 | \r | |
215 | rr d ; shift out bit for block 0\r | |
216 | rr e ;\r | |
217 | ld c,15 ;022c 15*32k remaining blocks\r | |
218 | l022eh:\r | |
219 | ld a,0feh ; 0xfe == block with error(s)\r | |
220 | rr d ;\r | |
221 | rr e\r | |
222 | adc a,0 ; ==> 0xff : block ok\r | |
223 | ld b,32/4 ; 32k == 8 * 4k \r | |
224 | l0236h:\r | |
225 | ld (hl),a ;\r | |
226 | inc hl ;\r | |
227 | djnz l0236h ;\r | |
228 | dec c ;\r | |
229 | jr nz,l022eh ;next 32k block\r | |
230 | \r | |
231 | ld hl,memalv+0ch ;memalv+0ch\r | |
232 | ld a,(banktabsys) ;\r | |
233 | call add_hl_a\r | |
234 | ld b,3 ;\r | |
235 | l024ah:\r | |
236 | ld (hl),0ech ;alloc system ram\r | |
237 | inc hl ;\r | |
238 | djnz l024ah ;\r | |
239 | ld (hl),0efh ;alloc common\r | |
240 | call gencrc_alv\r | |
241 | \r | |
242 | ld hl,0000h ;bank # \r | |
243 | ld bc,0f0fh ; size (?) (4k blocks)\r | |
244 | xor a ;\r | |
245 | call sub_0420h ;alloc mem for bank 0\r | |
246 | ld c,l ;\r | |
247 | or a ;\r | |
248 | call z,sub_04b5h ;\r | |
249 | \r | |
250 | ld hl,0101h ;\r | |
251 | ld bc,0f0fh ;\r | |
252 | xor a ;\r | |
253 | call sub_0420h ;\r | |
254 | ld c,l ;\r | |
255 | or a ;\r | |
256 | call z,sub_04b5h ;\r | |
257 | \r | |
258 | ld hl,055AAh ;set warm start mark\r | |
259 | ld (mark_55AA),hl ;\r | |
260 | ld (mark_55AA+2),hl;\r | |
261 | \r | |
262 | ;\r | |
263 | ; crc ok -- wstart --\r | |
264 | ;\r | |
265 | wstart:\r | |
266 | call sysram_init ;027f\r | |
267 | call ivtab_init\r | |
268 | \r | |
269 | call prt0_init\r | |
270 | \r | |
271 | \r | |
272 | call bufferinit\r | |
273 | \r | |
274 | \r | |
275 | call $coninit\r | |
276 | \r | |
277 | \r | |
278 | \r | |
279 | \r | |
280 | im 2 ;?030e\r | |
281 | ei ;0282\r | |
282 | \r | |
283 | call $cists ;0284\r | |
284 | call $cists ;0287\r | |
285 | or a ;028a\r | |
286 | call nz,$ci ;028d\r | |
287 | \r | |
288 | ld a,(banktab) ; \r | |
289 | ld e,a ; \r | |
290 | jp ddtz ;0290\r | |
291 | \r | |
292 | \r | |
293 | ;\r | |
294 | ;----------------------------------------------------------------------\r | |
295 | ;\r | |
296 | \r | |
297 | extrn msginit,msg.sout,msg_fifo\r | |
298 | extrn tx.buf,rx.buf\r | |
299 | \r | |
300 | \r | |
301 | ;TODO: Make a ringbuffer module.\r | |
302 | \r | |
303 | global buf.init\r | |
304 | \r | |
305 | buf.init:\r | |
306 | ld (ix+o.in_idx),0\r | |
307 | ld (ix+o.out_idx),0\r | |
308 | ld (ix+o.mask),a\r | |
309 | ret\r | |
310 | \r | |
311 | ;----------------------------------------------------------------------\r | |
312 | \r | |
313 | bufferinit:\r | |
314 | call msginit\r | |
315 | \r | |
316 | ld hl,buffers\r | |
317 | ld bc,0300h\r | |
318 | bfi_1:\r | |
319 | ld e,(hl)\r | |
320 | inc hl\r | |
321 | ld d,(hl)\r | |
322 | inc hl\r | |
323 | push hl\r | |
324 | in0 a,cbr\r | |
325 | call log2phys\r | |
326 | ld (bufdat+1),hl\r | |
327 | ld (bufdat+3),a\r | |
328 | ld a,c\r | |
329 | ld (bufdat+0),a\r | |
330 | ld hl,inimsg\r | |
331 | call msg.sout\r | |
332 | pop hl\r | |
333 | inc c\r | |
334 | djnz bfi_1\r | |
335 | ret\r | |
336 | \r | |
337 | rept 20\r | |
338 | db 0\r | |
339 | endm\r | |
340 | \r | |
341 | buffers:\r | |
342 | dw msg_fifo\r | |
343 | dw tx.buf\r | |
344 | dw rx.buf\r | |
345 | \r | |
346 | inimsg: \r | |
347 | db inimsg_e - $ -2\r | |
348 | db PMSG\r | |
349 | db 81h\r | |
350 | db inimsg_e - $ -1\r | |
351 | db 0\r | |
352 | bufdat:\r | |
353 | db 0\r | |
354 | dw 0\r | |
355 | db 0\r | |
e598b357 | 356 | inimsg_e:\r |
a16ba2b0 L |
357 | \r |
358 | ;\r | |
359 | ;----------------------------------------------------------------------\r | |
360 | ;\r | |
361 | \r | |
362 | sysram_init:\r | |
363 | ld hl,sysramw\r | |
364 | ld de,topcodsys\r | |
365 | ld bc,sysrame-sysramw\r | |
366 | ldir\r | |
367 | \r | |
368 | ret\r | |
369 | \r | |
370 | ;----------------------------------------------------------------------\r | |
371 | \r | |
372 | ivtab_init:\r | |
373 | ld hl,ivtab ;\r | |
374 | ld a,h ;\r | |
375 | ld i,a ;\r | |
376 | out0 (il),l ;\r | |
377 | \r | |
378 | ; Let all vectors point to spurious int routines.\r | |
379 | \r | |
380 | ld d,high sp.int0\r | |
381 | ld a,low sp.int0\r | |
382 | ld b,9\r | |
383 | ivt_i1: \r | |
384 | ld (hl),a\r | |
385 | inc l\r | |
386 | ld (hl),d\r | |
387 | inc l\r | |
388 | add a,sp.int.len\r | |
389 | djnz ivt_i1\r | |
390 | ret\r | |
391 | \r | |
392 | \r | |
393 | prt0_init:\r | |
394 | ld a,i\r | |
395 | ld h,a\r | |
396 | in0 a,(il)\r | |
397 | and 0E0h\r | |
398 | or IV$PRT0\r | |
399 | ld l,a\r | |
400 | ld (hl),low iprt0\r | |
401 | inc hl\r | |
402 | ld (hl),high iprt0\r | |
403 | ld hl,prt0itab\r | |
404 | call io.ini.m\r | |
405 | ret\r | |
406 | \r | |
407 | prt0itab:\r | |
408 | db prt0it_e-prt0itab-2\r | |
409 | db tmdr0l\r | |
410 | dw PRT_TC10MS\r | |
411 | dw PRT_TC10MS\r | |
412 | db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r | |
413 | prt0it_e:\r | |
414 | \r | |
415 | ;\r | |
416 | ;----------------------------------------------------------------------\r | |
417 | ;\r | |
418 | \r | |
419 | io.ini:\r | |
420 | push bc\r | |
421 | ld b,0 ;high byte port adress\r | |
422 | ld a,(hl) ;count\r | |
423 | inc hl\r | |
424 | ioi_1:\r | |
425 | ld c,(hl) ;port address\r | |
426 | inc hl\r | |
427 | outi\r | |
428 | inc b ;outi decrements b\r | |
429 | dec a\r | |
430 | jr nz,ioi_1\r | |
431 | pop bc\r | |
432 | ret\r | |
433 | \r | |
434 | io.ini.m:\r | |
435 | push bc\r | |
436 | ld b,(hl)\r | |
437 | inc hl\r | |
438 | ld c,(hl)\r | |
439 | inc hl\r | |
440 | otimr \r | |
441 | pop bc \r | |
442 | ret\r | |
443 | \r | |
444 | io.ini.l:\r | |
445 | ;\r | |
446 | \r | |
447 | ;----------------------------------------------------------------------\r | |
448 | ;\r | |
449 | \r | |
450 | ; compute crc\r | |
451 | ; hl: start adr\r | |
452 | ; bc: len\r | |
453 | ; bc returns crc val\r | |
454 | \r | |
455 | do_crc16:\r | |
456 | ld de,0FFFFh\r | |
457 | crc1:\r | |
458 | ld a,(hl)\r | |
459 | xor e\r | |
460 | ld e,a\r | |
461 | rrca\r | |
462 | rrca\r | |
463 | rrca\r | |
464 | rrca\r | |
465 | and 0Fh\r | |
466 | xor e\r | |
467 | ld e,a\r | |
468 | rrca\r | |
469 | rrca\r | |
470 | rrca\r | |
471 | push af\r | |
472 | and 1Fh\r | |
473 | xor d\r | |
474 | ld d,a\r | |
475 | pop af\r | |
476 | push af\r | |
477 | rrca\r | |
478 | and 0F0h\r | |
479 | xor d\r | |
480 | ld d,a\r | |
481 | pop af\r | |
482 | and 0E0h\r | |
483 | xor e\r | |
484 | ld e,d\r | |
485 | ld d,a\r | |
486 | cpi\r | |
487 | jp pe,crc1\r | |
488 | or e ;z-flag\r | |
489 | ret\r | |
490 | \r | |
491 | \r | |
492 | gencrc_alv:\r | |
493 | push hl ;03f6\r | |
494 | push de ;03f7\r | |
495 | push bc\r | |
496 | push af ;03f8\r | |
497 | ld hl,banktabsys ;03f9\r | |
498 | ld bc,crc_len ;03fc\r | |
499 | call do_crc16 ;03ff\r | |
500 | ld (hl),e\r | |
501 | inc hl\r | |
502 | ld (hl),d\r | |
503 | pop af ;0406\r | |
504 | pop bc\r | |
505 | pop de ;0407\r | |
506 | pop hl ;0408\r | |
507 | ret ;0409\r | |
508 | \r | |
509 | checkcrc_alv:\r | |
510 | push hl ;040a\r | |
511 | push de\r | |
512 | push bc ;040b\r | |
513 | ld hl,banktabsys ;040d\r | |
514 | ld bc,crc_len+2 ;0410\r | |
515 | call do_crc16 ;0413\r | |
516 | pop bc ;041d\r | |
517 | pop de\r | |
518 | pop hl ;041e\r | |
519 | ret ;041f\r | |
520 | \r | |
521 | ;\r | |
522 | ; alloc\r | |
523 | ;\r | |
524 | ; h: max bank #\r | |
525 | ; l: min bank #\r | |
526 | ; b: max size\r | |
527 | ; c: min size\r | |
528 | ;\r | |
529 | ; ret:\r | |
530 | ; a: 0 == ok\r | |
531 | ; 1 == \r | |
532 | ; 2 == no bank # in requested range\r | |
533 | ; ff == crc error\r | |
534 | ;\r | |
535 | \r | |
536 | sub_0420h:\r | |
537 | call checkcrc_alv ;0420\r | |
538 | jr nz,l049ch ;0424 crc error, tables corrupt\r | |
539 | \r | |
540 | call sub_049dh ;0427 bank # in req. range available?\r | |
541 | jr c,l0499h ;042a\r | |
542 | push ix ;042c\r | |
543 | push iy ;042e\r | |
544 | push de ;0430\r | |
545 | push hl ;0431\r | |
546 | push bc ;0432\r | |
547 | ld c,b ;0433\r | |
548 | ld b,alv_len+1 ;0434\r | |
549 | ld d,0 ;0436\r | |
550 | ld hl,memalv-1 ;0438\r | |
551 | jr l0441h ;043b\r | |
552 | \r | |
553 | ; find free blocks\r | |
554 | \r | |
555 | l043dh:\r | |
556 | ld a,(hl) ;043d\r | |
557 | inc a ;043e free blocks are marked 0ffh\r | |
558 | jr z,l0446h ;043f\r | |
559 | l0441h:\r | |
560 | inc hl ;0441\r | |
561 | djnz l043dh ;0442\r | |
562 | jr l0464h ;0444\r | |
563 | l0446h:\r | |
564 | push hl ;0446 \r | |
565 | pop ix ;0447 free blocks start here\r | |
566 | ld e,000h ;0449\r | |
567 | jr l0451h ;044b\r | |
568 | l044dh: ; count free blocks\r | |
569 | ld a,(hl) ;044d\r | |
570 | inc a ;044e\r | |
571 | jr nz,l0457h ;044f\r | |
572 | l0451h:\r | |
573 | inc e ;0451\r | |
574 | inc hl ;0452\r | |
575 | djnz l044dh ;0453\r | |
576 | jr l0464h ;0455\r | |
577 | \r | |
578 | ; end of free blocks run. \r | |
579 | \r | |
580 | l0457h:\r | |
581 | ld a,d ;0457\r | |
582 | cp e ;0458 nr of blocks >= requested ?\r | |
583 | jr nc,l0441h ;0459 \r | |
584 | \r | |
585 | ld d,e ;045b\r | |
586 | push ix ;045c\r | |
587 | pop iy ;045e\r | |
588 | ld a,d ;0460\r | |
589 | cp c ;0461\r | |
590 | jr c,l0441h ;0462\r | |
591 | l0464h:\r | |
592 | pop bc ;0464\r | |
593 | ld a,d ;0465\r | |
594 | cp b ;0466\r | |
595 | jr c,l046ch ;0467\r | |
596 | ld d,b ;0469\r | |
597 | jr l0471h ;046a\r | |
598 | l046ch:\r | |
599 | cp c ;046c\r | |
600 | jr nc,l0471h ;046d\r | |
601 | ld d,000h ;046f\r | |
602 | l0471h:\r | |
603 | ld a,d ;0471\r | |
604 | push iy ;0472\r | |
605 | pop hl ;0474\r | |
606 | ld de,memalv ;0475\r | |
607 | or a ;0478\r | |
608 | sbc hl,de ;0479\r | |
609 | ld b,l ;047b\r | |
610 | ld c,a ;047c\r | |
611 | pop hl ;047d\r | |
612 | l047eh:\r | |
613 | or a ;047e\r | |
614 | jr z,l0489h ;047f\r | |
615 | ld (iy+0),l ;0481\r | |
616 | inc iy ;0484\r | |
617 | dec a ;0486\r | |
618 | jr l047eh ;0487\r | |
619 | l0489h:\r | |
620 | pop de ;0489\r | |
621 | pop iy ;048a\r | |
622 | pop ix ;048c\r | |
623 | call gencrc_alv ;048e\r | |
624 | ld a,c ;0491\r | |
625 | or a ;0492\r | |
626 | ld a,000h ;0493\r | |
627 | ret nz ;0495\r | |
628 | or 001h ;0496\r | |
629 | ret ;0498\r | |
630 | \r | |
631 | l0499h:\r | |
632 | ld a,2 ;0499\r | |
633 | l049ch:\r | |
634 | or a\r | |
635 | ret ;049c\r | |
636 | \r | |
637 | \r | |
638 | ; search a free bank number in range\r | |
639 | ; h: max #\r | |
640 | ; l: min #\r | |
641 | ; ret:\r | |
642 | ; l: bank number available\r | |
643 | ; nc, if found, bank nr. in l\r | |
644 | ; cy, if none found\r | |
645 | \r | |
646 | sub_049dh:\r | |
647 | push de ;049d\r | |
648 | push bc ;049e\r | |
649 | ex de,hl ;049f\r | |
650 | dec e ;04a0\r | |
651 | l04a1h:\r | |
652 | inc e ;04a1 test next #\r | |
653 | ld a,d ;04a2\r | |
654 | cp e ;04a3\r | |
655 | jr c,l04b1h ;04a4 \r | |
656 | ld a,e ;04a6\r | |
657 | ld hl,memalv ;04a7\r | |
658 | ld bc,alv_len ;04aa\r | |
659 | cpir ;04ad bank# allready allocated?\r | |
660 | jr z,l04a1h ;04af if yes, search for next\r | |
661 | l04b1h:\r | |
662 | ex de,hl ;04b1\r | |
663 | pop bc ;04b2\r | |
664 | pop de ;04b3\r | |
665 | ret ;04b4\r | |
666 | \r | |
667 | \r | |
668 | sub_04b5h:\r | |
669 | ld a,l ;04b5\r | |
670 | cp 012h ;04b6\r | |
671 | ccf ;04b8\r | |
672 | ret c ;04b9\r | |
673 | push hl ;04ba\r | |
674 | ld hl,banktab ;04bb\r | |
675 | call add_hl_a\r | |
676 | ld (hl),b ;04c3\r | |
677 | call gencrc_alv ;04c4\r | |
678 | pop hl ;04c7\r | |
679 | or a ;04c8 clear carry\r | |
680 | ret ;04c9\r | |
681 | \r | |
682 | \r | |
683 | ;--------------------------------------------------------------\r | |
684 | ;\r | |
685 | ; de: Log. Address\r | |
686 | ; a: Bank number\r | |
687 | ;\r | |
688 | ;out ahl: Phys. (linear) Address\r | |
689 | \r | |
690 | \r | |
691 | bnk2phys:\r | |
692 | push hl\r | |
693 | ld hl,banktab\r | |
694 | call add_hl_a\r | |
695 | ld a,(hl)\r | |
696 | pop hl\r | |
697 | \r | |
698 | ; fall thru\r | |
699 | ;--------------------------------------------------------------\r | |
700 | ;\r | |
701 | ; de: Log. Address\r | |
702 | ; a: Bank (bbr)\r | |
703 | ;\r | |
704 | ; OP: ahl = (a<<12) + (d<<8) + e\r | |
705 | ;\r | |
706 | ;out ehl: Phys. (linear) Address\r | |
707 | \r | |
708 | \r | |
709 | log2phys:\r | |
710 | push bc ;\r | |
711 | ld c,a ;\r | |
712 | ld b,16 ;\r | |
713 | mlt bc ;bc = a<<4\r | |
714 | ld l,d ;\r | |
715 | ld h,0 ;\r | |
716 | add hl,bc ;bc + d == a<<4 + d \r | |
717 | ld a,h ;\r | |
718 | ld h,l ;\r | |
719 | ld l,e ;\r | |
720 | pop bc ;\r | |
721 | ret ;\r | |
722 | \r | |
723 | \r | |
724 | ;--------------------------------------------------------------\r | |
725 | ;\r | |
726 | ;return:\r | |
727 | ; hl = hl + a\r | |
728 | ; Flags undefined\r | |
729 | ;\r | |
730 | \r | |
731 | add_hl_a:\r | |
732 | add a,l \r | |
733 | ld l,a \r | |
734 | ret nc \r | |
735 | inc h \r | |
736 | ret \r | |
737 | \r | |
738 | ; ---------------------------------------------------------\r | |
739 | \r | |
740 | sysramw:\r | |
741 | \r | |
742 | .phase isvsw_loc\r | |
743 | topcodsys:\r | |
744 | \r | |
745 | ; Trampoline for interrupt routines in banked ram.\r | |
746 | ; Switch stack pointer to "system" stack in top ram\r | |
747 | ; Save cbar\r | |
748 | \r | |
749 | isv_sw: ;\r | |
750 | ex (sp),hl ; save hl, return adr in hl\r | |
751 | push de ;\r | |
752 | push af ;\r | |
753 | ex de,hl ;\r | |
754 | ld hl,0 ;\r | |
755 | add hl,sp ;\r | |
756 | ld a,h ;\r | |
757 | cp 0f8h ;\r | |
758 | jr nc,isw_1 ;\r | |
759 | ld sp,$stack ;\r | |
760 | isw_1:\r | |
761 | push hl ;\r | |
762 | in0 h,(cbar) ;\r | |
763 | push hl ;\r | |
764 | ld a,SYS$CBAR ;\r | |
765 | out0 (cbar),a ;\r | |
766 | ex de,hl ;\r | |
767 | ld e,(hl) ;\r | |
768 | inc hl ;\r | |
769 | ld d,(hl) ;\r | |
770 | ex de,hl ;\r | |
771 | push bc ;\r | |
772 | call jphl ;\r | |
773 | \r | |
774 | pop bc ;\r | |
775 | pop hl ;\r | |
776 | out0 (cbar),h ;\r | |
777 | pop hl ;\r | |
778 | ld sp,hl ;\r | |
779 | pop af ;\r | |
780 | pop de ;\r | |
781 | pop hl ;\r | |
782 | ei ;\r | |
783 | ret ;\r | |
784 | jphl:\r | |
785 | jp (hl) ;\r | |
786 | \r | |
787 | ; ---------------------------------------------------------\r | |
788 | \r | |
789 | iprt0:\r | |
790 | push af\r | |
791 | push hl\r | |
792 | in0 a,(tcr)\r | |
793 | in0 a,(tmdr0l)\r | |
794 | in0 a,(tmdr0h)\r | |
795 | ld a,(tim_ms)\r | |
796 | inc a\r | |
797 | cp 100\r | |
798 | jr nz,iprt_1\r | |
799 | xor a\r | |
800 | ld hl,(tim_s)\r | |
801 | inc hl\r | |
802 | ld (tim_s),hl\r | |
803 | iprt_1:\r | |
804 | ld (tim_ms),a\r | |
805 | pop hl\r | |
806 | pop af\r | |
807 | ei\r | |
808 | ret\r | |
809 | \r | |
810 | ; ---------------------------------------------------------\r | |
811 | \r | |
812 | sp.int0:\r | |
813 | ld a,0d0h\r | |
814 | jr sp.i.1\r | |
815 | sp.int.len equ $-sp.int0\r | |
816 | ld a,0d1h\r | |
817 | jr sp.i.1\r | |
818 | ld a,0d2h\r | |
819 | jr sp.i.1\r | |
820 | ld a,0d3h\r | |
821 | jr sp.i.1\r | |
822 | ld a,0d4h\r | |
823 | jr sp.i.1\r | |
824 | ld a,0d5h\r | |
825 | jr sp.i.1\r | |
826 | ld a,0d6h\r | |
827 | jr sp.i.1\r | |
828 | ld a,0d7h\r | |
829 | jr sp.i.1\r | |
830 | ld a,0d8h\r | |
831 | sp.i.1:\r | |
832 | ; out (80h),a\r | |
833 | halt\r | |
834 | \r | |
835 | curph defl $\r | |
836 | .dephase\r | |
837 | sysrame:\r | |
838 | .phase curph\r | |
839 | tim_ms: db 0\r | |
840 | tim_s: dw 0\r | |
841 | .dephase\r | |
842 | \r | |
843 | ;-----------------------------------------------------\r | |
844 | \r | |
845 | dseg\r | |
846 | \r | |
847 | ds 1\r | |
848 | banktabsys:\r | |
849 | ds 1 ;0c001h\r | |
850 | ds 1 ;0c002h\r | |
851 | banktab:\r | |
852 | ds BANKS ;0c003h\r | |
853 | memalv:\r | |
854 | ds 512/4 ;Number of 4k blocks\r | |
855 | alv_len equ $-memalv\r | |
856 | crc_len equ $-banktabsys\r | |
857 | \r | |
858 | crc_memalv: \r | |
859 | ds 2 ;\r | |
860 | \r | |
861 | cseg\r | |
862 | \r | |
863 | ;.phase 0ffc0h\r | |
864 | ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r | |
865 | ;.dephase\r | |
866 | \r | |
867 | ;.phase 0fffch\r | |
868 | mark_55AA equ 0fffch\r | |
869 | ;ds 4 ; 0fffch\r | |
870 | ;.dephase\r | |
871 | \r | |
872 | \r | |
873 | end\r | |
874 | \r |