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Commit | Line | Data |
---|---|---|
fecee241 L |
1 | \r |
2 | FALSE equ 0\r | |
3 | TRUE equ NOT FALSE\r | |
4 | \r | |
29605004 L |
5 | ;-----------------------------------------------------\r |
6 | ; CPU and BANKING types\r | |
7 | \r | |
a16ba2b0 | 8 | \r |
fecee241 L |
9 | CPU_Z180 equ TRUE\r |
10 | CPU_Z80 equ FALSE\r | |
11 | \r | |
12 | ROMSYS equ FALSE\r | |
a16ba2b0 | 13 | \r |
29605004 L |
14 | AVRCLK equ 18432 ;[KHz]\r |
15 | \r | |
fecee241 | 16 | if CPU_Z180\r |
29605004 L |
17 | \r |
18 | ;-----------------------------------------------------\r | |
19 | FOSC equ AVRCLK/2 ;Oscillator frequency [KHz]\r | |
20 | PHI equ FOSC*2 ;CPU frequency (clock doubler enabled)\r | |
a16ba2b0 L |
21 | \r |
22 | ;-----------------------------------------------------\r | |
23 | ; Programmable Reload Timer (PRT)\r | |
24 | \r | |
25 | PRT_PRE equ 20 ;PRT prescaler\r | |
26 | \r | |
27 | ; Reload value for 10 ms Int. (0.1KHz):\r | |
28 | ; tc10ms = phi/prescale/0.1KHz = phi / (prescale/10)\r | |
29 | \r | |
30 | PRT_TC10MS equ PHI / (PRT_PRE/10)\r | |
31 | \r | |
32 | ;-----------------------------------------------------\r | |
33 | ; MMU\r | |
34 | \r | |
fecee241 L |
35 | COMMON_SIZE equ 4*1024 ;Common Area size in bytes\r |
36 | ;must be multiple of 4K\r | |
37 | \r | |
38 | if (COMMON_SIZE mod 1000h) \r | |
39 | .printx COMMON_SIZE not multiple of 4K!\r | |
40 | end ;stop assembly\r | |
41 | endif\r | |
42 | \r | |
43 | CSK equ COMMON_SIZE/1000h ;\r | |
44 | CA equ 10h - CSK ;common area start\r | |
45 | BA equ 0 ;banked area start\r | |
46 | \r | |
47 | SYS$CBR equ 0\r | |
48 | SYS$CBAR equ CA<<4 + CA ;CBAR in system mode\r | |
49 | USR$CBAR equ CA<<4 + BA ;CBAR in user mode (CP/M)\r | |
a16ba2b0 L |
50 | \r |
51 | \r | |
52 | BANKS equ 18 ;max nr. of banks\r | |
53 | \r | |
54 | ;-----------------------------------------------------\r | |
55 | \r | |
56 | CREFSH equ 0 ;Refresh rate register (disable refresh)\r | |
57 | CWAITIO equ 3 shl IWI0 ;Max I/O Wait States, 0 Memory Wait States\r | |
58 | \r | |
fecee241 L |
59 | endif ;CPU_Z180\r |
60 | if CPU_Z80\r | |
29605004 L |
61 | \r |
62 | PHI equ AVRCLK/5 ;CPU frequency [KHz]\r | |
63 | BAUDCLCK equ AVRCLK/10 ;Baudrate clock [KHz]\r | |
64 | ;BDCLK16 equ\r | |
65 | \r | |
66 | SIOAD EQU 0bch\r | |
67 | SIOAC EQU 0bdh\r | |
68 | SIOBD EQU 0beh\r | |
69 | SIOBC EQU 0bfh\r | |
70 | \r | |
71 | CTC0 EQU 0f4h\r | |
72 | CTC1 EQU 0f5h\r | |
73 | CTC2 EQU 0f6h\r | |
74 | CTC3 EQU 0f7h\r | |
75 | \r | |
76 | ;\r | |
77 | ; Init Serial I/O for console input and output (SIO-A)\r | |
78 | ;\r | |
79 | ; Baudrate clock: 1843200 Hz (Bus connector pin A17)\r | |
80 | ;\r | |
81 | ; Baudrate Divider SIO CTC\r | |
82 | ; ---------------------------------\r | |
83 | ; 115200 16 16 1\r | |
84 | ; 57600 32 16 2\r | |
85 | ; 38400 48 16 3\r | |
86 | ; 19200 96 16 6\r | |
87 | ; 9600 192 16 12\r | |
88 | ; 4800 384 16 24\r | |
89 | ; 2400 768 16 48\r | |
90 | ; 1200 1536 16 96\r | |
91 | ; 600 3072 16 192\r | |
92 | ; 300 6144 64 92\r | |
93 | \r | |
fecee241 | 94 | endif ; CPU_Z80\r |
a16ba2b0 | 95 | \r |
fecee241 | 96 | if ROMSYS\r |
a16ba2b0 L |
97 | c$rom equ 0a5h\r |
98 | ROM_EN equ 0C0h\r | |
99 | ROM_DIS equ ROMEN+1\r | |
fecee241 | 100 | if CPU_Z180\r |
a16ba2b0 | 101 | CWAITROM equ 2 shl MWI0\r |
fecee241 L |
102 | endif\r |
103 | endif\r | |
a16ba2b0 L |
104 | \r |
105 | \r | |
106 | DRSTNUM equ 30h ;DDTZ Restart vector (breakpoints)\r | |
107 | \r | |
108 | \r | |
6a4e9540 L |
109 | mrx.fifo_len equ 256\r |
110 | mtx.fifo_len equ 256\r | |
a16ba2b0 | 111 | \r |
6a4e9540 L |
112 | ci.fifo_len equ 128\r |
113 | co.fifo_len equ 256\r | |
a16ba2b0 L |
114 | \r |
115 | s1.rx_len equ 256 ;Serial 1 (ASCI1) buffers\r | |
116 | s1.tx_len equ 256 ;\r | |
117 | \r | |
29605004 L |
118 | AVRINT5 equ 4Fh\r |
119 | AVRINT6 equ 5Fh\r | |
bad2d92d | 120 | ;PMSG equ 80h\r |
a16ba2b0 L |
121 | \r |
122 | ;-----------------------------------------------------\r | |
fecee241 | 123 | ; Definition of (logical) top 2 memory pages\r |
a16ba2b0 L |
124 | \r |
125 | sysram_start equ 0FE00h\r | |
126 | stacksize equ 80\r | |
127 | \r | |
128 | isvsw_loc equ 0FEE0h\r | |
129 | \r | |
130 | ivtab equ 0ffc0h ;int vector table\r | |
131 | iv2tab equ ivtab + 2*9\r | |
132 | \r | |
133 | \r | |
134 | \r | |
135 | ;-----------------------------------------------------\r | |
136 | \r | |
137 | \r | |
138 | o.mask equ -3\r | |
139 | o.in_idx equ -2\r | |
140 | o.out_idx equ -1\r | |
815c1735 | 141 | \r |
a16ba2b0 L |
142 | .lall\r |
143 | \r | |
144 | mkbuf macro name,size\r | |
145 | if ((size & (size-1)) ne 0) or (size gt 256)\r | |
146 | .printx Error: buffer ^size must be power of 2 and in range 0..256!\r | |
147 | name&.mask equ ;wrong size error\r | |
148 | else\r | |
815c1735 | 149 | ds 3\r |
a16ba2b0 L |
150 | name:: ds size\r |
151 | name&.mask equ low (size-1)\r | |
152 | if size ne 0\r | |
153 | name&.end equ $-1\r | |
154 | name&.len equ size\r | |
155 | endif\r | |
156 | endif\r | |
157 | endm\r | |
158 | \r | |
159 | ;-----------------------------------------------------\r | |
160 | \r | |
815c1735 | 161 | inidat macro\r |
a16ba2b0 | 162 | cseg\r |
815c1735 | 163 | ??ps.a defl $\r |
a16ba2b0 L |
164 | endm\r |
165 | \r | |
166 | inidate macro\r | |
167 | ??ps.len defl $ - ??ps.a\r | |
168 | dseg\r | |
169 | ds ??ps.len\r | |
170 | endm\r | |
171 | \r |