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1 | /* | |
2 | * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include "common.h" | |
8 | #include <stdlib.h> | |
9 | #include <string.h> | |
10 | #include <stdbool.h> | |
11 | #include <util/atomic.h> | |
12 | ||
13 | #include "background.h" | |
14 | #include "env.h" | |
15 | #include "ff.h" | |
16 | #include "serial.h" | |
17 | #include "z80-if.h" | |
18 | #include "debug.h" | |
19 | #include "print-utils.h" | |
20 | #include "z180-serv.h" | |
21 | #include "timer.h" | |
22 | ||
23 | ||
24 | #define DEBUG_CPM_SDIO 0 /* set to 1 to debug */ | |
25 | ||
26 | #define debug_cpmsd(fmt, args...) \ | |
27 | debug_cond(DEBUG_CPM_SDIO, fmt, ##args) | |
28 | ||
29 | ||
30 | ||
31 | /*--------------------------------------------------------------------------*/ | |
32 | ||
33 | ||
34 | uint8_t z80_get_byte(uint32_t adr) | |
35 | { | |
36 | uint8_t data; | |
37 | ||
38 | z80_bus_cmd(Request); | |
39 | data = z80_read(adr); | |
40 | z80_bus_cmd(Release); | |
41 | ||
42 | return data; | |
43 | } | |
44 | ||
45 | ||
46 | /*--------------------------------------------------------------------------*/ | |
47 | ||
48 | struct msg_item { | |
49 | uint8_t fct; | |
50 | uint8_t sub_min, sub_max; | |
51 | void (*func)(uint8_t, int, uint8_t *); | |
52 | }; | |
53 | ||
54 | uint32_t msg_to_addr(uint8_t *msg) | |
55 | { | |
56 | union { | |
57 | uint32_t as32; | |
58 | uint8_t as8[4]; | |
59 | } addr; | |
60 | ||
61 | addr.as8[0] = msg[0]; | |
62 | addr.as8[1] = msg[1]; | |
63 | addr.as8[2] = msg[2]; | |
64 | addr.as8[3] = 0; | |
65 | ||
66 | return addr.as32; | |
67 | } | |
68 | ||
69 | ||
70 | static int msg_xmit_header(uint8_t func, uint8_t subf, int len) | |
71 | { | |
72 | z80_memfifo_putc(fifo_msgout, 0xAE); | |
73 | z80_memfifo_putc(fifo_msgout, len+2); | |
74 | z80_memfifo_putc(fifo_msgout, func); | |
75 | z80_memfifo_putc(fifo_msgout, subf); | |
76 | ||
77 | return 0; | |
78 | } | |
79 | ||
80 | int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg) | |
81 | { | |
82 | msg_xmit_header(func, subf, len); | |
83 | while (len--) | |
84 | z80_memfifo_putc(fifo_msgout, *msg++); | |
85 | ||
86 | return 0; | |
87 | } | |
88 | ||
89 | void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg) | |
90 | { | |
91 | (void)len; | |
92 | ||
93 | z80_memfifo_init(subf, msg_to_addr(msg)); | |
94 | } | |
95 | ||
96 | ||
97 | void do_msg_char_out(uint8_t subf, int len, uint8_t * msg) | |
98 | { | |
99 | (void)subf; | |
100 | ||
101 | while (len--) | |
102 | putchar(*msg++); | |
103 | } | |
104 | ||
105 | /* echo message */ | |
106 | void do_msg_echo(uint8_t subf, int len, uint8_t * msg) | |
107 | { | |
108 | (void)subf; | |
109 | ||
110 | /* send re-echo */ | |
111 | msg_xmit(1, 3, len, msg); | |
112 | } | |
113 | ||
114 | /* get timer */ | |
115 | void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg) | |
116 | { | |
117 | (void)len; (void)msg; | |
118 | ||
119 | uint32_t time_ms = get_timer(0); | |
120 | ||
121 | msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms); | |
122 | } | |
123 | ||
124 | /* ---------------------------------------------------------------------------*/ | |
125 | ||
126 | #define MAX_DRIVE 4 | |
127 | #define BLOCK_SIZE 512 | |
128 | #define TPA_BASE 0x10000 | |
129 | #define COMMON_BASE 0xC000 | |
130 | ||
131 | struct cpm_drive_s { | |
132 | uint8_t drv; | |
133 | uint8_t device; | |
134 | char *img_name; | |
135 | bool dirty; | |
136 | FIL fd; | |
137 | }; | |
138 | ||
139 | static uint8_t disk_buffer[BLOCK_SIZE]; | |
140 | static struct cpm_drive_s drv_table[MAX_DRIVE]; | |
141 | static int handle_cpm_drv_to; | |
142 | ||
143 | #define f_dirty(fp) ((fp)->fs->wflag != 0) | |
144 | ||
145 | ||
146 | int cpm_drv_to(int state) | |
147 | { | |
148 | static uint32_t ts; | |
149 | ||
150 | switch(state) { | |
151 | case 0: | |
152 | break; | |
153 | ||
154 | case 1: | |
155 | ts = get_timer(0); | |
156 | state = 2; | |
157 | break; | |
158 | ||
159 | case 2: | |
160 | if (get_timer(ts) > 1000) { | |
161 | for (uint_fast8_t i=0; i < MAX_DRIVE; i++) { | |
162 | // if (&drv_table[i].fd && f_dirty(&drv_table[i].fd)) { | |
163 | if (drv_table[i].dirty) { | |
164 | f_sync(&drv_table[i].fd); | |
165 | drv_table[i].dirty = false; | |
166 | debug_cpmsd("## %7lu f_sync: %c:\n", get_timer(0), i+'A'); | |
167 | } | |
168 | } | |
169 | state = 0; | |
170 | } | |
171 | } | |
172 | return state; | |
173 | } | |
174 | ||
175 | ||
176 | void msg_cpm_result(uint8_t subf, uint8_t rc, int res) | |
177 | { | |
178 | uint8_t result_msg[3]; | |
179 | ||
180 | if (res) | |
181 | rc |= 0x80; | |
182 | ||
183 | result_msg[0] = rc; | |
184 | result_msg[1] = res; | |
185 | result_msg[2] = res >> 8; | |
186 | ||
187 | if (rc) { | |
188 | debug_cpmsd("###%7lu error rc: %.02x, res: %d\n", get_timer(0), rc, res); | |
189 | } | |
190 | ||
191 | msg_xmit(2, subf, sizeof(result_msg), result_msg); | |
192 | } | |
193 | ||
194 | /* | |
195 | db 2 ; disk command | |
196 | ds 1 ; subcommand (login/read/write) | |
197 | ds 1 ; @adrv (8 bits) +0 | |
198 | ds 1 ; @rdrv (8 bits) +1 | |
199 | ds 3 ; @xdph (24 bits) +2 | |
200 | */ | |
201 | ||
202 | void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg) | |
203 | { | |
204 | ||
205 | FRESULT res = 0; | |
206 | uint8_t drv; | |
207 | char *np; | |
208 | ||
209 | (void)subf; | |
210 | ||
211 | if (len != 5) { /* TODO: check adrv, rdrv */ | |
212 | return msg_cpm_result(subf, 0x01, res); | |
213 | } | |
214 | ||
215 | debug_cpmsd("\n## %7lu login: %c:\n", get_timer(0), msg[0]+'A'); | |
216 | ||
217 | ||
218 | drv = msg[0]; | |
219 | if ( drv>= MAX_DRIVE) { | |
220 | return msg_cpm_result(subf, 0x02, res); | |
221 | } | |
222 | ||
223 | /* | |
224 | uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2]; | |
225 | */ | |
226 | ||
227 | if (drv_table[drv].img_name != NULL) { | |
228 | debug_cpmsd("## %7lu close: '%s'\n", get_timer(0), drv_table[drv].img_name); | |
229 | f_close(&drv_table[drv].fd); | |
230 | drv_table[drv].dirty = false; | |
231 | free(drv_table[drv].img_name); | |
232 | drv_table[drv].img_name = NULL; | |
233 | } | |
234 | ||
235 | strcpy_P((char *)disk_buffer, PSTR("dsk0")); | |
236 | disk_buffer[3] = msg[0] + '0'; | |
237 | if (((np = getenv((char*)disk_buffer)) == NULL) || | |
238 | ((drv_table[drv].img_name = strdup(np)) == NULL)) { | |
239 | return msg_cpm_result(subf, 0x03, res); | |
240 | } | |
241 | ||
242 | ||
243 | res = f_open(&drv_table[drv].fd, drv_table[drv].img_name, | |
244 | FA_WRITE | FA_READ); | |
245 | ||
246 | debug_cpmsd("## %7lu open: '%s', (env: '%s'), res: %d\n", get_timer(0), | |
247 | drv_table[drv].img_name, disk_buffer, res); | |
248 | ||
249 | /* send result*/ | |
250 | msg_cpm_result(subf, 0x00, res); | |
251 | } | |
252 | ||
253 | ||
254 | /* | |
255 | db 2 ; disk command | |
256 | ds 1 ; subcommand (login/read/write) | |
257 | ds 1 ; @adrv (8 bits) +0 | |
258 | ds 1 ; @rdrv (8 bits) +1 | |
259 | ds 2 ; @trk (16 bits) +2 | |
260 | ds 2 ; @sect(16 bits) +4 | |
261 | ds 1 ; @cnt (8 bits) +6 | |
262 | ds 3 ; phys. transfer addr +7 | |
263 | */ | |
264 | ||
265 | #define ADRV 0 | |
266 | #define RDRV 1 | |
267 | #define TRK 2 | |
268 | #define SEC 4 | |
269 | #define CNT 6 | |
270 | #define ADDR 7 | |
271 | ||
272 | void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg) | |
273 | { | |
274 | uint8_t drv; | |
275 | uint32_t addr; | |
276 | uint32_t pos; | |
277 | uint8_t secs; | |
278 | bool dowrite = (subf == 2); | |
279 | FRESULT res = 0; | |
280 | uint8_t rc = 0; | |
281 | bool buserr = 0; | |
282 | ||
283 | if (len != 10) { /* TODO: check adrv, rdrv */ | |
284 | return msg_cpm_result(subf, 0x01, res); | |
285 | } | |
286 | ||
287 | drv = msg[ADRV]; | |
288 | if ( drv>= MAX_DRIVE) { | |
289 | return msg_cpm_result(subf, 0x02, res); | |
290 | } | |
291 | ||
292 | secs = msg[CNT]; | |
293 | addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR]; | |
294 | ||
295 | ||
296 | /* TODO: tracks per sector from dpb */ | |
297 | pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8 | |
298 | + ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * BLOCK_SIZE; | |
299 | ||
300 | debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, " | |
301 | "addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read", | |
302 | msg[ADRV]+'A', ((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC], | |
303 | pos, msg[CNT], addr); | |
304 | ||
305 | res = f_lseek(&drv_table[drv].fd, pos); | |
306 | while (!res && secs--) { | |
307 | unsigned int cnt, br; | |
308 | ||
309 | /* check bank boundary crossing */ | |
310 | cnt = 0; | |
311 | if (addr < (TPA_BASE + COMMON_BASE) && | |
312 | (addr + BLOCK_SIZE) > (TPA_BASE + COMMON_BASE)) { | |
313 | cnt = (TPA_BASE + COMMON_BASE) - addr; | |
314 | } | |
315 | ||
316 | if (cnt) { | |
317 | debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr, cnt); | |
318 | debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr+cnt-TPA_BASE, BLOCK_SIZE-cnt); | |
319 | } | |
320 | ||
321 | if (dowrite) { | |
322 | if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) { | |
323 | buserr = 1; | |
324 | break; | |
325 | } else { | |
326 | if (cnt) { | |
327 | z80_read_block(disk_buffer, addr, cnt); | |
328 | addr = addr + cnt - TPA_BASE; | |
329 | } | |
330 | z80_read_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt); | |
331 | z80_bus_cmd(Release); | |
332 | } | |
333 | res = f_write(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br); | |
334 | } else { | |
335 | res = f_read(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br); | |
336 | if (res == FR_OK && br == BLOCK_SIZE) { | |
337 | if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) { | |
338 | buserr = 1; | |
339 | break; | |
340 | } else { | |
341 | if (cnt) { | |
342 | z80_write_block(disk_buffer, addr, cnt); | |
343 | addr = addr + cnt - TPA_BASE; | |
344 | } | |
345 | z80_write_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt); | |
346 | z80_bus_cmd(Release); | |
347 | } | |
348 | } | |
349 | } | |
350 | ||
351 | if (br != BLOCK_SIZE) { | |
352 | debug_cpmsd("## %7lu f_read res: %d, bytes rd/wr: %u\n", get_timer(0), res, br); | |
353 | dump_ram(disk_buffer, 0, 64, "Read Data"); | |
354 | res = -1; | |
355 | } | |
356 | ||
357 | addr += BLOCK_SIZE; | |
358 | } | |
359 | ||
360 | if (dowrite && !res) { | |
361 | // res = f_sync(&drv_table[drv].fd); | |
362 | drv_table[drv].dirty = true; | |
363 | bg_setstat(handle_cpm_drv_to, 1); | |
364 | } | |
365 | ||
366 | ||
367 | if (buserr) { | |
368 | debug_cpmsd("Bus timeout\n"); | |
369 | rc = 0x03; | |
370 | } | |
371 | ||
372 | /* send result*/ | |
373 | msg_cpm_result(subf, rc, res); | |
374 | } | |
375 | ||
376 | ||
377 | const FLASH struct msg_item z80_messages[] = | |
378 | { | |
379 | { 0, /* fct nr. */ | |
380 | 1, 3, /* sub fct nr. from, to */ | |
381 | do_msg_ini_memfifo}, | |
382 | { 1, | |
383 | 1, 1, | |
384 | do_msg_char_out}, | |
385 | { 1, | |
386 | 2, 2, | |
387 | do_msg_echo}, | |
388 | { 2, | |
389 | 0, 0, | |
390 | do_msg_cpm_login}, | |
391 | { 2, | |
392 | 1, 2, | |
393 | do_msg_cpm_rw}, | |
394 | { 3, | |
395 | 1, 1, | |
396 | do_msg_get_timer}, | |
397 | { 0xff, /* end mark */ | |
398 | 0, 0, | |
399 | 0}, | |
400 | ||
401 | }; | |
402 | ||
403 | ||
404 | ||
405 | ||
406 | void do_message(int len, uint8_t *msg) | |
407 | { | |
408 | uint8_t fct, sub_fct; | |
409 | int_fast8_t i = 0; | |
410 | ||
411 | if (len >= 2) { | |
412 | fct = *msg++; | |
413 | sub_fct = *msg++; | |
414 | len -= 2; | |
415 | ||
416 | while (fct != z80_messages[i].fct) { | |
417 | if (z80_messages[i].fct == 0xff) { | |
418 | DBG_P(1, "do_message: Unknown function: %i, %i\n", | |
419 | fct, sub_fct); | |
420 | return; /* TODO: unknown message # */ | |
421 | } | |
422 | ||
423 | ++i; | |
424 | } | |
425 | ||
426 | while (fct == z80_messages[i].fct) { | |
427 | if (sub_fct >= z80_messages[i].sub_min && | |
428 | sub_fct <= z80_messages[i].sub_max ) | |
429 | break; | |
430 | ++i; | |
431 | } | |
432 | ||
433 | if (z80_messages[i].fct != fct) { | |
434 | DBG_P(1, "do_message: Unknown sub function: %i, %i\n", | |
435 | fct, sub_fct); | |
436 | return; /* TODO: unknown message sub# */ | |
437 | } | |
438 | ||
439 | (z80_messages[i].func)(sub_fct, len, msg); | |
440 | ||
441 | ||
442 | } else { | |
443 | /* TODO: error */ | |
444 | DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len); | |
445 | } | |
446 | } | |
447 | ||
448 | ||
449 | ||
450 | #define CTRBUF_LEN 256 | |
451 | ||
452 | void check_msg_fifo(void) | |
453 | { | |
454 | int ch; | |
455 | static int_fast8_t state; | |
456 | static int msglen,idx; | |
457 | static uint8_t buffer[CTRBUF_LEN]; | |
458 | ||
459 | while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) { | |
460 | switch (state) { | |
461 | case 0: /* wait for start of message */ | |
462 | if (ch == 0xAE) { /* TODO: magic number */ | |
463 | msglen = 0; | |
464 | idx = 0; | |
465 | state = 1; | |
466 | } | |
467 | break; | |
468 | case 1: /* get msg len */ | |
469 | if (ch > 0 && ch <= CTRBUF_LEN) { | |
470 | msglen = ch; | |
471 | state = 2; | |
472 | } else | |
473 | state = 0; | |
474 | break; | |
475 | case 2: /* get message */ | |
476 | buffer[idx++] = ch; | |
477 | if (idx == msglen) { | |
478 | do_message(msglen, buffer); | |
479 | state = 0; | |
480 | } | |
481 | break; | |
482 | } | |
483 | } | |
484 | } | |
485 | ||
486 | ||
487 | int msg_handling(int state) | |
488 | { | |
489 | uint8_t pending; | |
490 | ||
491 | ATOMIC_BLOCK(ATOMIC_FORCEON) { | |
492 | pending = (Stat & S_MSG_PENDING) != 0; | |
493 | Stat &= ~S_MSG_PENDING; | |
494 | } | |
495 | ||
496 | if (pending) { | |
497 | switch (state) { | |
498 | case 0: /* need init */ | |
499 | /* Get address of fifo_list */ | |
500 | z80_bus_cmd(Request); | |
501 | uint32_t fifo_list = z80_read(0x40) + | |
502 | ((uint16_t) z80_read(0x41) << 8) + | |
503 | ((uint32_t) z80_read(0x42) << 16); | |
504 | z80_bus_cmd(Release); | |
505 | if (fifo_list != 0) { | |
506 | /* Get address of fifo 0 */ | |
507 | z80_bus_cmd(Request); | |
508 | uint32_t fifo_addr = z80_read(fifo_list) + | |
509 | ((uint16_t) z80_read(fifo_list+1) << 8) + | |
510 | ((uint32_t) z80_read(fifo_list+2) << 16); | |
511 | z80_bus_cmd(Release); | |
512 | if (fifo_addr != 0) { | |
513 | z80_memfifo_init(fifo_msgin, fifo_addr); | |
514 | state = 1; | |
515 | } | |
516 | } | |
517 | break; | |
518 | case 1: /* awaiting messages */ | |
519 | check_msg_fifo(); | |
520 | break; | |
521 | } | |
522 | } | |
523 | ||
524 | return state; | |
525 | } | |
526 | ||
527 | ||
528 | static int handle_msg_handling; | |
529 | ||
530 | void setup_z180_serv(void) | |
531 | { | |
532 | ||
533 | handle_msg_handling = bg_register(msg_handling, 0); | |
534 | handle_cpm_drv_to = bg_register(cpm_drv_to, 0); | |
535 | } | |
536 | ||
537 | void restart_z180_serv(void) | |
538 | { | |
539 | z80_bus_cmd(Request); | |
540 | z80_write(0x40, 0); | |
541 | z80_write(0x41, 0); | |
542 | z80_write(0x42, 0); | |
543 | z80_bus_cmd(Release); | |
544 | ||
545 | for (int i = 0; i < NUM_FIFOS; i++) | |
546 | z80_memfifo_init(i, 0); | |
547 | bg_setstat(handle_msg_handling, 0); | |
548 | ||
549 | } | |
550 | ||
551 | /*--------------------------------------------------------------------------*/ | |
552 | ||
553 | const FLASH uint8_t iniprog[] = { | |
554 | 0xAF, // xor a | |
555 | 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh | |
556 | 0x3E, 0x30, // ld a,030h | |
557 | 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states | |
558 | }; | |
559 | ||
560 | const FLASH uint8_t sertest[] = { | |
561 | 0xAF, // xor a | |
562 | 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh | |
563 | 0x3E, 0x30, // ld a,030h | |
564 | 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states | |
565 | 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0 | |
566 | 0xED, 0x39, 0x03, // out0 (cntlb1),a | |
567 | 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ; | |
568 | 0xED, 0x39, 0x01, // out0 (cntla1),a | |
569 | 0x3E, 0x00, // ld a,0 | |
570 | 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts | |
571 | 0xED, 0x38, 0x05, //l0:in0 a,(stat1) | |
572 | 0xE6, 0x80, // and 80h | |
573 | 0x28, 0xF9, // jr z,l0 | |
574 | 0xED, 0x00, 0x09, // in0 b,(rdr1) | |
575 | 0xED, 0x38, 0x05, //l1:in0 a,(stat1) | |
576 | 0xE6, 0x02, // and 02h | |
577 | 0x28, 0xF9, // jr z,l1 | |
578 | 0xED, 0x01, 0x07, // out0 (tdr1),b | |
579 | 0x18, 0xEA, // jr l0 | |
580 | }; | |
581 | ||
582 | const FLASH uint8_t test1[] = { | |
583 | 0xAF, // xor a | |
584 | 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh | |
585 | 0x3E, 0x30, // ld a,030h | |
586 | 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states | |
587 | 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers | |
588 | 0x06, 0x08, // ld b,dmct_e-dmclrt | |
589 | 0x0E, 0x20, // ld c,sar0l | |
590 | 0xED, 0x93, // otimr | |
591 | 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst | |
592 | 0xED, 0x39, 0x31, // out0 (dmode),a ; | |
593 | 0x3E, 0x62, // ld a,062h ;enable dma0, | |
594 | 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k | |
595 | 0x18, 0xFB, // jr cl_1 ; | |
596 | 0x00, 0x00, //dmclrt: dw 0 ;src (inc) | |
597 | 0x00, // db 0 ;src | |
598 | 0x00, 0x00, // dw 0 ;dst (inc), | |
599 | 0x00, // db 0 ;dst | |
600 | 0x00, 0x00, // dw 0 ;count (64k) | |
601 | }; |