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cloudbase.mooo.com Git - z180-stamp.git/blob - avr/z180-serv.c
051d6ef108cae2ea7b5418b753a83c44c32c0aad
5 //#include <avr/power.h>
6 //#include <avr/pgmspace.h>
7 //#include <util/atomic.h>
8 //#include <avr/sleep.h>
18 /*--------------------------------------------------------------------------*/
20 uint32_t z80_sram_cmp(uint32_t addr
, uint32_t length
, uint8_t wval
, int inc
)
23 int_fast8_t errors
= 0;
25 DBG_P(1, "SRAM: Check 0x%.5lx byte... ", length
);
27 if ((rval
= z80_read(addr
)) != wval
) {
29 DBG_P(1, "\nSRAM: Address W R\n" \
30 " ------------------\n");
37 DBG_P(1, " 0x%.5lx 0x%.2x 0x%.2x\n", addr
, wval
, rval
);
47 void z80_sram_fill(uint32_t addr
, uint32_t length
, uint8_t startval
, int inc
)
49 printf("SRAM: Write 0x%.5lx byte... ", length
);
51 z80_write(addr
, startval
);
60 void z80_sram_fill_string(uint32_t addr
, int length
, const char *text
)
66 z80_write(addr
++, c
= *p
++);
73 uint32_t z80_sram_cmp_string(uint32_t addr
, int length
, const char *text
)
80 if (z80_read(addr
) != c
)
89 const char * const qbfox
= "Zhe quick brown fox jumps over the lazy dog!";
90 const char * const qbcat
= "Zhe quick brown fox jumps over the lazy cat!";
94 uint8_t z80_get_byte(uint32_t adr
)
106 /*--------------------------------------------------------------------------*/
110 uint8_t sub_min
, sub_max
;
111 void (*func
)(uint8_t, int, uint8_t *);
114 uint32_t msg_to_addr(uint8_t *msg
)
121 addr
.as8
[0] = msg
[0];
122 addr
.as8
[1] = msg
[1];
123 addr
.as8
[2] = msg
[2];
129 void do_msg_ini_msgfifo(uint8_t subf
, int len
, uint8_t * msg
)
131 (void)subf
; (void)len
;
133 z80_init_msg_fifo(msg_to_addr(msg
));
137 void do_msg_ini_memfifo(uint8_t subf
, int len
, uint8_t * msg
)
141 z80_memfifo_init(subf
- 1, msg_to_addr(msg
));
145 void do_msg_char_out(uint8_t subf
, int len
, uint8_t * msg
)
154 const FLASH
struct msg_item z80_messages
[] =
157 0, 0, /* sub fct nr. from, to */
165 { 0xff, /* end mark */
174 void do_message(int len
, uint8_t *msg
)
176 uint8_t fct
, sub_fct
;
184 while (fct
!= z80_messages
[i
].fct
)
187 if (z80_messages
[i
].fct
== 0xff) {
188 DBG_P(1, "do_message: Unknown function: %i, %i\n",
190 return; /* TODO: unknown message # */
193 while (fct
== z80_messages
[i
].fct
) {
194 if (sub_fct
>= z80_messages
[i
].sub_min
&& sub_fct
<= z80_messages
[i
].sub_max
)
199 if (z80_messages
[i
].fct
!= fct
) {
200 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
202 return; /* TODO: unknown message sub# */
205 (z80_messages
[i
].func
)(sub_fct
, len
, msg
);
210 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len
);
216 #define CTRBUF_LEN 256
218 void check_msg_fifo(void)
221 static int_fast8_t state
;
222 static int msglen
,idx
;
223 static uint8_t buffer
[CTRBUF_LEN
];
225 while (state
!= 3 && (ch
= z80_msg_fifo_getc()) >= 0) {
227 case 0: /* wait for start of message */
234 case 1: /* get msg len */
235 if (ch
> 0 && ch
<= CTRBUF_LEN
) {
241 case 2: /* get message */
250 do_message(msglen
, buffer
);
256 /*--------------------------------------------------------------------------*/
259 void dump_mem(const FLASH
uint8_t *addr
, uint32_t len
)
261 DBG_P(1, "hdrom dump:");
263 DBG_P(1, "\n %.5x:", addr
);
264 for (unsigned i
= 0; i
<16; i
++)
265 DBG_P(1, " %.2x", *addr
++);
266 len
-= len
> 16 ? 16 : len
;
271 /*--------------------------------------------------------------------------*/
274 const FLASH
uint8_t iniprog
[] = {
276 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
277 0x3E, 0x30, // ld a,030h
278 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
281 const FLASH
uint8_t sertest
[] = {
283 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
284 0x3E, 0x30, // ld a,030h
285 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
286 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
287 0xED, 0x39, 0x03, // out0 (cntlb1),a
288 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
289 0xED, 0x39, 0x01, // out0 (cntla1),a
290 0x3E, 0x00, // ld a,0
291 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
292 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
293 0xE6, 0x80, // and 80h
294 0x28, 0xF9, // jr z,l0
295 0xED, 0x00, 0x09, // in0 b,(rdr1)
296 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
297 0xE6, 0x02, // and 02h
298 0x28, 0xF9, // jr z,l1
299 0xED, 0x01, 0x07, // out0 (tdr1),b
303 const FLASH
uint8_t test1
[] = {
305 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
306 0x3E, 0x30, // ld a,030h
307 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
308 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
309 0x06, 0x08, // ld b,dmct_e-dmclrt
310 0x0E, 0x20, // ld c,sar0l
312 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
313 0xED, 0x39, 0x31, // out0 (dmode),a ;
314 0x3E, 0x62, // ld a,062h ;enable dma0,
315 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
316 0x18, 0xFB, // jr cl_1 ;
317 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
319 0x00, 0x00, // dw 0 ;dst (inc),
321 0x00, 0x00, // dw 0 ;count (64k)