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cloudbase.mooo.com Git - z180-stamp.git/blob - avr/z180-serv.c
22dafe10484e6c7f49d4c74e8528a4c94a762599
2 * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <util/atomic.h>
13 #include "background.h"
19 #include "print-utils.h"
20 #include "z180-serv.h"
22 /*--------------------------------------------------------------------------*/
25 uint8_t z80_get_byte(uint32_t adr
)
37 /*--------------------------------------------------------------------------*/
41 uint8_t sub_min
, sub_max
;
42 void (*func
)(uint8_t, int, uint8_t *);
45 uint32_t msg_to_addr(uint8_t *msg
)
61 static int msg_xmit_header(uint8_t func
, uint8_t subf
, int len
)
63 z80_memfifo_putc(fifo_msgout
, 0xAE);
64 z80_memfifo_putc(fifo_msgout
, len
+2);
65 z80_memfifo_putc(fifo_msgout
, func
);
66 z80_memfifo_putc(fifo_msgout
, subf
);
71 int msg_xmit(uint8_t func
, uint8_t subf
, int len
, uint8_t *msg
)
73 msg_xmit_header(func
, subf
, len
);
75 z80_memfifo_putc(fifo_msgout
, *msg
++);
80 void do_msg_ini_memfifo(uint8_t subf
, int len
, uint8_t * msg
)
84 z80_memfifo_init(subf
, msg_to_addr(msg
));
88 void do_msg_char_out(uint8_t subf
, int len
, uint8_t * msg
)
97 void do_msg_echo(uint8_t subf
, int len
, uint8_t * msg
)
102 msg_xmit(1, 3, len
, msg
);
105 /* ---------------------------------------------------------------------------*/
108 #define BLOCK_SIZE 512
118 static uint8_t disk_buffer
[BLOCK_SIZE
];
119 static struct cpm_drive_s drv_table
[MAX_DRIVE
];
123 ds 1 ; subcommand (login/read/write)
124 ds 1 ; @adrv (8 bits) +0
125 ds 1 ; @rdrv (8 bits) +1
126 ds 3 ; @xdph (24 bits) +2
129 void do_msg_cpm_login(uint8_t subf
, int len
, uint8_t * msg
)
136 uint8_t result_msg
[3];
140 if (len
!= 5) { /* TODO: check adrv, rdrv */
145 debug("\n## login: %c:\n", msg
[0]+'A');
149 if ( drv
>= MAX_DRIVE
) {
155 uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
158 if (drv_table
[drv
].img_name
!= NULL
) {
159 debug("## close: '%s'\n", drv_table
[drv
].img_name
);
160 f_close(&drv_table
[drv
].fd
);
161 free(drv_table
[drv
].img_name
);
162 drv_table
[drv
].img_name
= NULL
;
165 strcpy_P((char *)disk_buffer
, PSTR("dsk0"));
166 disk_buffer
[3] = msg
[0] + '0';
167 if (((np
= getenv((char*)disk_buffer
)) == NULL
) ||
168 ((drv_table
[drv
].img_name
= strdup(np
)) == NULL
)) {
174 res
= f_open(&drv_table
[drv
].fd
, drv_table
[drv
].img_name
,
177 debug("## open: '%s', (env: '%s'), res: %d\n",
178 drv_table
[drv
].img_name
, disk_buffer
, res
);
187 result_msg
[2] = res
>> 8;
190 debug("## error rc: %.02x, res: %d\n", rc
, res
);
194 msg_xmit(2, subf
, sizeof(result_msg
), result_msg
);
200 ds 1 ; subcommand (login/read/write)
201 ds 1 ; @adrv (8 bits) +0
202 ds 1 ; @rdrv (8 bits) +1
203 ds 1 ; @cnt (8 bits) +2
204 ds 2 ; @trk (16 bits) +3
205 ds 2 ; @sect(16 bits) +5
206 ds 3 ; phys. transfer addr +7
209 void do_msg_cpm_rw(uint8_t subf
, int len
, uint8_t * msg
)
215 bool dowrite
= (subf
== 2);
219 uint8_t result_msg
[3];
221 if (len
!= 10) { /* TODO: check adrv, rdrv */
227 if ( drv
>= MAX_DRIVE
) {
232 addr
= ((uint32_t)msg
[9] << 16) + ((uint16_t)msg
[8] << 8) + msg
[7];
234 /* bytes = BLOCK_SIZE; */ /* TODO: multi sector count */
235 pos
= (((uint16_t)(msg
[4] << 8) + msg
[3]) * 8
236 + ((uint32_t)(msg
[6] << 8) + msg
[5])) * BLOCK_SIZE
;
239 debug("## cpm_rw: %s %c: trk: %4d, sec: %d, pos: 0x%.5lx, addr: 0x%.5lx\n",
240 dowrite
? "write" : " read", msg
[0]+'A',
241 ((uint16_t)(msg
[4] << 8) + msg
[3]), msg
[5], pos
, addr
);
245 /* TODO: check bank boundary crossing */
247 if (addr + BLOCK_SIZE > MAX_MEMORY)
248 ... = MAX_MEMORY - addr;
252 res
= f_lseek(&drv_table
[drv
].fd
, pos
);
257 if (!(z80_bus_cmd(Request
) & ZST_ACQUIRED
)) {
260 z80_read_block(disk_buffer
, addr
, BLOCK_SIZE
);
261 z80_bus_cmd(Release
);
262 res
= f_write(&drv_table
[drv
].fd
, disk_buffer
, BLOCK_SIZE
, &br
);
264 res
= f_sync(&drv_table
[drv
].fd
);
267 res
= f_read(&drv_table
[drv
].fd
, disk_buffer
, BLOCK_SIZE
, &br
);
269 if (!(z80_bus_cmd(Request
) & ZST_ACQUIRED
)) {
272 z80_write_block(disk_buffer
, addr
, br
);
273 z80_bus_cmd(Release
);
278 if (br
!= BLOCK_SIZE
) {
279 debug("## f_read res: %d, bytes rd/wr: %u\n", res
, br
);
280 dump_ram(disk_buffer
, 0, 64, "Read Data");
287 debug("Bus timeout\n");
295 result_msg
[2] = res
>> 8;
298 debug("#### error rc: %.02x, res: %d\n", rc
, res
);
302 msg_xmit(2, subf
, sizeof(result_msg
), result_msg
);
306 const FLASH
struct msg_item z80_messages
[] =
309 1, 3, /* sub fct nr. from, to */
323 { 0xff, /* end mark */
332 void do_message(int len
, uint8_t *msg
)
334 uint8_t fct
, sub_fct
;
342 while (fct
!= z80_messages
[i
].fct
) {
343 if (z80_messages
[i
].fct
== 0xff) {
344 DBG_P(1, "do_message: Unknown function: %i, %i\n",
346 return; /* TODO: unknown message # */
352 while (fct
== z80_messages
[i
].fct
) {
353 if (sub_fct
>= z80_messages
[i
].sub_min
&&
354 sub_fct
<= z80_messages
[i
].sub_max
)
359 if (z80_messages
[i
].fct
!= fct
) {
360 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
362 return; /* TODO: unknown message sub# */
365 (z80_messages
[i
].func
)(sub_fct
, len
, msg
);
370 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len
);
376 #define CTRBUF_LEN 256
378 void check_msg_fifo(void)
381 static int_fast8_t state
;
382 static int msglen
,idx
;
383 static uint8_t buffer
[CTRBUF_LEN
];
385 while ((ch
= z80_memfifo_getc(fifo_msgin
)) >= 0) {
387 case 0: /* wait for start of message */
388 if (ch
== 0xAE) { /* TODO: magic number */
394 case 1: /* get msg len */
395 if (ch
> 0 && ch
<= CTRBUF_LEN
) {
401 case 2: /* get message */
404 do_message(msglen
, buffer
);
413 int msg_handling(int state
)
417 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
418 pending
= (Stat
& S_MSG_PENDING
) != 0;
419 Stat
&= ~S_MSG_PENDING
;
424 case 0: /* need init */
425 /* Get address of fifo_list */
426 z80_bus_cmd(Request
);
427 uint32_t fifo_list
= z80_read(0x40) +
428 ((uint16_t) z80_read(0x41) << 8) +
429 ((uint32_t) z80_read(0x42) << 16);
430 z80_bus_cmd(Release
);
431 if (fifo_list
!= 0) {
432 /* Get address of fifo 0 */
433 z80_bus_cmd(Request
);
434 uint32_t fifo_addr
= z80_read(fifo_list
) +
435 ((uint16_t) z80_read(fifo_list
+1) << 8) +
436 ((uint32_t) z80_read(fifo_list
+2) << 16);
437 z80_bus_cmd(Release
);
438 if (fifo_addr
!= 0) {
439 z80_memfifo_init(fifo_msgin
, fifo_addr
);
444 case 1: /* awaiting messages */
454 static int handle_msg_handling
;
456 void setup_z180_serv(void)
459 handle_msg_handling
= bg_register(msg_handling
, 0);
462 void restart_z180_serv(void)
464 z80_bus_cmd(Request
);
468 z80_bus_cmd(Release
);
470 for (int i
= 0; i
< NUM_FIFOS
; i
++)
471 z80_memfifo_init(i
, 0);
472 bg_setstat(handle_msg_handling
, 0);
476 /*--------------------------------------------------------------------------*/
478 const FLASH
uint8_t iniprog
[] = {
480 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
481 0x3E, 0x30, // ld a,030h
482 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
485 const FLASH
uint8_t sertest
[] = {
487 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
488 0x3E, 0x30, // ld a,030h
489 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
490 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
491 0xED, 0x39, 0x03, // out0 (cntlb1),a
492 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
493 0xED, 0x39, 0x01, // out0 (cntla1),a
494 0x3E, 0x00, // ld a,0
495 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
496 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
497 0xE6, 0x80, // and 80h
498 0x28, 0xF9, // jr z,l0
499 0xED, 0x00, 0x09, // in0 b,(rdr1)
500 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
501 0xE6, 0x02, // and 02h
502 0x28, 0xF9, // jr z,l1
503 0xED, 0x01, 0x07, // out0 (tdr1),b
507 const FLASH
uint8_t test1
[] = {
509 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
510 0x3E, 0x30, // ld a,030h
511 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
512 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
513 0x06, 0x08, // ld b,dmct_e-dmclrt
514 0x0E, 0x20, // ld c,sar0l
516 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
517 0xED, 0x39, 0x31, // out0 (dmode),a ;
518 0x3E, 0x62, // ld a,062h ;enable dma0,
519 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
520 0x18, 0xFB, // jr cl_1 ;
521 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
523 0x00, 0x00, // dw 0 ;dst (inc),
525 0x00, 0x00, // dw 0 ;count (64k)