z180/config.inc

   1 ;-----------------------------------------------------
   2 ; CPU and BANKING types
   3
   4
   5 CPU_Z180        equ     1               ; 0 = Z80, else Z180
   6 ROMSYS          equ     0
   7
   8 AVRCLK          equ     18432           ;[KHz]
   9
  10         if CPU_Z180
  11
  12 ;-----------------------------------------------------
  13 FOSC            equ     AVRCLK/2        ;Oscillator frequency [KHz]
  14 PHI             equ     FOSC*2          ;CPU frequency (clock doubler enabled)
  15
  16 ;-----------------------------------------------------
  17 ; Programmable Reload Timer (PRT)
  18
  19 PRT_PRE         equ     20              ;PRT prescaler
  20
  21 ; Reload value for 10 ms Int. (0.1KHz):
  22 ; tc10ms = phi/prescale/0.1KHz  = phi / (prescale/10)
  23
  24 PRT_TC10MS      equ     PHI / (PRT_PRE/10)
  25
  26 ;-----------------------------------------------------
  27 ; MMU
  28
  29 SYS$CBAR        equ     0C8h
  30 USR$CBAR        equ     0F0h
  31
  32
  33 BANKS           equ     18              ;max nr. of banks
  34
  35 ;-----------------------------------------------------
  36
  37 CREFSH          equ     0               ;Refresh rate register (disable refresh)
  38 CWAITIO         equ     3 shl IWI0      ;Max I/O Wait States, 0 Memory Wait States
  39
  40         else    ; Z80
  41
  42 PHI             equ     AVRCLK/5        ;CPU frequency [KHz]
  43 BAUDCLCK        equ     AVRCLK/10       ;Baudrate clock [KHz]
  44 ;BDCLK16                equ
  45
  46 SIOAD   EQU     0bch
  47 SIOAC   EQU     0bdh
  48 SIOBD   EQU     0beh
  49 SIOBC   EQU     0bfh
  50
  51 CTC0    EQU     0f4h
  52 CTC1    EQU     0f5h
  53 CTC2    EQU     0f6h
  54 CTC3    EQU     0f7h
  55
  56 ;
  57 ; Init Serial I/O for console input and output (SIO-A)
  58 ;
  59 ; Baudrate clock: 1843200 Hz (Bus connector pin A17)
  60 ;
  61 ; Baudrate   Divider    SIO     CTC
  62 ; ---------------------------------
  63 ; 115200          16     16       1
  64 ;  57600          32     16       2
  65 ;  38400          48     16       3
  66 ;  19200          96     16       6
  67 ;   9600         192     16      12
  68 ;   4800         384     16      24
  69 ;   2400         768     16      48
  70 ;   1200        1536     16      96
  71 ;    600        3072     16     192
  72 ;    300        6144     64      92
  73
  74         endif   ; CPU_Z180
  75
  76         if      ROMSYS
  77 c$rom           equ     0a5h
  78 ROM_EN          equ     0C0h
  79 ROM_DIS         equ     ROMEN+1
  80         if CPU_Z180
  81 CWAITROM        equ     2 shl MWI0
  82         endif
  83         endif
  84
  85
  86 DRSTNUM         equ     30h             ;DDTZ Restart vector (breakpoints)
  87
  88
  89 mrx.fifo_len    equ     256
  90 mtx.fifo_len    equ     256
  91
  92 ci.fifo_len     equ     128
  93 co.fifo_len     equ     256
  94
  95 s1.rx_len       equ     256             ;Serial 1 (ASCI1) buffers
  96 s1.tx_len       equ     256             ;
  97
  98 AVRINT5         equ     4Fh
  99 AVRINT6         equ     5Fh
 100 ;PMSG           equ     80h
 101
 102 ;-----------------------------------------------------
 103 ; Definition of (locical) top 2 memory pages
 104
 105 sysram_start    equ     0FE00h
 106 stacksize       equ     80
 107
 108 isvsw_loc       equ     0FEE0h
 109
 110 ivtab           equ     0ffc0h          ;int vector table
 111 iv2tab          equ     ivtab + 2*9
 112
 113
 114
 115 ;-----------------------------------------------------
 116
 117
 118 o.mask          equ     -3
 119 o.in_idx        equ     -2
 120 o.out_idx       equ     -1
 121
 122         .lall
 123
 124 mkbuf   macro   name,size
 125   if ((size & (size-1)) ne 0) or (size gt 256)
 126     .printx Error: buffer ^size must be power of 2 and in range 0..256!
 127     name&.mask equ ;wrong size error
 128   else
 129     ds 3
 130     name:: ds size
 131     name&.mask equ low (size-1)
 132     if size ne 0
 133       name&.end equ $-1
 134       name&.len equ size
 135     endif
 136   endif
 137 endm
 138
 139 ;-----------------------------------------------------
 140
 141 inidat  macro
 142         cseg
 143 ??ps.a  defl    $
 144         endm
 145
 146 inidate macro
 147 ??ps.len defl   $ - ??ps.a
 148         dseg
 149         ds      ??ps.len
 150         endm
 151