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cloudbase.mooo.com Git - z180-stamp.git/blob - avr/z180-serv.c
a920465209ac9f83017846d155222d8b6f17d1b4
2 #include <util/atomic.h>
4 #include "background.h"
12 /*--------------------------------------------------------------------------*/
15 uint8_t z80_get_byte(uint32_t adr
)
27 /*--------------------------------------------------------------------------*/
31 uint8_t sub_min
, sub_max
;
32 void (*func
)(uint8_t, int, uint8_t *);
35 uint32_t msg_to_addr(uint8_t *msg
)
51 void do_msg_ini_memfifo(uint8_t subf
, int len
, uint8_t * msg
)
55 z80_memfifo_init(subf
, msg_to_addr(msg
));
59 void do_msg_char_out(uint8_t subf
, int len
, uint8_t * msg
)
68 const FLASH
struct msg_item z80_messages
[] =
71 1, 3, /* sub fct nr. from, to */
76 { 0xff, /* end mark */
85 void do_message(int len
, uint8_t *msg
)
95 while (fct
!= z80_messages
[i
].fct
) {
96 if (z80_messages
[i
].fct
== 0xff) {
97 DBG_P(1, "do_message: Unknown function: %i, %i\n",
99 return; /* TODO: unknown message # */
105 while (fct
== z80_messages
[i
].fct
) {
106 if (sub_fct
>= z80_messages
[i
].sub_min
&&
107 sub_fct
<= z80_messages
[i
].sub_max
)
112 if (z80_messages
[i
].fct
!= fct
) {
113 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
115 return; /* TODO: unknown message sub# */
118 (z80_messages
[i
].func
)(sub_fct
, len
, msg
);
123 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len
);
129 #define CTRBUF_LEN 256
131 void check_msg_fifo(void)
134 static int_fast8_t state
;
135 static int msglen
,idx
;
136 static uint8_t buffer
[CTRBUF_LEN
];
138 while ((ch
= z80_memfifo_getc(fifo_msgin
)) >= 0) {
140 case 0: /* wait for start of message */
141 if (ch
== 0xAE) { /* TODO: magic number */
147 case 1: /* get msg len */
148 if (ch
> 0 && ch
<= CTRBUF_LEN
) {
154 case 2: /* get message */
157 do_message(msglen
, buffer
);
166 int msg_handling(int state
)
170 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
171 pending
= (Stat
& S_MSG_PENDING
) != 0;
172 Stat
&= ~S_MSG_PENDING
;
178 z80_bus_cmd(Request
);
179 uint32_t addr
= z80_read(0x40) +
180 ((uint16_t) z80_read(0x41) << 8) +
181 ((uint32_t) z80_read(0x42) << 16);
182 z80_bus_cmd(Release
);
184 z80_memfifo_init(fifo_msgin
, addr
);
198 static int handle_msg_handling
;
200 void setup_z180_serv(void)
203 handle_msg_handling
= bg_register(msg_handling
, 0);
206 void restart_z180_serv(void)
208 z80_bus_cmd(Request
);
212 z80_bus_cmd(Release
);
214 for (int i
= 0; i
< NUM_FIFOS
; i
++)
215 z80_memfifo_init(i
, 0);
216 bg_setstat(handle_msg_handling
, 0);
219 /*--------------------------------------------------------------------------*/
222 void dump_mem(const FLASH
uint8_t *addr
, uint32_t len
)
224 DBG_P(1, "hdrom dump:");
226 DBG_P(1, "\n %.5x:", addr
);
227 for (unsigned i
= 0; i
<16; i
++)
228 DBG_P(1, " %.2x", *addr
++);
229 len
-= len
> 16 ? 16 : len
;
234 /*--------------------------------------------------------------------------*/
237 const FLASH
uint8_t iniprog
[] = {
239 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
240 0x3E, 0x30, // ld a,030h
241 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
244 const FLASH
uint8_t sertest
[] = {
246 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
247 0x3E, 0x30, // ld a,030h
248 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
249 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
250 0xED, 0x39, 0x03, // out0 (cntlb1),a
251 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
252 0xED, 0x39, 0x01, // out0 (cntla1),a
253 0x3E, 0x00, // ld a,0
254 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
255 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
256 0xE6, 0x80, // and 80h
257 0x28, 0xF9, // jr z,l0
258 0xED, 0x00, 0x09, // in0 b,(rdr1)
259 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
260 0xE6, 0x02, // and 02h
261 0x28, 0xF9, // jr z,l1
262 0xED, 0x01, 0x07, // out0 (tdr1),b
266 const FLASH
uint8_t test1
[] = {
268 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
269 0x3E, 0x30, // ld a,030h
270 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
271 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
272 0x06, 0x08, // ld b,dmct_e-dmclrt
273 0x0E, 0x20, // ld c,sar0l
275 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
276 0xED, 0x39, 0x31, // out0 (dmode),a ;
277 0x3E, 0x62, // ld a,062h ;enable dma0,
278 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
279 0x18, 0xFB, // jr cl_1 ;
280 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
282 0x00, 0x00, // dw 0 ;dst (inc),
284 0x00, 0x00, // dw 0 ;count (64k)