6 extrn charini,?const,?conin
23 ;----------------------------------------------------------------------
42 ;----------------------------------------------------------------------
60 INIWAITS defl INIWAITS+CWAITROM
63 ;----------------------------------------------------------------------
75 ;----------------------------------------------------------------------
80 db rcr,CREFSH ;configure DRAM refresh
81 db dcntl,INIWAITS ;wait states
87 dmclrt: ;clear ram per dma
90 dw nullbyte ;src (fixed)
93 dw romend ;dst (inc), start after "rom" code
95 dw 0-romend ;count (64k)
105 in0 a,(itc) ;Illegal opcode trap?
107 ld a,i ;I register == 0 ?
108 jr z,hw_reset ; yes, harware reset
114 pop af ;restore registers
120 out0 (rcr),a ; configure DRAM refresh
122 out0 (dcntl),a ; wait states
124 ld a,M_NCD ;No Clock Divide
126 ; ld a,M_X2CM ;X2 Clock Multiplier
134 ; check warm start mark
136 ld ix,mark_55AA ; top of common area
147 ld sp,$stack ; mark found, check
148 jp z,wstart ; check ok,
150 ; ram not ok, initialize -- kstart --
162 ; Clear RAM using DMA0
167 ld hl,dmclrt ;load DMA registers
169 ld a,0cbh ;01ef dst +1, src fixed, burst
173 ld a,062h ;01f4 enable dma0,
175 out0 (dstat),a ;01f9 clear (up to) 64k
176 djnz ??cl_1 ; end of RAM?
181 ld hl,055AAh ;set warm start mark
202 ld a,INIDONEVAL ;tell others (CP/M) that hardware and fifos
203 ld (INIDONE),a ; are allready initialized
227 ;----------------------------------------------------------------------
244 push hl ;save fifo_list
252 ; TODO: address translation
256 pop hl ;get fifo_list back
275 ;----------------------------------------------------------------------
277 extrn msginit,msg.sout
278 extrn mtx.fifo,mrx.fifo
279 extrn co.fifo,ci.fifo
366 buftablen equ ($ - buffers)/3
381 ;----------------------------------------------------------------------
387 ld bc,sysrame-sysramw
392 ;----------------------------------------------------------------------
402 ; Let all vectors point to spurious int routines.
416 ;----------------------------------------------------------------------
434 db prt0it_e-prt0itab-2
438 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.
445 ;----------------------------------------------------------------------
452 ld b,0 ;high byte port adress
459 ld c,(hl) ;port address
463 inc b ;outi decrements b
476 ld c,(hl) ;port address
480 dec c ;otim increments c
486 inc b ;stop if count == 0
499 ld c,(hl) ;port address
511 ;----------------------------------------------------------------------
540 ;----------------------------------------------------------------------
544 ;--------------------------------------------------------------------
545 ; Return the BBR value for the given bank number
552 ret z ; Bank 0 is at physical address 0
563 ;--------------------------------------------------------------
568 ;out ahl: Phys. (linear) Address
575 ;--------------------------------------------------------------
582 ; hl hhhhhhhhllllllll
585 ; OP: ahl = (a<<12) + (h<<8) + l
587 ;out ahl: Phys. (linear) Address
603 ;--------------------------------------------------------------
608 ; OP: ahl = (bankbase<<12) + (d<<8) + e
610 ;out ahl: Phys. (linear) Address
617 or 00fh ; log. addr in common1?
621 in0 a,(cbr) ; yes, cbr is address base
624 ld b,16 ; log. address in baked area?
629 in0 a,(bbr) ; yes, bbr is address base
636 pop bc ; bank part is 0, no translation
643 ;----------------------------------------------------------------------
648 jr nc,b2p_1 ;A15=1 --> common
657 ;--------------------------------------------------------------
671 ; ---------------------------------------------------------
678 ; Trampoline for interrupt routines in banked ram.
679 ; Switch stack pointer to "system" stack in top ram
683 ex (sp),hl ;save hl, 'return adr' in hl
686 ex de,hl ;'return address' in de
691 jr nc,isw_1 ;stack allready in top ram
694 push hl ;save user stack pointer
720 ; ---------------------------------------------------------
747 ; ---------------------------------------------------------
752 sp.int.len equ $-sp.int0
772 ; ---------------------------------------------------------
777 ; This routine may not be loaded in page zero
779 ; return Carry clear, if INTs are enabled.
783 xor a ;clear accu and carry
784 push af ;stack bottom := 00xxh
786 ld a,i ;P flag := IFF2
787 ret pe ;exit carry clear, if enabled
789 dec sp ;has stack bottom been overwritten?
791 and a ;if not 00xxh, INTs were
792 ret nz ;actually enabled
793 scf ;Otherwise, they really are disabled
796 ;----------------------------------------------------------------------
830 ret c ;INTs were disabled
834 ;----------------------------------------------------------------------
869 ret nc ;INTs were disabled
875 ;----------------------------------------------------------------------
913 global mm_sio0, mm_sio1
915 @cbnk: db 0 ; current bank (0..2)
924 ;----------------------------------------------------------------------
934 ;-----------------------------------------------------
940 ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table
944 mark_55AA equ 0 - 2 - 4 ;2 byte for trap stack