avr/z180-serv.c

   1 /*
   2  */
   3
   4 #include "common.h"
   5 //#include <avr/power.h>
   6 //#include <avr/pgmspace.h>
   7 //#include <util/atomic.h>
   8 //#include <avr/sleep.h>
   9 //#include <string.h>
  10
  11
  12 #include "debug.h"
  13 #include "serial.h"
  14 #include "z80-if.h"
  15
  16
  17
  18 /*--------------------------------------------------------------------------*/
  19
  20
  21 uint8_t z80_get_byte(uint32_t adr)
  22 {
  23         uint8_t data;
  24
  25         z80_bus_cmd(Request);
  26         data = z80_read(adr),
  27         z80_bus_cmd(Release);
  28
  29         return data;
  30 }
  31
  32
  33 /*--------------------------------------------------------------------------*/
  34
  35 struct msg_item {
  36         uint8_t fct;
  37         uint8_t sub_min, sub_max;
  38         void (*func)(uint8_t, int, uint8_t *);
  39 };
  40
  41 uint32_t msg_to_addr(uint8_t *msg)
  42 {
  43         union {
  44                 uint32_t as32;
  45                 uint8_t as8[4];
  46         } addr;
  47
  48         addr.as8[0] = msg[0];
  49         addr.as8[1] = msg[1];
  50         addr.as8[2] = msg[2];
  51         addr.as8[3] = 0;
  52
  53         return addr.as32;
  54 }
  55
  56 void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
  57 {
  58         (void)subf; (void)len;
  59
  60         z80_init_msg_fifo(msg_to_addr(msg));
  61 }
  62
  63
  64 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
  65 {
  66         (void)len;
  67
  68         z80_memfifo_init(subf - 1, msg_to_addr(msg));
  69 }
  70
  71
  72 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
  73 {
  74         (void)subf;
  75
  76         while (len--)
  77                 putchar(*msg++);
  78 }
  79
  80
  81 const FLASH struct msg_item z80_messages[] =
  82 {
  83         { 0,                    /* fct nr. */
  84           0, 0,                 /* sub fct nr. from, to */
  85           do_msg_ini_msgfifo},
  86         { 0,
  87           1, 2,
  88           do_msg_ini_memfifo},
  89         { 1,
  90           1, 1,
  91           do_msg_char_out},
  92         { 0xff,                         /* end mark */
  93           0, 0,
  94           0},
  95
  96 };
  97
  98
  99
 100
 101 void do_message(int len, uint8_t *msg)
 102 {
 103         uint8_t fct, sub_fct;
 104         int_fast8_t i = 0;
 105
 106         if (len >= 2) {
 107                 fct = *msg++;
 108                 sub_fct = *msg++;
 109                 len -= 2;
 110
 111                 while (fct != z80_messages[i].fct)
 112                         ++i;
 113
 114                 if (z80_messages[i].fct == 0xff) {
 115                         DBG_P(1, "do_message: Unknown function: %i, %i\n",
 116                                         fct, sub_fct);
 117                         return; /* TODO: unknown message # */
 118                 }
 119
 120                 while (fct == z80_messages[i].fct) {
 121                         if (sub_fct >= z80_messages[i].sub_min && sub_fct <= z80_messages[i].sub_max )
 122                                 break;
 123                         ++i;
 124                 }
 125
 126                 if (z80_messages[i].fct != fct) {
 127                         DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
 128                                         fct, sub_fct);
 129                         return; /* TODO: unknown message sub# */
 130                 }
 131
 132                 (z80_messages[i].func)(sub_fct, len, msg);
 133
 134
 135         } else {
 136                 /* TODO: error */
 137                 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
 138         }
 139 }
 140
 141
 142
 143 #define CTRBUF_LEN 256
 144
 145 void check_msg_fifo(void)
 146 {
 147         int ch;
 148         static int_fast8_t state;
 149         static int msglen,idx;
 150         static uint8_t buffer[CTRBUF_LEN];
 151
 152         while (state != 3 && (ch = z80_msg_fifo_getc()) >= 0) {
 153                 switch (state) {
 154                 case 0:         /* wait for start of message */
 155                         if (ch == 0x81) {
 156                                 msglen = 0;
 157                                 idx = 0;
 158                                 state = 1;
 159                         }
 160                         break;
 161                 case 1:         /* get msg len */
 162                         if (ch > 0 && ch <= CTRBUF_LEN) {
 163                                 msglen = ch;
 164                                 state = 2;
 165                         } else
 166                                 state = 0;
 167                         break;
 168                 case 2:         /* get message */
 169                         buffer[idx++] = ch;
 170                         if (idx == msglen)
 171                                 state = 3;
 172                         break;
 173                 }
 174         }
 175
 176         if (state == 3) {
 177                 do_message(msglen, buffer);
 178                 state = 0;
 179         }
 180 }
 181
 182
 183 /*--------------------------------------------------------------------------*/
 184
 185 #if 0
 186 void dump_mem(const FLASH uint8_t *addr, uint32_t len)
 187 {
 188         DBG_P(1, "hdrom dump:");
 189         while (len) {
 190                 DBG_P(1, "\n    %.5x:", addr);
 191                 for (unsigned i = 0; i<16; i++)
 192                         DBG_P(1, " %.2x", *addr++);
 193                 len -= len > 16 ? 16 : len;
 194         }
 195         DBG_P(1, "\n");
 196 }
 197 #endif
 198 /*--------------------------------------------------------------------------*/
 199
 200
 201 const FLASH uint8_t iniprog[] = {
 202         0xAF,                   // xor     a
 203         0xED, 0x39, 0x36,       // out0    (rcr),a         ;disable  DRAM refresh
 204         0x3E, 0x30,             // ld      a,030h
 205         0xED, 0x39, 0x32        //out0    (dcntl),a       ;0 mem, max i/0 wait states
 206 };
 207
 208 const FLASH uint8_t sertest[] = {
 209         0xAF,              //   xor     a
 210         0xED, 0x39, 0x36,  //   out0    (rcr),a         ;disable  DRAM refresh
 211         0x3E, 0x30,        //   ld      a,030h
 212         0xED, 0x39, 0x32,  //   out0    (dcntl),a       ;0 mem, max i/0 wait states
 213         0x3E, 0x80,        //   ld      a,M_MPBT                ;no MP, PS=10, DR=16, SS=0
 214         0xED, 0x39, 0x03,  //   out0    (cntlb1),a
 215         0x3E, 0x64,        //   ld      a,M_RE + M_TE + M_MOD2  ;
 216         0xED, 0x39, 0x01,  //   out0    (cntla1),a
 217         0x3E, 0x00,        //   ld      a,0
 218         0xED, 0x39, 0x05,  //   out0    (stat1),a       ;Enable rx interrupts
 219         0xED, 0x38, 0x05,  //l0:in0     a,(stat1)
 220         0xE6, 0x80,        //   and     80h
 221         0x28, 0xF9,        //   jr      z,l0
 222         0xED, 0x00, 0x09,  //   in0     b,(rdr1)
 223         0xED, 0x38, 0x05,  //l1:in0     a,(stat1)
 224         0xE6, 0x02,        //   and     02h
 225         0x28, 0xF9,        //   jr      z,l1
 226         0xED, 0x01, 0x07,  //   out0    (tdr1),b
 227         0x18, 0xEA,        //   jr      l0
 228 };
 229
 230 const FLASH uint8_t test1[] = {
 231         0xAF,              //   xor     a
 232         0xED, 0x39, 0x36,  //   out0    (rcr),a         ;disable  DRAM refresh
 233         0x3E, 0x30,        //   ld      a,030h
 234         0xED, 0x39, 0x32,  //   out0    (dcntl),a       ;0 mem, max i/0 wait states
 235         0x21, 0x1E, 0x00,  //   ld      hl,dmclrt       ;load DMA registers
 236         0x06, 0x08,        //   ld      b,dmct_e-dmclrt
 237         0x0E, 0x20,        //   ld      c,sar0l
 238         0xED, 0x93,        //   otimr
 239         0x3E, 0xC3,        //   ld      a,0c3h          ;dst +1, src +1, burst
 240         0xED, 0x39, 0x31,  //   out0    (dmode),a       ;
 241         0x3E, 0x62,        //   ld      a,062h          ;enable dma0,
 242         0xED, 0x39, 0x30,  //cl_1:      out0    (dstat),a       ;copy 64k
 243         0x18, 0xFB,        //   jr      cl_1            ;
 244         0x00, 0x00,        //dmclrt:    dw      0               ;src (inc)
 245         0x00,              //   db      0               ;src
 246         0x00, 0x00,        //   dw      0               ;dst (inc),
 247         0x00,              //   db      0               ;dst
 248         0x00, 0x00,        //   dw      0               ;count (64k)
 249 };
 250
 251
 252
 253 //              check_msg_fifo();
 254