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cloudbase.mooo.com Git - z180-stamp.git/blob - avr/z180-serv.c
ce264ae76ed8e691e0fb886f28df70e1a068e87e
2 * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <util/atomic.h>
10 #include "background.h"
14 #include "z180-serv.h"
16 /*--------------------------------------------------------------------------*/
19 uint8_t z80_get_byte(uint32_t adr
)
31 /*--------------------------------------------------------------------------*/
35 uint8_t sub_min
, sub_max
;
36 void (*func
)(uint8_t, int, uint8_t *);
39 uint32_t msg_to_addr(uint8_t *msg
)
55 static int msg_xmit_header(uint8_t func
, uint8_t subf
, int len
)
57 z80_memfifo_putc(fifo_msgout
, 0xAE);
58 z80_memfifo_putc(fifo_msgout
, len
+2);
59 z80_memfifo_putc(fifo_msgout
, func
);
60 z80_memfifo_putc(fifo_msgout
, subf
);
65 int msg_xmit(uint8_t func
, uint8_t subf
, int len
, uint8_t *msg
)
67 msg_xmit_header(func
, subf
, len
);
69 z80_memfifo_putc(fifo_msgout
, *msg
++);
74 void do_msg_ini_memfifo(uint8_t subf
, int len
, uint8_t * msg
)
78 z80_memfifo_init(subf
, msg_to_addr(msg
));
82 void do_msg_char_out(uint8_t subf
, int len
, uint8_t * msg
)
91 void do_msg_echo(uint8_t subf
, int len
, uint8_t * msg
)
96 msg_xmit(1, 3, len
, msg
);
100 const FLASH
struct msg_item z80_messages
[] =
103 1, 3, /* sub fct nr. from, to */
111 { 0xff, /* end mark */
120 void do_message(int len
, uint8_t *msg
)
122 uint8_t fct
, sub_fct
;
130 while (fct
!= z80_messages
[i
].fct
) {
131 if (z80_messages
[i
].fct
== 0xff) {
132 DBG_P(1, "do_message: Unknown function: %i, %i\n",
134 return; /* TODO: unknown message # */
140 while (fct
== z80_messages
[i
].fct
) {
141 if (sub_fct
>= z80_messages
[i
].sub_min
&&
142 sub_fct
<= z80_messages
[i
].sub_max
)
147 if (z80_messages
[i
].fct
!= fct
) {
148 DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
150 return; /* TODO: unknown message sub# */
153 (z80_messages
[i
].func
)(sub_fct
, len
, msg
);
158 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len
);
164 #define CTRBUF_LEN 256
166 void check_msg_fifo(void)
169 static int_fast8_t state
;
170 static int msglen
,idx
;
171 static uint8_t buffer
[CTRBUF_LEN
];
173 while ((ch
= z80_memfifo_getc(fifo_msgin
)) >= 0) {
175 case 0: /* wait for start of message */
176 if (ch
== 0xAE) { /* TODO: magic number */
182 case 1: /* get msg len */
183 if (ch
> 0 && ch
<= CTRBUF_LEN
) {
189 case 2: /* get message */
192 do_message(msglen
, buffer
);
201 int msg_handling(int state
)
205 ATOMIC_BLOCK(ATOMIC_FORCEON
) {
206 pending
= (Stat
& S_MSG_PENDING
) != 0;
207 Stat
&= ~S_MSG_PENDING
;
212 case 0: /* need init */
213 z80_bus_cmd(Request
);
214 uint32_t addr
= z80_read(0x40) +
215 ((uint16_t) z80_read(0x41) << 8) +
216 ((uint32_t) z80_read(0x42) << 16);
217 z80_bus_cmd(Release
);
219 z80_memfifo_init(fifo_msgin
, addr
);
223 case 1: /* awaiting messages */
233 static int handle_msg_handling
;
235 void setup_z180_serv(void)
238 handle_msg_handling
= bg_register(msg_handling
, 0);
241 void restart_z180_serv(void)
243 z80_bus_cmd(Request
);
247 z80_bus_cmd(Release
);
249 for (int i
= 0; i
< NUM_FIFOS
; i
++)
250 z80_memfifo_init(i
, 0);
251 bg_setstat(handle_msg_handling
, 0);
254 /*--------------------------------------------------------------------------*/
256 const FLASH
uint8_t iniprog
[] = {
258 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
259 0x3E, 0x30, // ld a,030h
260 0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
263 const FLASH
uint8_t sertest
[] = {
265 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
266 0x3E, 0x30, // ld a,030h
267 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
268 0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
269 0xED, 0x39, 0x03, // out0 (cntlb1),a
270 0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
271 0xED, 0x39, 0x01, // out0 (cntla1),a
272 0x3E, 0x00, // ld a,0
273 0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
274 0xED, 0x38, 0x05, //l0:in0 a,(stat1)
275 0xE6, 0x80, // and 80h
276 0x28, 0xF9, // jr z,l0
277 0xED, 0x00, 0x09, // in0 b,(rdr1)
278 0xED, 0x38, 0x05, //l1:in0 a,(stat1)
279 0xE6, 0x02, // and 02h
280 0x28, 0xF9, // jr z,l1
281 0xED, 0x01, 0x07, // out0 (tdr1),b
285 const FLASH
uint8_t test1
[] = {
287 0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
288 0x3E, 0x30, // ld a,030h
289 0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
290 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
291 0x06, 0x08, // ld b,dmct_e-dmclrt
292 0x0E, 0x20, // ld c,sar0l
294 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
295 0xED, 0x39, 0x31, // out0 (dmode),a ;
296 0x3E, 0x62, // ld a,062h ;enable dma0,
297 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
298 0x18, 0xFB, // jr cl_1 ;
299 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
301 0x00, 0x00, // dw 0 ;dst (inc),
303 0x00, 0x00, // dw 0 ;count (64k)