avr/cmd_cpu.c

   1 /*
   2  * (C) Copyright 2018 Leo C. <erbl259-lmu@yahoo.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #include "cmd_cpu.h"
   8 //#include <ctype.h>
   9 #include <util/atomic.h>
  10
  11 #include "z80-if.h"
  12 #include "con-utils.h"
  13 //#include "env.h"
  14 #include "eval_arg.h"
  15 #include "timer.h"
  16 #include "getopt-min.h"
  17 //#include "debug.h"
  18
  19 /* hack to get Z180 loadfile into flash memory */
  20 #define const const FLASH
  21 #include "../z180/cpuinfo.h"
  22 #undef const
  23
  24
  25 /*
  26  * delay for <count> ms...
  27  */
  28 static void     test_delay(uint32_t count)
  29 {
  30         uint32_t ts = get_timer(0);
  31
  32         while (get_timer(ts) <= count);
  33 }
  34
  35 static int32_t z80_measure_phi(uint8_t cycles, uint16_t wait_ms)
  36 {
  37         uint16_t ref_stop;
  38         uint16_t ref_ovfl;
  39         uint32_t x_freq;
  40         uint8_t eimsk_save,eicrb_save;
  41
  42
  43         ATOMIC_BLOCK(ATOMIC_FORCEON) {
  44                 /* Save state and disable INT6 */
  45                 eimsk_save = EIMSK;
  46                 EIMSK &= ~_BV(INT6);
  47                 /* Save state and set INT6 for falling edge */
  48                 eicrb_save = EICRB;
  49                 EICRB = (eicrb_save & ~(0b11 << ISC60)) | (0b10 << ISC60);
  50         }
  51
  52         PRR1 &= ~_BV(PRTIM3);
  53         TCCR3A = 0;
  54         TCCR3B = 0b000<<CS30;   /* stop counter */
  55         TCNT3 = 0;
  56         TIFR3 = _BV(TOV3);
  57         ref_ovfl = 0;
  58
  59         ATOMIC_BLOCK(ATOMIC_FORCEON) {
  60                 /* Reset pending int */
  61                 EIFR = _BV(INTF6);
  62                 /* Wait for falling edge */
  63                 while ((EIFR & _BV(INTF6)) == 0)
  64                         ;
  65                 OCR4B = TCNT4;
  66                 TCCR3B = 0b110<<CS30;   /* Count falling edges on T3 (==INT6) */
  67                 TIFR4 = _BV(OCF4B);             /* clear compare match flag */
  68         }
  69         while (ref_ovfl < 60) {
  70                 ATOMIC_BLOCK(ATOMIC_FORCEON) {
  71                         if ((TIFR4 & _BV(OCF4B)) != 0) {
  72                                 TIFR4 = _BV(OCF4B);
  73                                 ref_ovfl++;
  74                         }
  75                 }
  76         }
  77
  78         ATOMIC_BLOCK(ATOMIC_FORCEON) {
  79                 EIFR = _BV(INTF6);
  80                 for (;;) {
  81                         if (EIFR & _BV(INTF6))
  82                                 break;
  83                         if (TIFR4 & _BV(OCF4B)) {
  84                                 if (EIFR & _BV(INTF6))
  85                                         break;
  86                                 TIFR4 = _BV(OCF4B);
  87                                 if (EIFR & _BV(INTF6))
  88                                         break;
  89                                 ref_ovfl++;
  90                                 if (EIFR & _BV(INTF6))
  91                                         break;
  92                                 if (ref_ovfl == 0)
  93                                         break;
  94                         }
  95                 }
  96                 ref_stop = TCNT4;
  97                 TCCR3B = 0b000<<CS30;   /* stop counter */
  98                 if ((TIFR4 & _BV(OCF4B)) != 0) {
  99                         TIFR4 = _BV(OCF4B);
 100                         if (ref_ovfl)
 101                                 ref_ovfl++;
 102                 }
 103         }
 104
 105         if (ref_ovfl == 0)
 106                 x_freq = 0xFFFFFFFE;
 107         else
 108         {
 109                 uint32_t ref_cnt = (ref_stop - OCR4B) + ((uint32_t)ref_ovfl << 16);
 110
 111                 x_freq = TCNT3;                                         /* x_cnt (17 bit) */
 112                 if ((TIFR3 & _BV(TOV3)) != 0)
 113                         x_freq += 1UL << 16;
 114                 uint32_t x_cnt = x_freq;
 115                 x_freq *= cycles;
 116
 117                 x_freq = ((uint64_t) x_freq * F_CPU + (ref_cnt / 2))/ ref_cnt;
 118
 119                 debug("ref_start: %6u, ref_stop: %6u, ref_ovfl: %4u, ref_cnt: %9lu\n"
 120                                           "    TCNT3: %6u,    x_cnt: %6lu, cycles: %3u, xfreq: %9lu\n",
 121                                         OCR4B, ref_stop, ref_ovfl, ref_cnt,
 122                                         TCNT3, x_cnt, cycles, x_freq);
 123
 124                 /* round to 5 decimal digits */
 125                 uint8_t sc = 0;
 126                 while (x_freq >= 100000UL) {
 127                         x_freq = (x_freq + 5)/10;
 128                         ++sc;
 129                 }
 130                 while (sc--)
 131                         x_freq *= 10;
 132         }
 133
 134         /* Stop Timer */
 135         TCCR3B = 0;
 136         PRR1 |= _BV(PRTIM3);
 137
 138         ATOMIC_BLOCK(ATOMIC_FORCEON) {
 139                 /* Restore INT6 */
 140 #if 0 /* wtf? */
 141                 eicrb_save = EICRB;
 142                 EICRB = (EICRB & ~(0b11 << ISC60)) | (eicrb_save & (0b11 << ISC60));
 143 #endif
 144                 EICRB = eicrb_save;
 145                 if ((eimsk_save & _BV(INT6)) != 0)
 146                         EIMSK |= _BV(INT6);
 147                 /* Reset pending int */
 148                 EIFR = _BV(INTF6);
 149         }
 150
 151         return (int32_t) x_freq;
 152 }
 153
 154
 155 static const FLASH char * const FLASH cpu_strings[] = {
 156         FSTR("Unknown CPU"),
 157         FSTR("8080"),
 158         FSTR("8085"),
 159         FSTR("Z80"),
 160         FSTR("x180"),
 161         FSTR("HD64180"),
 162         FSTR("Z80180"),
 163         FSTR("Z80S180"),
 164 };
 165
 166 command_ret_t do_cpuchk(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc UNUSED, char * const argv[] UNUSED)
 167 {
 168         uint8_t done = 0;
 169         uint8_t cputype;
 170         ERRNUM err = ESUCCESS;
 171         uint8_t ram_save[cpuinfo_length];
 172
 173         if (z80_bus_state() & ZST_RUNNING) {
 174                 err = ERUNNING;
 175         } else {
 176                 z80_bus_request_or_exit();
 177                 z80_read_block(ram_save, 0, cpuinfo_length);
 178                 z80_load_mem(0, cpuinfo,
 179                                         &cpuinfo_sections,
 180                                         cpuinfo_address,
 181                                         cpuinfo_length_of_sections);
 182                 z80_bus_cmd(Release);
 183
 184                 if (argv[1] && (argv[1][0] == 'n'))
 185                         goto donot;
 186
 187                 z80_bus_cmd(Run);
 188
 189                 clear_ctrlc();          /* forget any previous Control C */
 190                 while (done != 0xFF) {
 191                         _delay_ms(8);
 192                         /* check for ctrl-c to abort... */
 193                         if (had_ctrlc() || ctrlc()) {
 194                                 err = EINTR;
 195                                 break;
 196                         }
 197                         z80_bus_cmd(Request);
 198                         done = z80_read(3);
 199                         if (done == 0xFF)
 200                                 cputype = z80_read(4);
 201                         z80_bus_cmd(Release);
 202                 }
 203                 z80_bus_cmd(Reset);
 204                 z80_bus_cmd(Request);
 205 //              z80_write_block(ram_save, 0, cpuinfo_length);
 206                 z80_bus_cmd(Release);
 207         }
 208
 209 donot:
 210
 211         if (err)
 212                 cmd_error(CMD_RET_FAILURE, err, NULL);
 213
 214         if (done == 0xFF) {
 215                 if (cputype >= ARRAY_SIZE(cpu_strings))
 216                         cputype = 0;
 217                 printf_P(PSTR("Detected CPU: %S\n"), cpu_strings[cputype]);
 218         }
 219
 220         return CMD_RET_SUCCESS;
 221 }
 222
 223 command_ret_t do_cpu_test(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc, char * const argv[])
 224 {
 225
 226         uint32_t pulsewidth = 10; /* ms */
 227
 228         int opt;
 229         while ((opt = getopt(argc, argv, PSTR("t:"))) != -1) {
 230                 switch (opt) {
 231                 case 't':
 232                         pulsewidth = eval_arg(optarg, NULL);
 233                         break;
 234                 default: /* '?' */
 235                         return CMD_RET_USAGE;
 236                 }
 237         }
 238
 239         if ((z80_bus_state() & ZST_ACQUIRED) != RESET)
 240                 cmd_error(CMD_RET_FAILURE, ERUNNING, NULL);
 241
 242         clear_ctrlc();          /* forget any previous Control C */
 243         do {
 244                 z80_bus_cmd(Request);
 245                 test_delay(pulsewidth);
 246                 z80_bus_cmd(Release);
 247                 test_delay(pulsewidth);
 248         } while (!(had_ctrlc() || ctrlc()));
 249
 250         return CMD_RET_SUCCESS;
 251 }
 252
 253 command_ret_t do_bus_test(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc UNUSED, char * const argv[] UNUSED)
 254 {
 255         char ch;
 256
 257 #if 0
 258         int opt;
 259         while ((opt = getopt(argc, argv, PSTR("t:"))) != -1) {
 260                 switch (opt) {
 261                 case 't':
 262                         pulsewidth = eval_arg(optarg, NULL);
 263                         break;
 264                 default: /* '?' */
 265                         return CMD_RET_USAGE;
 266                 }
 267         }
 268 #endif
 269
 270         my_puts_P(PSTR(
 271                 "  1:  RESET         4:  RUN           r:  Toggle /RESET\n"
 272                 "  2:  REQUEST       5:  RESTART       b:  Toggle /BUSREQ\n"
 273                 "  3:  RELEASE       6:  M_CYCLE\n"
 274                 "\n"
 275                 //"Bus state: "
 276         ));
 277
 278         do {
 279                 ch = my_getchar(1);
 280                 if (ch >= 0) {
 281                         switch (ch) {
 282                                 case '1':               /* bus_cmd RESET   */
 283                                 case '2':               /* bus_cmd REQUEST */
 284                                 case '3':               /* bus_cmd RELEASE */
 285                                 case '4':               /* bus_cmd RUN     */
 286                                 case '5':               /* bus_cmd RESTART */
 287                                 case '6':               /* bus_cmd M_CYCLE */
 288                                                 z80_bus_cmd(ch - '1' + Reset);
 289                                                 break;
 290                                 case 'r':               /* Toggle RESET    */
 291                                                 z80_toggle_reset();
 292                                                 break;
 293                                 case 'b':               /* Toggle BUSREQ   */
 294                                                 z80_toggle_busreq();
 295                                                 break;
 296                         }
 297                         test_delay(10);
 298                         uint32_t cycles = z80_get_busreq_cycles();
 299                         printf_P(PSTR("\rState: %.2x, cycles: %lu, time: %luus      "),
 300                                         z80_bus_state(), cycles, (uint32_t) (cycles * 1000000LL / F_CPU));
 301                 }
 302         } while (ch != 0x03);
 303
 304         putchar('\n');
 305         return CMD_RET_SUCCESS;
 306 }
 307
 308 command_ret_t do_busack_test(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc UNUSED, char * const argv[] UNUSED)
 309 {
 310
 311         if ((z80_bus_state() & ZST_ACQUIRED) != RESET)
 312                 cmd_error(CMD_RET_FAILURE, ERUNNING, NULL);
 313
 314         z80_bus_cmd(Request);
 315         uint32_t result = z80_get_busreq_cycles();
 316         test_delay(20);
 317         z80_bus_cmd(Release);
 318
 319 #if 0
 320         long div;
 321
 322         pinconf = gpio_config_get(pin);
 323         if (pinconf == OUTPUT_TIMER) {
 324                 div = gpio_clockdiv_get(pin);
 325         }
 326 #endif
 327
 328
 329         printf_P(PSTR("cycles: %lu, time: %luus\n"), result, (uint32_t) (result * 1000000LL / F_CPU));
 330
 331         return CMD_RET_SUCCESS;
 332 }
 333
 334 static const FLASH uint8_t loop_code[] = {
 335         /* 0000 */  0x01,0x36,0x00,             /* ld   bc,00*256+RCR                           */
 336         /* 0003 */  0xAF,                       /* xor  a                                       */
 337         /* 0004 */  0xED,0x79,          /* out  (c),a                                   */
 338         /* 0006 */  0xD3,0x40,          /* out  (040H),a                                */
 339         /*      */                              /*                                      ;Z80    Z180(0W) Z180(MaxW) */
 340         /* 0008 */                              /* loop:                        ;-------------------------- */
 341         /* 0008 */  0xDB,0x50           /* in   a,(050h)        ;11       10     +3*3  19   */
 342         /* 000A */  0xC3,0x08,0x00      /* jp   loop            ;10                9     +3*3  18   */
 343                                                                         /*                                      ;-------------------------- */
 344                                                                         /*                                      ;21       19           37   */
 345 }
 346
 347 command_ret_t do_cpu_freq(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc, char * const argv[])
 348 {
 349
 350 #define O_SILENT                (1<<0)
 351 #define O_WENV                  (1<<1)
 352 #define O_LOAD_LOOP     (1<<2)
 353 #define O_UNLOAD_LOOP   (1<<3)
 354
 355         uint_fast8_t options = O_LOAD_LOOP | O_UNLOAD_LOOP;
 356         uint8_t lcycles = 18;
 357         uint16_t timeout = 1000;
 358
 359         uint8_t mem_save[ARRAY_SIZE(loop_code)];
 360
 361         int opt;
 362         while ((opt = getopt(argc, argv, PSTR("swnuc:t:"))) != -1) {
 363                 switch (opt) {
 364                 case 's':
 365                         options |= O_SILENT;
 366                         break;
 367                 case 'w':
 368                         options |= O_WENV;
 369                         break;
 370                 case 'n':
 371                         options &= ~O_LOAD_LOOP;
 372                         break;
 373                 case 'u':
 374                         options &= ~O_UNLOAD_LOOP;
 375                         break;
 376                 case 'c':
 377                         lcycles = eval_arg(optarg, NULL);
 378                         break;
 379                 case 't':
 380                         timeout = eval_arg(optarg, NULL);
 381                         break;
 382                 default: /* '?' */
 383                         return CMD_RET_USAGE;
 384                 }
 385         }
 386         if (argc - optind != 0)
 387                 return CMD_RET_USAGE;
 388
 389         if (z80_bus_state() & ZST_RUNNING) {
 390                 if (!(options & O_SILENT))
 391                         printf_P(PSTR("Frequency measuring failed. CPU allready running!\n"));
 392                 return CMD_RET_FAILURE;
 393         }
 394
 395
 396         z80_bus_cmd(Request);
 397         if (options & O_LOAD_LOOP) {
 398                 z80_read_block(mem_save, 0, ARRAY_SIZE(loop_code));
 399                 z80_write_block_P(loop_code, 0, ARRAY_SIZE(loop_code));
 400         }
 401         Stat &= ~S_IO_0X40;                             /* Reset pending int */
 402         z80_bus_cmd(Release);
 403         z80_bus_cmd(Run);
 404
 405         clear_ctrlc();                                  /* forget any previous Control C */
 406         ERRNUM err = 0;
 407
 408         /* Wait for falling edge */
 409         do {
 410                 /* check for ctrl-c to abort... */
 411                 if (had_ctrlc() || ctrlc()) {
 412                         err = EINTR;
 413                         break;
 414                 }
 415         } while ((Stat & S_IO_0X40) == 0);
 416
 417         int32_t cpu_freq;
 418         if (!err)
 419                 cpu_freq = z80_measure_phi(lcycles, false, timeout);
 420
 421         z80_bus_cmd(Reset);
 422         if (options & O_UNLOAD_LOOP) {
 423                 z80_bus_cmd(Request);
 424                 z80_write_block(mem_save, 0, ARRAY_SIZE(loop_code));
 425                 z80_bus_cmd(Release);
 426         }
 427         if (err)
 428                 cmd_error(CMD_RET_FAILURE, err, NULL);
 429
 430         if (!(options & O_SILENT)) {
 431                 printf_P(PSTR("%ld%S\n"), cpu_freq, cpu_freq < 0 ? PSTR("") : PSTR("Hz"));
 432 //              if (cpu_freq != 0)
 433 //              else
 434 //                      printf_P(PSTR("No CPU clock or input frequency to low!\n"));
 435         }
 436 #if 0
 437         if (options & O_WENV) {
 438                 if (setenv_ulong(PSTR(ENV_CPU_FREQ), cpu_freq)) {
 439                         if (!(options & O_SILENT))
 440                                 printf_P(PSTR("'SETENV (%S, %lu)' failed!\n"), PSTR(ENV_CPU_FREQ), cpu_freq);
 441                         return CMD_RET_FAILURE;
 442                 }
 443         }
 444 #endif
 445         return CMD_RET_SUCCESS;
 446 }
 447
 448
 449 /*
 450  * command table for fat subcommands
 451  */
 452
 453 cmd_tbl_t cmd_tbl_cpu[] = {
 454 CMD_TBL_ITEM(
 455         chkcpu, CONFIG_SYS_MAXARGS,     CTBL_RPT,       do_cpuchk,
 456         "Check CPU",
 457         ""
 458 ),
 459 CMD_TBL_ITEM(
 460         buscmd, CONFIG_SYS_MAXARGS,     CTBL_RPT,       do_bus_test,
 461         "Bus commands",
 462         ""
 463 ),
 464 CMD_TBL_ITEM(
 465         test,   CONFIG_SYS_MAXARGS,     1,      do_cpu_test,
 466         "Do bus request/release cycles",
 467         "[-t pulsewidth]"
 468 ),
 469 CMD_TBL_ITEM(
 470         busack, 2,      1,      do_busack_test,
 471         "Get time from /Reset high to /BUSACK low",
 472         ""
 473 ),
 474 CMD_TBL_ITEM(
 475         freq,   CONFIG_SYS_MAXARGS,     1,      do_cpu_freq,
 476         "Measure cpu frequency",
 477         "[-qwn] [-c loopcycles] [-t timeout]\n"
 478         "     -q Be quiet\n"
 479 //      "     -w  Write result to environment variable '"ENV_CPU_FREQ"'"
 480 ),
 481
 482 CMD_TBL_ITEM(
 483         help,   CONFIG_SYS_MAXARGS,     CTBL_RPT,       do_help,
 484         "Print sub command description/usage",
 485         "\n"
 486         "       - print brief description of all sub commands\n"
 487         "fat help command ...\n"
 488         "       - print detailed usage of sub cmd 'command'"
 489 ),
 490
 491 /* This does not use the CMD_TBL_ITEM macro as ? can't be used in symbol names */
 492         {FSTR("?"),   CONFIG_SYS_MAXARGS, 1, do_help,
 493          NULL,
 494 #ifdef  CONFIG_SYS_LONGHELP
 495         FSTR(""),
 496 #endif /* CONFIG_SYS_LONGHELP */
 497         NULL,
 498 #ifdef CONFIG_AUTO_COMPLETE
 499         NULL,
 500 #endif
 501 },
 502 /* Mark end of table */
 503 CMD_TBL_END(cmd_tbl_cpu)
 504 };
 505
 506
 507 command_ret_t do_cpu(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc UNUSED, char * const argv[] UNUSED)
 508 {
 509         //puts_P(PSTR("Huch?"));
 510
 511         return CMD_RET_USAGE;
 512 }
 513
 514
 515 #if 0           /* Z180 Single Step Functions */
 516 /*
 517  * Z180 Single Step Functions
 518  *
 519  */
 520
 521
 522 #define P_RUN           PORTG
 523 #define RUN                     1
 524 #define DDR_RUN         DDRG
 525 #define P_STEP          PORTG
 526 #define STEP            0
 527 #define DDR_STEP        DDRG
 528 #define P_WAIT          PORTG
 529 #define WAIT            2
 530 #define DDR_WAIT        DDRG
 531 /* All three signals are on the same Port (PortG) */
 532 #define PORT_SS         PORTG
 533 #define DDR_SS          DDRG
 534 #define PIN_SS          PING
 535
 536 static bool ss_available;
 537
 538 int single_step_setup(void)
 539 {
 540         ss_available = false;
 541
 542 #if 0
 543         if (z80_bus_state() & ZST_RUNNING ||
 544                         !(z80_bus_cmd(Request) & ZST_ACQUIRED))
 545                 return  -1;
 546 #endif
 547
 548         /* STEP, RUN output, WAIT input */
 549
 550         PORT_SS |= _BV(RUN) | _BV(STEP);
 551         DDR_SS |= _BV(RUN) | _BV(STEP);
 552         DDR_SS &= ~_BV(WAIT);
 553
 554         /* RUN high, MREQ pulse --> WAIT should be low */
 555         z80_mreq_pulse();
 556
 557         if ((PIN_SS & _BV(WAIT)) == 0) {
 558
 559                 /* RUN high, STEP pulse --> WAIT should be high */
 560                 PIN_SS = _BV(STEP);
 561                 PIN_SS = _BV(STEP);
 562                 if ((PIN_SS & _BV(WAIT)) != 0) {
 563
 564                         /* RUN high, MREQ pulse --> WAIT should be low */
 565                         z80_mreq_pulse();
 566                         if ((PIN_SS & _BV(WAIT)) == 0) {
 567
 568                                 /* RUN low --> WAIT should be high */
 569                                 PIN_SS = _BV(RUN);
 570                                 if ((PIN_SS & _BV(WAIT)) != 0) {
 571
 572                                         /* RUN low, STEP pulse --> WAIT should be high */
 573                                         PIN_SS = _BV(STEP);
 574                                         PIN_SS = _BV(STEP);
 575                                         if ((PIN_SS & _BV(WAIT)) != 0) {
 576
 577                                                 /* all tests passed */
 578                                                 ss_available = true;
 579                                         }
 580                                 }
 581                         }
 582                 }
 583         }
 584
 585         if (!ss_available) {
 586                 DDR_SS &= ~(_BV(STEP) | _BV(RUN));
 587                 PORT_SS |= _BV(RUN) | _BV(STEP);
 588         }
 589
 590         return ss_available ? 0 : -1;
 591 }
 592 #endif